2008-07-30 13:06:12 -06:00
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/**************************************************************************
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*
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* Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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/*
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* Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
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*/
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2011-08-30 16:16:33 -06:00
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#include <linux/export.h>
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2012-10-02 11:01:07 -06:00
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#include <drm/drmP.h>
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2008-07-30 13:06:12 -06:00
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#if defined(CONFIG_X86)
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static void
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drm_clflush_page(struct page *page)
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{
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uint8_t *page_virtual;
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unsigned int i;
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2012-09-18 19:12:41 -06:00
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const int size = boot_cpu_data.x86_clflush_size;
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2008-07-30 13:06:12 -06:00
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if (unlikely(page == NULL))
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return;
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2011-11-25 08:14:20 -07:00
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page_virtual = kmap_atomic(page);
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2012-09-18 19:12:41 -06:00
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for (i = 0; i < PAGE_SIZE; i += size)
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2008-07-30 13:06:12 -06:00
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clflush(page_virtual + i);
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2011-11-25 08:14:20 -07:00
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kunmap_atomic(page_virtual);
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2008-07-30 13:06:12 -06:00
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}
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2009-08-26 17:53:47 -06:00
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static void drm_cache_flush_clflush(struct page *pages[],
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unsigned long num_pages)
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{
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unsigned long i;
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mb();
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for (i = 0; i < num_pages; i++)
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drm_clflush_page(*pages++);
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mb();
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}
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static void
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drm_clflush_ipi_handler(void *null)
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{
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wbinvd();
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}
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#endif
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2009-09-01 17:41:13 -06:00
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2008-07-30 13:06:12 -06:00
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void
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drm_clflush_pages(struct page *pages[], unsigned long num_pages)
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{
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#if defined(CONFIG_X86)
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if (cpu_has_clflush) {
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2009-08-26 17:53:47 -06:00
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drm_cache_flush_clflush(pages, num_pages);
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2008-07-30 13:06:12 -06:00
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return;
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}
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2009-08-26 17:53:47 -06:00
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if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
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printk(KERN_ERR "Timed out waiting for cache flush.\n");
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#elif defined(__powerpc__)
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unsigned long i;
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for (i = 0; i < num_pages; i++) {
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struct page *page = pages[i];
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void *page_virtual;
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if (unlikely(page == NULL))
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continue;
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2011-11-25 08:14:20 -07:00
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page_virtual = kmap_atomic(page);
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2009-08-26 17:53:47 -06:00
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flush_dcache_range((unsigned long)page_virtual,
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(unsigned long)page_virtual + PAGE_SIZE);
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2011-11-25 08:14:20 -07:00
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kunmap_atomic(page_virtual);
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2009-08-26 17:53:47 -06:00
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}
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#else
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2009-09-01 17:41:13 -06:00
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printk(KERN_ERR "Architecture has no drm_cache.c support\n");
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WARN_ON_ONCE(1);
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2008-10-06 21:41:49 -06:00
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#endif
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2008-07-30 13:06:12 -06:00
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}
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EXPORT_SYMBOL(drm_clflush_pages);
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2012-03-25 11:47:30 -06:00
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2012-06-01 08:20:22 -06:00
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void
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drm_clflush_sg(struct sg_table *st)
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{
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#if defined(CONFIG_X86)
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if (cpu_has_clflush) {
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struct scatterlist *sg;
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int i;
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mb();
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for_each_sg(st->sgl, sg, st->nents, i)
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drm_clflush_page(sg_page(sg));
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mb();
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return;
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}
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if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
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printk(KERN_ERR "Timed out waiting for cache flush.\n");
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#else
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printk(KERN_ERR "Architecture has no drm_cache.c support\n");
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WARN_ON_ONCE(1);
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#endif
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}
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EXPORT_SYMBOL(drm_clflush_sg);
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2012-03-25 11:47:30 -06:00
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void
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drm_clflush_virt_range(char *addr, unsigned long length)
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{
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#if defined(CONFIG_X86)
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if (cpu_has_clflush) {
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char *end = addr + length;
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mb();
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for (; addr < end; addr += boot_cpu_data.x86_clflush_size)
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clflush(addr);
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clflush(end - 1);
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mb();
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return;
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}
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if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
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printk(KERN_ERR "Timed out waiting for cache flush.\n");
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#else
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printk(KERN_ERR "Architecture has no drm_cache.c support\n");
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WARN_ON_ONCE(1);
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#endif
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}
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EXPORT_SYMBOL(drm_clflush_virt_range);
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