2008-10-19 17:51:03 -06:00
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/*
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* arch/arm/plat-orion/gpio.c
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*
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* Marvell Orion SoC GPIO handling.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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2008-10-19 17:51:03 -06:00
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#include <linux/irq.h>
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2008-10-19 17:51:03 -06:00
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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2009-05-28 18:08:55 -06:00
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#include <linux/gpio.h>
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2008-10-19 17:51:03 -06:00
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2010-12-14 04:54:03 -07:00
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/*
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* GPIO unit register offsets.
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*/
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#define GPIO_OUT_OFF 0x0000
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#define GPIO_IO_CONF_OFF 0x0004
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#define GPIO_BLINK_EN_OFF 0x0008
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#define GPIO_IN_POL_OFF 0x000c
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#define GPIO_DATA_IN_OFF 0x0010
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#define GPIO_EDGE_CAUSE_OFF 0x0014
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#define GPIO_EDGE_MASK_OFF 0x0018
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#define GPIO_LEVEL_MASK_OFF 0x001c
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struct orion_gpio_chip {
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struct gpio_chip chip;
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spinlock_t lock;
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void __iomem *base;
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unsigned long valid_input;
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unsigned long valid_output;
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int mask_offset;
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int secondary_irq_base;
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};
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static void __iomem *GPIO_OUT(struct orion_gpio_chip *ochip)
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{
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return ochip->base + GPIO_OUT_OFF;
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}
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static void __iomem *GPIO_IO_CONF(struct orion_gpio_chip *ochip)
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{
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return ochip->base + GPIO_IO_CONF_OFF;
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}
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static void __iomem *GPIO_BLINK_EN(struct orion_gpio_chip *ochip)
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{
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return ochip->base + GPIO_BLINK_EN_OFF;
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}
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static void __iomem *GPIO_IN_POL(struct orion_gpio_chip *ochip)
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{
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return ochip->base + GPIO_IN_POL_OFF;
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}
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static void __iomem *GPIO_DATA_IN(struct orion_gpio_chip *ochip)
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{
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return ochip->base + GPIO_DATA_IN_OFF;
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}
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static void __iomem *GPIO_EDGE_CAUSE(struct orion_gpio_chip *ochip)
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{
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return ochip->base + GPIO_EDGE_CAUSE_OFF;
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}
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static void __iomem *GPIO_EDGE_MASK(struct orion_gpio_chip *ochip)
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{
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return ochip->base + ochip->mask_offset + GPIO_EDGE_MASK_OFF;
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}
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static void __iomem *GPIO_LEVEL_MASK(struct orion_gpio_chip *ochip)
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{
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return ochip->base + ochip->mask_offset + GPIO_LEVEL_MASK_OFF;
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}
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2008-10-19 17:51:03 -06:00
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2010-12-14 04:54:03 -07:00
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static struct orion_gpio_chip orion_gpio_chips[2];
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static int orion_gpio_chip_count;
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static inline void
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__set_direction(struct orion_gpio_chip *ochip, unsigned pin, int input)
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2008-10-19 17:51:03 -06:00
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{
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u32 u;
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2010-12-14 04:54:03 -07:00
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u = readl(GPIO_IO_CONF(ochip));
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2008-10-19 17:51:03 -06:00
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if (input)
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2010-12-14 04:54:03 -07:00
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u |= 1 << pin;
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2008-10-19 17:51:03 -06:00
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else
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2010-12-14 04:54:03 -07:00
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u &= ~(1 << pin);
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writel(u, GPIO_IO_CONF(ochip));
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2008-10-19 17:51:03 -06:00
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}
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2010-12-14 04:54:03 -07:00
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static void __set_level(struct orion_gpio_chip *ochip, unsigned pin, int high)
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2008-10-19 17:51:03 -06:00
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{
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u32 u;
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2010-12-14 04:54:03 -07:00
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u = readl(GPIO_OUT(ochip));
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2008-10-19 17:51:03 -06:00
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if (high)
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2010-12-14 04:54:03 -07:00
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u |= 1 << pin;
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2008-10-19 17:51:03 -06:00
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else
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2010-12-14 04:54:03 -07:00
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u &= ~(1 << pin);
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writel(u, GPIO_OUT(ochip));
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2008-10-19 17:51:03 -06:00
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}
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2010-12-14 04:54:03 -07:00
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static inline void
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__set_blinking(struct orion_gpio_chip *ochip, unsigned pin, int blink)
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2008-10-19 17:51:03 -06:00
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{
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2009-05-28 18:08:55 -06:00
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u32 u;
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2008-10-19 17:51:03 -06:00
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2010-12-14 04:54:03 -07:00
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u = readl(GPIO_BLINK_EN(ochip));
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2009-05-28 18:08:55 -06:00
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if (blink)
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2010-12-14 04:54:03 -07:00
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u |= 1 << pin;
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2009-05-28 18:08:55 -06:00
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else
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2010-12-14 04:54:03 -07:00
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u &= ~(1 << pin);
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writel(u, GPIO_BLINK_EN(ochip));
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2009-05-28 18:08:55 -06:00
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}
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2008-10-19 17:51:03 -06:00
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2010-12-14 04:54:03 -07:00
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static inline int
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orion_gpio_is_valid(struct orion_gpio_chip *ochip, unsigned pin, int mode)
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2009-05-28 18:08:55 -06:00
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{
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2010-12-14 04:54:03 -07:00
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if (pin >= ochip->chip.ngpio)
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goto err_out;
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if ((mode & GPIO_INPUT_OK) && !test_bit(pin, &ochip->valid_input))
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goto err_out;
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if ((mode & GPIO_OUTPUT_OK) && !test_bit(pin, &ochip->valid_output))
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goto err_out;
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return 1;
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2008-10-19 17:51:03 -06:00
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2009-05-28 18:08:55 -06:00
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err_out:
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pr_debug("%s: invalid GPIO %d\n", __func__, pin);
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return false;
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2008-10-19 17:51:03 -06:00
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}
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2009-05-28 18:08:55 -06:00
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/*
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* GENERIC_GPIO primitives.
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*/
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2010-12-14 04:54:03 -07:00
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static int orion_gpio_request(struct gpio_chip *chip, unsigned pin)
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{
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struct orion_gpio_chip *ochip =
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container_of(chip, struct orion_gpio_chip, chip);
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if (orion_gpio_is_valid(ochip, pin, GPIO_INPUT_OK) ||
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orion_gpio_is_valid(ochip, pin, GPIO_OUTPUT_OK))
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return 0;
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return -EINVAL;
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}
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2009-05-28 18:08:55 -06:00
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static int orion_gpio_direction_input(struct gpio_chip *chip, unsigned pin)
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2008-10-19 17:51:03 -06:00
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{
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2010-12-14 04:54:03 -07:00
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struct orion_gpio_chip *ochip =
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container_of(chip, struct orion_gpio_chip, chip);
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2008-10-19 17:51:03 -06:00
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unsigned long flags;
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2010-12-14 04:54:03 -07:00
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if (!orion_gpio_is_valid(ochip, pin, GPIO_INPUT_OK))
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2008-10-19 17:51:03 -06:00
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return -EINVAL;
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2010-12-14 04:54:03 -07:00
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spin_lock_irqsave(&ochip->lock, flags);
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__set_direction(ochip, pin, 1);
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spin_unlock_irqrestore(&ochip->lock, flags);
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2008-10-19 17:51:03 -06:00
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return 0;
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}
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2010-12-14 04:54:03 -07:00
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static int orion_gpio_get(struct gpio_chip *chip, unsigned pin)
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2008-10-19 17:51:03 -06:00
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{
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2010-12-14 04:54:03 -07:00
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struct orion_gpio_chip *ochip =
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container_of(chip, struct orion_gpio_chip, chip);
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2008-10-19 17:51:03 -06:00
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int val;
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2010-12-14 04:54:03 -07:00
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if (readl(GPIO_IO_CONF(ochip)) & (1 << pin)) {
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val = readl(GPIO_DATA_IN(ochip)) ^ readl(GPIO_IN_POL(ochip));
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} else {
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val = readl(GPIO_OUT(ochip));
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}
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2008-10-19 17:51:03 -06:00
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2010-12-14 04:54:03 -07:00
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return (val >> pin) & 1;
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2008-10-19 17:51:03 -06:00
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}
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2010-12-14 04:54:03 -07:00
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static int
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orion_gpio_direction_output(struct gpio_chip *chip, unsigned pin, int value)
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2008-10-19 17:51:03 -06:00
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{
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2010-12-14 04:54:03 -07:00
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struct orion_gpio_chip *ochip =
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container_of(chip, struct orion_gpio_chip, chip);
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2008-10-19 17:51:03 -06:00
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unsigned long flags;
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2009-05-28 18:08:55 -06:00
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2010-12-14 04:54:03 -07:00
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if (!orion_gpio_is_valid(ochip, pin, GPIO_OUTPUT_OK))
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2009-05-28 18:08:55 -06:00
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return -EINVAL;
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2008-10-19 17:51:03 -06:00
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2010-12-14 04:54:03 -07:00
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spin_lock_irqsave(&ochip->lock, flags);
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__set_blinking(ochip, pin, 0);
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__set_level(ochip, pin, value);
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__set_direction(ochip, pin, 0);
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spin_unlock_irqrestore(&ochip->lock, flags);
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2009-05-28 18:08:55 -06:00
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return 0;
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2008-10-19 17:51:03 -06:00
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}
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2010-12-14 04:54:03 -07:00
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static void orion_gpio_set(struct gpio_chip *chip, unsigned pin, int value)
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2008-10-19 17:51:03 -06:00
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{
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2010-12-14 04:54:03 -07:00
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struct orion_gpio_chip *ochip =
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container_of(chip, struct orion_gpio_chip, chip);
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2008-10-19 17:51:03 -06:00
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unsigned long flags;
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2010-12-14 04:54:03 -07:00
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spin_lock_irqsave(&ochip->lock, flags);
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__set_level(ochip, pin, value);
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spin_unlock_irqrestore(&ochip->lock, flags);
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2008-10-19 17:51:03 -06:00
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}
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2010-12-14 04:54:03 -07:00
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static int orion_gpio_to_irq(struct gpio_chip *chip, unsigned pin)
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2008-10-19 17:51:03 -06:00
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{
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2010-12-14 04:54:03 -07:00
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struct orion_gpio_chip *ochip =
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container_of(chip, struct orion_gpio_chip, chip);
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2008-10-19 17:51:03 -06:00
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2010-12-14 04:54:03 -07:00
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return ochip->secondary_irq_base + pin;
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2009-05-28 18:08:55 -06:00
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}
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2008-10-19 17:51:03 -06:00
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2010-12-14 04:54:03 -07:00
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2008-10-19 17:51:03 -06:00
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/*
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* Orion-specific GPIO API extensions.
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*/
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2010-12-14 04:54:03 -07:00
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static struct orion_gpio_chip *orion_gpio_chip_find(int pin)
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{
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int i;
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for (i = 0; i < orion_gpio_chip_count; i++) {
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struct orion_gpio_chip *ochip = orion_gpio_chips + i;
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struct gpio_chip *chip = &ochip->chip;
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if (pin >= chip->base && pin < chip->base + chip->ngpio)
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return ochip;
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}
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return NULL;
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}
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2008-10-19 17:51:03 -06:00
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void __init orion_gpio_set_unused(unsigned pin)
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{
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2010-12-14 04:54:03 -07:00
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struct orion_gpio_chip *ochip = orion_gpio_chip_find(pin);
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if (ochip == NULL)
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return;
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pin -= ochip->chip.base;
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2009-05-28 18:08:55 -06:00
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/* Configure as output, drive low. */
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2010-12-14 04:54:03 -07:00
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__set_level(ochip, pin, 0);
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__set_direction(ochip, pin, 0);
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2008-10-19 17:51:03 -06:00
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}
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2009-02-02 13:27:55 -07:00
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void __init orion_gpio_set_valid(unsigned pin, int mode)
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2008-10-19 17:51:03 -06:00
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{
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2010-12-14 04:54:03 -07:00
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struct orion_gpio_chip *ochip = orion_gpio_chip_find(pin);
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if (ochip == NULL)
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return;
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pin -= ochip->chip.base;
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2009-02-02 13:27:55 -07:00
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if (mode == 1)
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mode = GPIO_INPUT_OK | GPIO_OUTPUT_OK;
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2010-12-14 04:54:03 -07:00
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2009-02-02 13:27:55 -07:00
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if (mode & GPIO_INPUT_OK)
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2010-12-14 04:54:03 -07:00
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__set_bit(pin, &ochip->valid_input);
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2008-10-19 17:51:03 -06:00
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else
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2010-12-14 04:54:03 -07:00
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__clear_bit(pin, &ochip->valid_input);
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2009-02-02 13:27:55 -07:00
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if (mode & GPIO_OUTPUT_OK)
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2010-12-14 04:54:03 -07:00
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__set_bit(pin, &ochip->valid_output);
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2009-02-02 13:27:55 -07:00
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else
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2010-12-14 04:54:03 -07:00
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__clear_bit(pin, &ochip->valid_output);
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2008-10-19 17:51:03 -06:00
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}
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void orion_gpio_set_blink(unsigned pin, int blink)
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{
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2010-12-14 04:54:03 -07:00
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struct orion_gpio_chip *ochip = orion_gpio_chip_find(pin);
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2008-10-19 17:51:03 -06:00
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unsigned long flags;
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2010-12-14 04:54:03 -07:00
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if (ochip == NULL)
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return;
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2008-10-19 17:51:03 -06:00
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2010-12-14 04:54:03 -07:00
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spin_lock_irqsave(&ochip->lock, flags);
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__set_level(ochip, pin, 0);
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__set_blinking(ochip, pin, blink);
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spin_unlock_irqrestore(&ochip->lock, flags);
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2008-10-19 17:51:03 -06:00
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}
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EXPORT_SYMBOL(orion_gpio_set_blink);
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2008-10-19 17:51:03 -06:00
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/*****************************************************************************
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* Orion GPIO IRQ
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*
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* GPIO_IN_POL register controls whether GPIO_DATA_IN will hold the same
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* value of the line or the opposite value.
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*
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* Level IRQ handlers: DATA_IN is used directly as cause register.
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* Interrupt are masked by LEVEL_MASK registers.
|
|
|
|
* Edge IRQ handlers: Change in DATA_IN are latched in EDGE_CAUSE.
|
|
|
|
* Interrupt are masked by EDGE_MASK registers.
|
|
|
|
* Both-edge handlers: Similar to regular Edge handlers, but also swaps
|
|
|
|
* the polarity to catch the next line transaction.
|
|
|
|
* This is a race condition that might not perfectly
|
|
|
|
* work on some use cases.
|
|
|
|
*
|
|
|
|
* Every eight GPIO lines are grouped (OR'ed) before going up to main
|
|
|
|
* cause register.
|
|
|
|
*
|
|
|
|
* EDGE cause mask
|
|
|
|
* data-in /--------| |-----| |----\
|
|
|
|
* -----| |----- ---- to main cause reg
|
|
|
|
* X \----------------| |----/
|
|
|
|
* polarity LEVEL mask
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2010-11-29 03:17:38 -07:00
|
|
|
static int gpio_irq_set_type(struct irq_data *d, u32 type)
|
2008-10-19 17:51:03 -06:00
|
|
|
{
|
2011-04-14 11:17:57 -06:00
|
|
|
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
|
|
|
|
struct irq_chip_type *ct = irq_data_get_chip_type(d);
|
|
|
|
struct orion_gpio_chip *ochip = gc->private;
|
2010-12-14 04:54:03 -07:00
|
|
|
int pin;
|
2008-10-19 17:51:03 -06:00
|
|
|
u32 u;
|
|
|
|
|
2011-04-14 11:17:57 -06:00
|
|
|
pin = d->irq - gc->irq_base;
|
2010-12-14 04:54:03 -07:00
|
|
|
|
|
|
|
u = readl(GPIO_IO_CONF(ochip)) & (1 << pin);
|
2008-10-19 17:51:03 -06:00
|
|
|
if (!u) {
|
|
|
|
printk(KERN_ERR "orion gpio_irq_set_type failed "
|
2010-11-29 03:17:38 -07:00
|
|
|
"(irq %d, pin %d).\n", d->irq, pin);
|
2008-10-19 17:51:03 -06:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2011-04-14 11:17:57 -06:00
|
|
|
type &= IRQ_TYPE_SENSE_MASK;
|
|
|
|
if (type == IRQ_TYPE_NONE)
|
2008-10-19 17:51:03 -06:00
|
|
|
return -EINVAL;
|
2011-04-14 11:17:57 -06:00
|
|
|
|
|
|
|
/* Check if we need to change chip and handler */
|
|
|
|
if (!(ct->type & type))
|
|
|
|
if (irq_setup_alt_chip(d, type))
|
|
|
|
return -EINVAL;
|
2008-10-19 17:51:03 -06:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Configure interrupt polarity.
|
|
|
|
*/
|
|
|
|
if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH) {
|
2010-12-14 04:54:03 -07:00
|
|
|
u = readl(GPIO_IN_POL(ochip));
|
|
|
|
u &= ~(1 << pin);
|
|
|
|
writel(u, GPIO_IN_POL(ochip));
|
2008-10-19 17:51:03 -06:00
|
|
|
} else if (type == IRQ_TYPE_EDGE_FALLING || type == IRQ_TYPE_LEVEL_LOW) {
|
2010-12-14 04:54:03 -07:00
|
|
|
u = readl(GPIO_IN_POL(ochip));
|
|
|
|
u |= 1 << pin;
|
|
|
|
writel(u, GPIO_IN_POL(ochip));
|
2008-10-19 17:51:03 -06:00
|
|
|
} else if (type == IRQ_TYPE_EDGE_BOTH) {
|
|
|
|
u32 v;
|
|
|
|
|
2010-12-14 04:54:03 -07:00
|
|
|
v = readl(GPIO_IN_POL(ochip)) ^ readl(GPIO_DATA_IN(ochip));
|
2008-10-19 17:51:03 -06:00
|
|
|
|
|
|
|
/*
|
|
|
|
* set initial polarity based on current input level
|
|
|
|
*/
|
2010-12-14 04:54:03 -07:00
|
|
|
u = readl(GPIO_IN_POL(ochip));
|
|
|
|
if (v & (1 << pin))
|
|
|
|
u |= 1 << pin; /* falling */
|
2008-10-19 17:51:03 -06:00
|
|
|
else
|
2010-12-14 04:54:03 -07:00
|
|
|
u &= ~(1 << pin); /* rising */
|
|
|
|
writel(u, GPIO_IN_POL(ochip));
|
2008-10-19 17:51:03 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-12-14 04:54:03 -07:00
|
|
|
void __init orion_gpio_init(int gpio_base, int ngpio,
|
|
|
|
u32 base, int mask_offset, int secondary_irq_base)
|
|
|
|
{
|
|
|
|
struct orion_gpio_chip *ochip;
|
2011-04-14 11:17:57 -06:00
|
|
|
struct irq_chip_generic *gc;
|
|
|
|
struct irq_chip_type *ct;
|
2010-12-14 04:54:03 -07:00
|
|
|
|
|
|
|
if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips))
|
|
|
|
return;
|
|
|
|
|
|
|
|
ochip = orion_gpio_chips + orion_gpio_chip_count;
|
|
|
|
ochip->chip.label = "orion_gpio";
|
|
|
|
ochip->chip.request = orion_gpio_request;
|
|
|
|
ochip->chip.direction_input = orion_gpio_direction_input;
|
|
|
|
ochip->chip.get = orion_gpio_get;
|
|
|
|
ochip->chip.direction_output = orion_gpio_direction_output;
|
|
|
|
ochip->chip.set = orion_gpio_set;
|
|
|
|
ochip->chip.to_irq = orion_gpio_to_irq;
|
|
|
|
ochip->chip.base = gpio_base;
|
|
|
|
ochip->chip.ngpio = ngpio;
|
|
|
|
ochip->chip.can_sleep = 0;
|
|
|
|
spin_lock_init(&ochip->lock);
|
|
|
|
ochip->base = (void __iomem *)base;
|
|
|
|
ochip->valid_input = 0;
|
|
|
|
ochip->valid_output = 0;
|
|
|
|
ochip->mask_offset = mask_offset;
|
|
|
|
ochip->secondary_irq_base = secondary_irq_base;
|
|
|
|
|
|
|
|
gpiochip_add(&ochip->chip);
|
|
|
|
|
|
|
|
orion_gpio_chip_count++;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Mask and clear GPIO interrupts.
|
|
|
|
*/
|
|
|
|
writel(0, GPIO_EDGE_CAUSE(ochip));
|
|
|
|
writel(0, GPIO_EDGE_MASK(ochip));
|
|
|
|
writel(0, GPIO_LEVEL_MASK(ochip));
|
|
|
|
|
2011-04-14 11:17:57 -06:00
|
|
|
gc = irq_alloc_generic_chip("orion_gpio_irq", 2, secondary_irq_base,
|
|
|
|
ochip->base, handle_level_irq);
|
|
|
|
gc->private = ochip;
|
|
|
|
|
|
|
|
ct = gc->chip_types;
|
|
|
|
ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF;
|
|
|
|
ct->type = IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW;
|
|
|
|
ct->chip.irq_mask = irq_gc_mask_clr_bit;
|
|
|
|
ct->chip.irq_unmask = irq_gc_mask_set_bit;
|
|
|
|
ct->chip.irq_set_type = gpio_irq_set_type;
|
|
|
|
|
|
|
|
ct++;
|
|
|
|
ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF;
|
|
|
|
ct->regs.ack = GPIO_EDGE_CAUSE_OFF;
|
|
|
|
ct->type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
|
|
|
|
ct->chip.irq_ack = irq_gc_ack;
|
|
|
|
ct->chip.irq_mask = irq_gc_mask_clr_bit;
|
|
|
|
ct->chip.irq_unmask = irq_gc_mask_set_bit;
|
|
|
|
ct->chip.irq_set_type = gpio_irq_set_type;
|
|
|
|
ct->handler = handle_edge_irq;
|
|
|
|
|
|
|
|
irq_setup_generic_chip(gc, IRQ_MSK(ngpio), IRQ_GC_INIT_MASK_CACHE,
|
|
|
|
IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
|
2010-12-14 04:54:03 -07:00
|
|
|
}
|
|
|
|
|
2008-10-19 17:51:03 -06:00
|
|
|
void orion_gpio_irq_handler(int pinoff)
|
|
|
|
{
|
2010-12-14 04:54:03 -07:00
|
|
|
struct orion_gpio_chip *ochip;
|
2011-03-24 05:35:19 -06:00
|
|
|
u32 cause, type;
|
2010-12-14 04:54:03 -07:00
|
|
|
int i;
|
2008-10-19 17:51:03 -06:00
|
|
|
|
2010-12-14 04:54:03 -07:00
|
|
|
ochip = orion_gpio_chip_find(pinoff);
|
|
|
|
if (ochip == NULL)
|
|
|
|
return;
|
2008-10-19 17:51:03 -06:00
|
|
|
|
2010-12-14 04:54:03 -07:00
|
|
|
cause = readl(GPIO_DATA_IN(ochip)) & readl(GPIO_LEVEL_MASK(ochip));
|
|
|
|
cause |= readl(GPIO_EDGE_CAUSE(ochip)) & readl(GPIO_EDGE_MASK(ochip));
|
2008-10-19 17:51:03 -06:00
|
|
|
|
2010-12-14 04:54:03 -07:00
|
|
|
for (i = 0; i < ochip->chip.ngpio; i++) {
|
|
|
|
int irq;
|
|
|
|
|
|
|
|
irq = ochip->secondary_irq_base + i;
|
|
|
|
|
|
|
|
if (!(cause & (1 << i)))
|
2008-10-19 17:51:03 -06:00
|
|
|
continue;
|
|
|
|
|
2011-03-24 05:35:19 -06:00
|
|
|
type = irqd_get_trigger_type(irq_get_irq_data(irq));
|
|
|
|
if ((type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
|
2008-10-19 17:51:03 -06:00
|
|
|
/* Swap polarity (race with GPIO line) */
|
|
|
|
u32 polarity;
|
|
|
|
|
2010-12-14 04:54:03 -07:00
|
|
|
polarity = readl(GPIO_IN_POL(ochip));
|
|
|
|
polarity ^= 1 << i;
|
|
|
|
writel(polarity, GPIO_IN_POL(ochip));
|
2008-10-19 17:51:03 -06:00
|
|
|
}
|
2011-03-24 05:35:19 -06:00
|
|
|
generic_handle_irq(irq);
|
2008-10-19 17:51:03 -06:00
|
|
|
}
|
|
|
|
}
|