2011-11-17 07:25:09 -07:00
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/*
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* Atheros 724x PCI support
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*
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* Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/pci.h>
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2012-03-14 03:29:23 -06:00
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#include <asm/mach-ath79/pci.h>
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2011-11-17 07:25:09 -07:00
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#define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys))
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#define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
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2012-03-14 03:29:26 -06:00
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#define AR724X_PCI_DEV_BASE 0x14000000
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#define AR724X_PCI_MEM_BASE 0x10000000
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#define AR724X_PCI_MEM_SIZE 0x08000000
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2011-11-17 07:25:09 -07:00
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2012-03-14 03:29:26 -06:00
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static DEFINE_SPINLOCK(ar724x_pci_lock);
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2011-11-17 07:25:09 -07:00
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2012-03-14 03:29:26 -06:00
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static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
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2011-11-17 07:25:09 -07:00
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int size, uint32_t *value)
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{
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unsigned long flags, addr, tval, mask;
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if (devfn)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (where & (size - 1))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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2012-03-14 03:29:26 -06:00
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spin_lock_irqsave(&ar724x_pci_lock, flags);
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2011-11-17 07:25:09 -07:00
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switch (size) {
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case 1:
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addr = where & ~3;
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mask = 0xff000000 >> ((where % 4) * 8);
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2012-03-14 03:29:26 -06:00
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tval = reg_read(AR724X_PCI_DEV_BASE + addr);
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2011-11-17 07:25:09 -07:00
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tval = tval & ~mask;
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*value = (tval >> ((4 - (where % 4))*8));
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break;
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case 2:
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addr = where & ~3;
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mask = 0xffff0000 >> ((where % 4)*8);
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2012-03-14 03:29:26 -06:00
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tval = reg_read(AR724X_PCI_DEV_BASE + addr);
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2011-11-17 07:25:09 -07:00
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tval = tval & ~mask;
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*value = (tval >> ((4 - (where % 4))*8));
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break;
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case 4:
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2012-03-14 03:29:26 -06:00
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*value = reg_read(AR724X_PCI_DEV_BASE + where);
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2011-11-17 07:25:09 -07:00
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break;
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default:
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2012-03-14 03:29:26 -06:00
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spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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2011-11-17 07:25:09 -07:00
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return PCIBIOS_BAD_REGISTER_NUMBER;
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}
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2012-03-14 03:29:26 -06:00
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spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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2011-11-17 07:25:09 -07:00
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return PCIBIOS_SUCCESSFUL;
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}
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2012-03-14 03:29:26 -06:00
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static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
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2011-11-17 07:25:09 -07:00
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int size, uint32_t value)
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{
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unsigned long flags, tval, addr, mask;
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if (devfn)
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return PCIBIOS_DEVICE_NOT_FOUND;
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if (where & (size - 1))
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return PCIBIOS_BAD_REGISTER_NUMBER;
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2012-03-14 03:29:26 -06:00
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spin_lock_irqsave(&ar724x_pci_lock, flags);
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2011-11-17 07:25:09 -07:00
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switch (size) {
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case 1:
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addr = (AR724X_PCI_DEV_BASE + where) & ~3;
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2011-11-17 07:25:09 -07:00
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mask = 0xff000000 >> ((where % 4)*8);
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tval = reg_read(addr);
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tval = tval & ~mask;
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tval |= (value << ((4 - (where % 4))*8)) & mask;
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reg_write(addr, tval);
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break;
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case 2:
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addr = (AR724X_PCI_DEV_BASE + where) & ~3;
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2011-11-17 07:25:09 -07:00
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mask = 0xffff0000 >> ((where % 4)*8);
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tval = reg_read(addr);
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tval = tval & ~mask;
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tval |= (value << ((4 - (where % 4))*8)) & mask;
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reg_write(addr, tval);
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break;
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case 4:
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reg_write((AR724X_PCI_DEV_BASE + where), value);
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2011-11-17 07:25:09 -07:00
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break;
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default:
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2012-03-14 03:29:26 -06:00
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spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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2011-11-17 07:25:09 -07:00
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return PCIBIOS_BAD_REGISTER_NUMBER;
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}
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2012-03-14 03:29:26 -06:00
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spin_unlock_irqrestore(&ar724x_pci_lock, flags);
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2011-11-17 07:25:09 -07:00
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return PCIBIOS_SUCCESSFUL;
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}
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2012-03-14 03:29:26 -06:00
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static struct pci_ops ar724x_pci_ops = {
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.read = ar724x_pci_read,
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.write = ar724x_pci_write,
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2011-11-17 07:25:09 -07:00
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};
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2012-03-14 03:29:26 -06:00
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static struct resource ar724x_io_resource = {
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.name = "PCI IO space",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_IO,
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};
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2012-03-14 03:29:26 -06:00
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static struct resource ar724x_mem_resource = {
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.name = "PCI memory space",
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.start = AR724X_PCI_MEM_BASE,
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.end = AR724X_PCI_MEM_BASE + AR724X_PCI_MEM_SIZE - 1,
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2011-11-17 07:25:09 -07:00
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.flags = IORESOURCE_MEM,
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};
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2012-03-14 03:29:26 -06:00
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static struct pci_controller ar724x_pci_controller = {
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.pci_ops = &ar724x_pci_ops,
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.io_resource = &ar724x_io_resource,
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.mem_resource = &ar724x_mem_resource,
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2011-11-17 07:25:09 -07:00
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};
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2012-03-14 03:29:26 -06:00
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int __init ar724x_pcibios_init(void)
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2011-11-17 07:25:09 -07:00
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{
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2012-03-14 03:29:26 -06:00
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register_pci_controller(&ar724x_pci_controller);
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2011-11-17 07:25:09 -07:00
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return PCIBIOS_SUCCESSFUL;
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}
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