2005-04-16 16:20:36 -06:00
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/*
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* linux/arch/arm/mach-integrator/integrator_cp.c
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*
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* Copyright (C) 2003 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/list.h>
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2005-10-29 12:07:23 -06:00
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#include <linux/platform_device.h>
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2005-04-16 16:20:36 -06:00
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#include <linux/dma-mapping.h>
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#include <linux/string.h>
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2011-12-21 17:26:03 -07:00
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#include <linux/device.h>
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2006-01-07 06:52:45 -07:00
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#include <linux/amba/bus.h>
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#include <linux/amba/kmi.h>
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#include <linux/amba/clcd.h>
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2014-05-22 15:25:14 -06:00
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#include <linux/platform_data/video-clcd-versatile.h>
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2009-09-22 07:29:36 -06:00
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#include <linux/amba/mmci.h>
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2008-09-06 05:10:45 -06:00
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#include <linux/io.h>
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2014-05-29 15:44:27 -06:00
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#include <linux/irqchip.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
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#include <linux/gfp.h>
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2011-05-18 03:51:53 -06:00
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#include <linux/mtd/physmap.h>
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2012-09-06 02:08:24 -06:00
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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2012-09-06 02:08:47 -06:00
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#include <linux/of_platform.h>
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2012-11-01 18:20:43 -06:00
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#include <linux/sys_soc.h>
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2014-02-13 13:35:07 -07:00
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#include <linux/sched_clock.h>
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2005-04-16 16:20:36 -06:00
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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2014-02-13 13:26:24 -07:00
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#include "hardware.h"
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2013-06-15 18:44:27 -06:00
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#include "cm.h"
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2010-05-22 11:18:57 -06:00
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#include "common.h"
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2012-11-04 13:03:02 -07:00
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/* Base address to the CP controller */
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static void __iomem *intcp_con_base;
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2005-04-16 16:20:36 -06:00
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#define INTCP_PA_FLASH_BASE 0x24000000
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#define INTCP_PA_CLCD_BASE 0xc0000000
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#define INTCP_FLASHPROG 0x04
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#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0)
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#define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1)
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/*
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* Logical Physical
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2014-01-24 06:04:28 -07:00
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* f1000000 10000000 Core module registers
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2005-04-16 16:20:36 -06:00
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* f1300000 13000000 Counter/Timer
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* f1400000 14000000 Interrupt controller
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* f1600000 16000000 UART 0
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* f1700000 17000000 UART 1
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* f1a00000 1a000000 Debug LEDs
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2010-01-17 12:59:58 -07:00
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* fc900000 c9000000 GPIO
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* fca00000 ca000000 SIC
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2005-04-16 16:20:36 -06:00
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*/
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2013-02-14 05:50:57 -07:00
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static struct map_desc intcp_io_desc[] __initdata __maybe_unused = {
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2005-10-28 08:19:10 -06:00
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{
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2014-01-24 06:04:28 -07:00
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.virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
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.pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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2005-10-28 08:19:10 -06:00
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.virtual = IO_ADDRESS(INTEGRATOR_CT_BASE),
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.pfn = __phys_to_pfn(INTEGRATOR_CT_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = IO_ADDRESS(INTEGRATOR_IC_BASE),
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.pfn = __phys_to_pfn(INTEGRATOR_IC_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = IO_ADDRESS(INTEGRATOR_UART0_BASE),
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.pfn = __phys_to_pfn(INTEGRATOR_UART0_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = IO_ADDRESS(INTEGRATOR_DBG_BASE),
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.pfn = __phys_to_pfn(INTEGRATOR_DBG_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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2010-01-17 12:59:58 -07:00
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.virtual = IO_ADDRESS(INTEGRATOR_CP_GPIO_BASE),
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.pfn = __phys_to_pfn(INTEGRATOR_CP_GPIO_BASE),
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2005-10-28 08:19:10 -06:00
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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2010-01-17 12:59:58 -07:00
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.virtual = IO_ADDRESS(INTEGRATOR_CP_SIC_BASE),
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.pfn = __phys_to_pfn(INTEGRATOR_CP_SIC_BASE),
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2005-10-28 08:19:10 -06:00
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.length = SZ_4K,
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.type = MT_DEVICE
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}
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2005-04-16 16:20:36 -06:00
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};
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static void __init intcp_map_io(void)
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{
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iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc));
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}
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/*
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* Flash handling.
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*/
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2011-05-18 03:51:53 -06:00
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static int intcp_flash_init(struct platform_device *dev)
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2005-04-16 16:20:36 -06:00
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{
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u32 val;
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2012-11-04 13:03:02 -07:00
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val = readl(intcp_con_base + INTCP_FLASHPROG);
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2005-04-16 16:20:36 -06:00
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val |= CINTEGRATOR_FLASHPROG_FLWREN;
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2012-11-04 13:03:02 -07:00
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writel(val, intcp_con_base + INTCP_FLASHPROG);
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2005-04-16 16:20:36 -06:00
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return 0;
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}
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2011-05-18 03:51:53 -06:00
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static void intcp_flash_exit(struct platform_device *dev)
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2005-04-16 16:20:36 -06:00
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{
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u32 val;
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2012-11-04 13:03:02 -07:00
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val = readl(intcp_con_base + INTCP_FLASHPROG);
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2005-04-16 16:20:36 -06:00
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val &= ~(CINTEGRATOR_FLASHPROG_FLVPPEN|CINTEGRATOR_FLASHPROG_FLWREN);
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2012-11-04 13:03:02 -07:00
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writel(val, intcp_con_base + INTCP_FLASHPROG);
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2005-04-16 16:20:36 -06:00
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}
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2011-05-18 03:51:55 -06:00
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static void intcp_flash_set_vpp(struct platform_device *pdev, int on)
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2005-04-16 16:20:36 -06:00
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{
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u32 val;
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2012-11-04 13:03:02 -07:00
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val = readl(intcp_con_base + INTCP_FLASHPROG);
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2005-04-16 16:20:36 -06:00
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if (on)
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val |= CINTEGRATOR_FLASHPROG_FLVPPEN;
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else
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val &= ~CINTEGRATOR_FLASHPROG_FLVPPEN;
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2012-11-04 13:03:02 -07:00
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writel(val, intcp_con_base + INTCP_FLASHPROG);
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2005-04-16 16:20:36 -06:00
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}
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2011-05-18 03:51:53 -06:00
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static struct physmap_flash_data intcp_flash_data = {
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2005-04-16 16:20:36 -06:00
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.width = 4,
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.init = intcp_flash_init,
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.exit = intcp_flash_exit,
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.set_vpp = intcp_flash_set_vpp,
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};
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/*
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* It seems that the card insertion interrupt remains active after
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* we've acknowledged it. We therefore ignore the interrupt, and
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* rely on reading it from the SIC. This also means that we must
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* clear the latched interrupt.
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*/
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static unsigned int mmc_status(struct device *dev)
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{
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2012-09-14 14:16:39 -06:00
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unsigned int status = readl(__io_address(0xca000000 + 4));
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2012-11-04 13:03:02 -07:00
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writel(8, intcp_con_base + 8);
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2005-04-16 16:20:36 -06:00
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return status & 8;
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}
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2009-09-22 07:29:36 -06:00
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static struct mmci_platform_data mmc_data = {
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2005-04-16 16:20:36 -06:00
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.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
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.status = mmc_status,
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2009-07-09 08:15:12 -06:00
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.gpio_wp = -1,
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.gpio_cd = -1,
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2005-04-16 16:20:36 -06:00
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};
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/*
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* CLCD support
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*/
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/*
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* Ensure VGA is selected.
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*/
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static void cp_clcd_enable(struct clcd_fb *fb)
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{
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2011-01-22 04:02:10 -07:00
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struct fb_var_screeninfo *var = &fb->fb.var;
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2013-08-29 11:41:11 -06:00
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u32 val = CM_CTRL_STATIC1 | CM_CTRL_STATIC2
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| CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1;
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2005-04-30 16:32:38 -06:00
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2011-01-22 04:02:10 -07:00
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if (var->bits_per_pixel <= 8 ||
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(var->bits_per_pixel == 16 && var->green.length == 5))
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/* Pseudocolor, RGB555, BGR555 */
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val |= CM_CTRL_LCDMUXSEL_VGA555_TFT555;
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2005-04-30 16:32:38 -06:00
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else if (fb->fb.var.bits_per_pixel <= 16)
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2011-01-22 04:02:10 -07:00
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/* truecolor RGB565 */
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val |= CM_CTRL_LCDMUXSEL_VGA565_TFT555;
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2005-04-30 16:32:38 -06:00
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else
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val = 0; /* no idea for this, don't trust the docs */
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cm_control(CM_CTRL_LCDMUXSEL_MASK|
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CM_CTRL_LCDEN0|
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CM_CTRL_LCDEN1|
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CM_CTRL_STATIC1|
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CM_CTRL_STATIC2|
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CM_CTRL_STATIC|
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CM_CTRL_n24BITEN, val);
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2005-04-16 16:20:36 -06:00
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}
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static int cp_clcd_setup(struct clcd_fb *fb)
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{
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2011-01-18 13:10:10 -07:00
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fb->panel = versatile_clcd_get_panel("VGA");
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if (!fb->panel)
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return -EINVAL;
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2005-04-16 16:20:36 -06:00
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2011-01-18 13:10:10 -07:00
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return versatile_clcd_setup_dma(fb, SZ_1M);
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2005-04-16 16:20:36 -06:00
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}
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static struct clcd_board clcd_data = {
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.name = "Integrator/CP",
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2011-01-18 13:10:10 -07:00
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.caps = CLCD_CAP_5551 | CLCD_CAP_RGB565 | CLCD_CAP_888,
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2005-04-16 16:20:36 -06:00
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.check = clcdfb_check,
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.decode = clcdfb_decode,
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.enable = cp_clcd_enable,
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.setup = cp_clcd_setup,
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2011-01-18 13:10:10 -07:00
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.mmap = versatile_clcd_mmap_dma,
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.remove = versatile_clcd_remove_dma,
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2005-04-16 16:20:36 -06:00
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};
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2011-01-22 04:37:54 -07:00
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#define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28)
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2014-02-13 13:35:07 -07:00
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static u64 notrace intcp_read_sched_clock(void)
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{
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return readl(REFCOUNTER);
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}
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2011-01-11 06:00:04 -07:00
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static void __init intcp_init_early(void)
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{
|
2014-02-13 13:35:07 -07:00
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sched_clock_register(intcp_read_sched_clock, 32, 24000000);
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2011-01-11 06:00:04 -07:00
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}
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2012-09-06 02:08:24 -06:00
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static void __init intcp_init_irq_of(void)
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2005-04-16 16:20:36 -06:00
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{
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2013-06-15 18:44:27 -06:00
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cm_init();
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2014-05-29 15:44:27 -06:00
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irqchip_init();
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2012-09-06 02:08:24 -06:00
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}
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2005-04-16 16:20:36 -06:00
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2012-09-06 02:08:47 -06:00
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/*
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* For the Device Tree, add in the UART, MMC and CLCD specifics as AUXDATA
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* and enforce the bus names since these are used for clock lookups.
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*/
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static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
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OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
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"rtc", NULL),
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OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
|
2012-11-17 11:24:23 -07:00
|
|
|
"uart0", NULL),
|
2012-09-06 02:08:47 -06:00
|
|
|
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
|
2012-11-17 11:24:23 -07:00
|
|
|
"uart1", NULL),
|
2012-09-06 02:08:47 -06:00
|
|
|
OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
|
|
|
|
"kmi0", NULL),
|
|
|
|
OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
|
|
|
|
"kmi1", NULL),
|
|
|
|
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_MMC_BASE,
|
|
|
|
"mmci", &mmc_data),
|
|
|
|
OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_AACI_BASE,
|
|
|
|
"aaci", &mmc_data),
|
|
|
|
OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE,
|
|
|
|
"clcd", &clcd_data),
|
2012-09-06 02:09:11 -06:00
|
|
|
OF_DEV_AUXDATA("cfi-flash", INTCP_PA_FLASH_BASE,
|
|
|
|
"physmap-flash", &intcp_flash_data),
|
2012-09-06 02:08:47 -06:00
|
|
|
{ /* sentinel */ },
|
|
|
|
};
|
|
|
|
|
2013-10-10 10:24:58 -06:00
|
|
|
static const struct of_device_id intcp_syscon_match[] = {
|
|
|
|
{ .compatible = "arm,integrator-cp-syscon"},
|
|
|
|
{ },
|
|
|
|
};
|
|
|
|
|
2012-09-06 02:08:47 -06:00
|
|
|
static void __init intcp_init_of(void)
|
|
|
|
{
|
2012-11-01 18:20:43 -06:00
|
|
|
struct device_node *cpcon;
|
|
|
|
struct device *parent;
|
|
|
|
struct soc_device *soc_dev;
|
|
|
|
struct soc_device_attribute *soc_dev_attr;
|
|
|
|
u32 intcp_sc_id;
|
|
|
|
|
2014-06-24 06:08:07 -06:00
|
|
|
cpcon = of_find_matching_node(NULL, intcp_syscon_match);
|
2012-11-01 18:20:43 -06:00
|
|
|
if (!cpcon)
|
|
|
|
return;
|
|
|
|
|
|
|
|
intcp_con_base = of_iomap(cpcon, 0);
|
|
|
|
if (!intcp_con_base)
|
|
|
|
return;
|
|
|
|
|
2014-06-24 06:08:07 -06:00
|
|
|
of_platform_populate(NULL, of_default_bus_match_table,
|
|
|
|
intcp_auxdata_lookup, NULL);
|
|
|
|
|
2012-11-01 18:20:43 -06:00
|
|
|
intcp_sc_id = readl(intcp_con_base);
|
|
|
|
|
|
|
|
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
|
|
|
|
if (!soc_dev_attr)
|
|
|
|
return;
|
|
|
|
|
2014-06-24 06:08:07 -06:00
|
|
|
soc_dev_attr->soc_id = "XCV";
|
|
|
|
soc_dev_attr->machine = "Integrator/CP";
|
2012-11-01 18:20:43 -06:00
|
|
|
soc_dev_attr->family = "Integrator";
|
|
|
|
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
|
|
|
|
'A' + (intcp_sc_id & 0x0f));
|
|
|
|
|
|
|
|
soc_dev = soc_device_register(soc_dev_attr);
|
2013-02-24 03:42:27 -07:00
|
|
|
if (IS_ERR(soc_dev)) {
|
2012-11-01 18:20:43 -06:00
|
|
|
kfree(soc_dev_attr->revision);
|
|
|
|
kfree(soc_dev_attr);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
parent = soc_device_to_device(soc_dev);
|
2013-02-24 03:42:27 -07:00
|
|
|
integrator_init_sysfs(parent, intcp_sc_id);
|
2012-09-06 02:08:47 -06:00
|
|
|
}
|
|
|
|
|
2012-09-06 02:08:24 -06:00
|
|
|
static const char * intcp_dt_board_compat[] = {
|
|
|
|
"arm,integrator-cp",
|
|
|
|
NULL,
|
|
|
|
};
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2012-09-06 02:08:24 -06:00
|
|
|
DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)")
|
|
|
|
.reserve = integrator_reserve,
|
|
|
|
.map_io = intcp_map_io,
|
|
|
|
.init_early = intcp_init_early,
|
|
|
|
.init_irq = intcp_init_irq_of,
|
2012-09-06 02:08:47 -06:00
|
|
|
.init_machine = intcp_init_of,
|
2012-09-06 02:08:24 -06:00
|
|
|
.restart = integrator_restart,
|
|
|
|
.dt_compat = intcp_dt_board_compat,
|
|
|
|
MACHINE_END
|