2005-04-16 16:20:36 -06:00
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#ifndef __ASM_SPINLOCK_H
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#define __ASM_SPINLOCK_H
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#if __LINUX_ARM_ARCH__ < 6
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#error SMP not supported on pre-ARMv6 CPUs
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#endif
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2011-05-23 10:16:59 -06:00
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#include <asm/processor.h>
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2011-01-15 09:22:12 -07:00
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/*
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* sev and wfe are ARMv6K extensions. Uniprocessor ARMv6 may not have the K
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* extensions, so when running on UP, we have to patch these instructions away.
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*/
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#define ALT_SMP(smp, up) \
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"9998: " smp "\n" \
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" .pushsection \".alt.smp.init\", \"a\"\n" \
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" .long 9998b\n" \
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" " up "\n" \
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" .popsection\n"
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#ifdef CONFIG_THUMB2_KERNEL
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#define SEV ALT_SMP("sev.w", "nop.w")
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2011-02-09 04:06:59 -07:00
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/*
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* For Thumb-2, special care is needed to ensure that the conditional WFE
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* instruction really does assemble to exactly 4 bytes (as required by
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* the SMP_ON_UP fixup code). By itself "wfene" might cause the
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* assembler to insert a extra (16-bit) IT instruction, depending on the
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* presence or absence of neighbouring conditional instructions.
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*
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* To avoid this unpredictableness, an approprite IT is inserted explicitly:
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* the assembler won't change IT instructions which are explicitly present
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* in the input.
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*/
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#define WFE(cond) ALT_SMP( \
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"it " cond "\n\t" \
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"wfe" cond ".n", \
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\
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"nop.w" \
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)
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2011-01-15 09:22:12 -07:00
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#else
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#define SEV ALT_SMP("sev", "nop")
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#define WFE(cond) ALT_SMP("wfe" cond, "nop")
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#endif
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2010-01-25 11:43:03 -07:00
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static inline void dsb_sev(void)
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{
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#if __LINUX_ARM_ARCH__ >= 7
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__asm__ __volatile__ (
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"dsb\n"
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2011-01-15 09:22:12 -07:00
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SEV
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2010-01-25 11:43:03 -07:00
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);
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2011-01-15 09:22:12 -07:00
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#else
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2010-01-25 11:43:03 -07:00
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__asm__ __volatile__ (
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"mcr p15, 0, %0, c7, c10, 4\n"
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2011-01-15 09:22:12 -07:00
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SEV
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2010-01-25 11:43:03 -07:00
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: : "r" (0)
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);
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#endif
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}
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2005-04-16 16:20:36 -06:00
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/*
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* ARMv6 Spin-locking.
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*
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2005-07-26 12:44:26 -06:00
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* We exclusively read the old value. If it is zero, we may have
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* won the lock, so we try exclusively storing it. A memory barrier
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* is required after we get a lock, and before we release it, because
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* V6 CPUs are assumed to have weakly ordered memory.
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2005-04-16 16:20:36 -06:00
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*
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* Unlocked value: 0
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* Locked value: 1
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*/
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2009-12-02 12:01:25 -07:00
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#define arch_spin_is_locked(x) ((x)->lock != 0)
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#define arch_spin_unlock_wait(lock) \
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do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0)
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2005-04-16 16:20:36 -06:00
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2009-12-02 12:01:25 -07:00
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#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
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2005-04-16 16:20:36 -06:00
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2009-12-02 12:01:25 -07:00
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static inline void arch_spin_lock(arch_spinlock_t *lock)
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2005-04-16 16:20:36 -06:00
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{
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unsigned long tmp;
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__asm__ __volatile__(
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"1: ldrex %0, [%1]\n"
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" teq %0, #0\n"
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2011-01-15 09:22:12 -07:00
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WFE("ne")
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2005-04-16 16:20:36 -06:00
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" strexeq %0, %2, [%1]\n"
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" teqeq %0, #0\n"
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" bne 1b"
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: "=&r" (tmp)
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: "r" (&lock->lock), "r" (1)
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2005-07-26 12:44:26 -06:00
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: "cc");
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smp_mb();
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2005-04-16 16:20:36 -06:00
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}
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2009-12-02 12:01:25 -07:00
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static inline int arch_spin_trylock(arch_spinlock_t *lock)
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2005-04-16 16:20:36 -06:00
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{
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unsigned long tmp;
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__asm__ __volatile__(
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" ldrex %0, [%1]\n"
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" teq %0, #0\n"
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" strexeq %0, %2, [%1]"
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: "=&r" (tmp)
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: "r" (&lock->lock), "r" (1)
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2005-07-26 12:44:26 -06:00
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: "cc");
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if (tmp == 0) {
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smp_mb();
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return 1;
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} else {
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return 0;
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}
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2005-04-16 16:20:36 -06:00
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}
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2009-12-02 12:01:25 -07:00
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static inline void arch_spin_unlock(arch_spinlock_t *lock)
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2005-04-16 16:20:36 -06:00
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{
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2005-07-26 12:44:26 -06:00
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smp_mb();
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2005-04-16 16:20:36 -06:00
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__asm__ __volatile__(
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2005-12-01 08:47:24 -07:00
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" str %1, [%0]\n"
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2005-04-16 16:20:36 -06:00
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:
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: "r" (&lock->lock), "r" (0)
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2005-07-26 12:44:26 -06:00
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: "cc");
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2010-01-25 11:43:03 -07:00
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dsb_sev();
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2005-04-16 16:20:36 -06:00
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}
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/*
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* RWLOCKS
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[PATCH] spinlock consolidation
This patch (written by me and also containing many suggestions of Arjan van
de Ven) does a major cleanup of the spinlock code. It does the following
things:
- consolidates and enhances the spinlock/rwlock debugging code
- simplifies the asm/spinlock.h files
- encapsulates the raw spinlock type and moves generic spinlock
features (such as ->break_lock) into the generic code.
- cleans up the spinlock code hierarchy to get rid of the spaghetti.
Most notably there's now only a single variant of the debugging code,
located in lib/spinlock_debug.c. (previously we had one SMP debugging
variant per architecture, plus a separate generic one for UP builds)
Also, i've enhanced the rwlock debugging facility, it will now track
write-owners. There is new spinlock-owner/CPU-tracking on SMP builds too.
All locks have lockup detection now, which will work for both soft and hard
spin/rwlock lockups.
The arch-level include files now only contain the minimally necessary
subset of the spinlock code - all the rest that can be generalized now
lives in the generic headers:
include/asm-i386/spinlock_types.h | 16
include/asm-x86_64/spinlock_types.h | 16
I have also split up the various spinlock variants into separate files,
making it easier to see which does what. The new layout is:
SMP | UP
----------------------------|-----------------------------------
asm/spinlock_types_smp.h | linux/spinlock_types_up.h
linux/spinlock_types.h | linux/spinlock_types.h
asm/spinlock_smp.h | linux/spinlock_up.h
linux/spinlock_api_smp.h | linux/spinlock_api_up.h
linux/spinlock.h | linux/spinlock.h
/*
* here's the role of the various spinlock/rwlock related include files:
*
* on SMP builds:
*
* asm/spinlock_types.h: contains the raw_spinlock_t/raw_rwlock_t and the
* initializers
*
* linux/spinlock_types.h:
* defines the generic type and initializers
*
* asm/spinlock.h: contains the __raw_spin_*()/etc. lowlevel
* implementations, mostly inline assembly code
*
* (also included on UP-debug builds:)
*
* linux/spinlock_api_smp.h:
* contains the prototypes for the _spin_*() APIs.
*
* linux/spinlock.h: builds the final spin_*() APIs.
*
* on UP builds:
*
* linux/spinlock_type_up.h:
* contains the generic, simplified UP spinlock type.
* (which is an empty structure on non-debug builds)
*
* linux/spinlock_types.h:
* defines the generic type and initializers
*
* linux/spinlock_up.h:
* contains the __raw_spin_*()/etc. version of UP
* builds. (which are NOPs on non-debug, non-preempt
* builds)
*
* (included on UP-non-debug builds:)
*
* linux/spinlock_api_up.h:
* builds the _spin_*() APIs.
*
* linux/spinlock.h: builds the final spin_*() APIs.
*/
All SMP and UP architectures are converted by this patch.
arm, i386, ia64, ppc, ppc64, s390/s390x, x64 was build-tested via
crosscompilers. m32r, mips, sh, sparc, have not been tested yet, but should
be mostly fine.
From: Grant Grundler <grundler@parisc-linux.org>
Booted and lightly tested on a500-44 (64-bit, SMP kernel, dual CPU).
Builds 32-bit SMP kernel (not booted or tested). I did not try to build
non-SMP kernels. That should be trivial to fix up later if necessary.
I converted bit ops atomic_hash lock to raw_spinlock_t. Doing so avoids
some ugly nesting of linux/*.h and asm/*.h files. Those particular locks
are well tested and contained entirely inside arch specific code. I do NOT
expect any new issues to arise with them.
If someone does ever need to use debug/metrics with them, then they will
need to unravel this hairball between spinlocks, atomic ops, and bit ops
that exist only because parisc has exactly one atomic instruction: LDCW
(load and clear word).
From: "Luck, Tony" <tony.luck@intel.com>
ia64 fix
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Arjan van de Ven <arjanv@infradead.org>
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Cc: Matthew Wilcox <willy@debian.org>
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Signed-off-by: Mikael Pettersson <mikpe@csd.uu.se>
Signed-off-by: Benoit Boissinot <benoit.boissinot@ens-lyon.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-10 01:25:56 -06:00
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*
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*
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2005-04-16 16:20:36 -06:00
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* Write locks are easy - we just set bit 31. When unlocking, we can
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* just write zero since the lock is exclusively held.
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*/
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[PATCH] spinlock consolidation
This patch (written by me and also containing many suggestions of Arjan van
de Ven) does a major cleanup of the spinlock code. It does the following
things:
- consolidates and enhances the spinlock/rwlock debugging code
- simplifies the asm/spinlock.h files
- encapsulates the raw spinlock type and moves generic spinlock
features (such as ->break_lock) into the generic code.
- cleans up the spinlock code hierarchy to get rid of the spaghetti.
Most notably there's now only a single variant of the debugging code,
located in lib/spinlock_debug.c. (previously we had one SMP debugging
variant per architecture, plus a separate generic one for UP builds)
Also, i've enhanced the rwlock debugging facility, it will now track
write-owners. There is new spinlock-owner/CPU-tracking on SMP builds too.
All locks have lockup detection now, which will work for both soft and hard
spin/rwlock lockups.
The arch-level include files now only contain the minimally necessary
subset of the spinlock code - all the rest that can be generalized now
lives in the generic headers:
include/asm-i386/spinlock_types.h | 16
include/asm-x86_64/spinlock_types.h | 16
I have also split up the various spinlock variants into separate files,
making it easier to see which does what. The new layout is:
SMP | UP
----------------------------|-----------------------------------
asm/spinlock_types_smp.h | linux/spinlock_types_up.h
linux/spinlock_types.h | linux/spinlock_types.h
asm/spinlock_smp.h | linux/spinlock_up.h
linux/spinlock_api_smp.h | linux/spinlock_api_up.h
linux/spinlock.h | linux/spinlock.h
/*
* here's the role of the various spinlock/rwlock related include files:
*
* on SMP builds:
*
* asm/spinlock_types.h: contains the raw_spinlock_t/raw_rwlock_t and the
* initializers
*
* linux/spinlock_types.h:
* defines the generic type and initializers
*
* asm/spinlock.h: contains the __raw_spin_*()/etc. lowlevel
* implementations, mostly inline assembly code
*
* (also included on UP-debug builds:)
*
* linux/spinlock_api_smp.h:
* contains the prototypes for the _spin_*() APIs.
*
* linux/spinlock.h: builds the final spin_*() APIs.
*
* on UP builds:
*
* linux/spinlock_type_up.h:
* contains the generic, simplified UP spinlock type.
* (which is an empty structure on non-debug builds)
*
* linux/spinlock_types.h:
* defines the generic type and initializers
*
* linux/spinlock_up.h:
* contains the __raw_spin_*()/etc. version of UP
* builds. (which are NOPs on non-debug, non-preempt
* builds)
*
* (included on UP-non-debug builds:)
*
* linux/spinlock_api_up.h:
* builds the _spin_*() APIs.
*
* linux/spinlock.h: builds the final spin_*() APIs.
*/
All SMP and UP architectures are converted by this patch.
arm, i386, ia64, ppc, ppc64, s390/s390x, x64 was build-tested via
crosscompilers. m32r, mips, sh, sparc, have not been tested yet, but should
be mostly fine.
From: Grant Grundler <grundler@parisc-linux.org>
Booted and lightly tested on a500-44 (64-bit, SMP kernel, dual CPU).
Builds 32-bit SMP kernel (not booted or tested). I did not try to build
non-SMP kernels. That should be trivial to fix up later if necessary.
I converted bit ops atomic_hash lock to raw_spinlock_t. Doing so avoids
some ugly nesting of linux/*.h and asm/*.h files. Those particular locks
are well tested and contained entirely inside arch specific code. I do NOT
expect any new issues to arise with them.
If someone does ever need to use debug/metrics with them, then they will
need to unravel this hairball between spinlocks, atomic ops, and bit ops
that exist only because parisc has exactly one atomic instruction: LDCW
(load and clear word).
From: "Luck, Tony" <tony.luck@intel.com>
ia64 fix
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Arjan van de Ven <arjanv@infradead.org>
Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Cc: Matthew Wilcox <willy@debian.org>
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Signed-off-by: Mikael Pettersson <mikpe@csd.uu.se>
Signed-off-by: Benoit Boissinot <benoit.boissinot@ens-lyon.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-10 01:25:56 -06:00
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2009-12-03 12:08:46 -07:00
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static inline void arch_write_lock(arch_rwlock_t *rw)
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2005-04-16 16:20:36 -06:00
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{
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unsigned long tmp;
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__asm__ __volatile__(
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"1: ldrex %0, [%1]\n"
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" teq %0, #0\n"
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2011-01-15 09:22:12 -07:00
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WFE("ne")
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2005-04-16 16:20:36 -06:00
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" strexeq %0, %2, [%1]\n"
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" teq %0, #0\n"
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" bne 1b"
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: "=&r" (tmp)
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: "r" (&rw->lock), "r" (0x80000000)
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2005-07-26 12:44:26 -06:00
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: "cc");
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smp_mb();
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2005-04-16 16:20:36 -06:00
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}
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2009-12-03 12:08:46 -07:00
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static inline int arch_write_trylock(arch_rwlock_t *rw)
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2005-07-24 05:13:40 -06:00
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{
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unsigned long tmp;
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__asm__ __volatile__(
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"1: ldrex %0, [%1]\n"
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" teq %0, #0\n"
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" strexeq %0, %2, [%1]"
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: "=&r" (tmp)
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: "r" (&rw->lock), "r" (0x80000000)
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2005-07-26 12:44:26 -06:00
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: "cc");
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if (tmp == 0) {
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smp_mb();
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return 1;
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} else {
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return 0;
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}
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2005-07-24 05:13:40 -06:00
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}
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2009-12-03 12:08:46 -07:00
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static inline void arch_write_unlock(arch_rwlock_t *rw)
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2005-04-16 16:20:36 -06:00
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{
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2005-07-26 12:44:26 -06:00
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smp_mb();
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2005-04-16 16:20:36 -06:00
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__asm__ __volatile__(
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2005-12-01 08:47:24 -07:00
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"str %1, [%0]\n"
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2005-04-16 16:20:36 -06:00
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:
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: "r" (&rw->lock), "r" (0)
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2005-07-26 12:44:26 -06:00
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: "cc");
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2010-01-25 11:43:03 -07:00
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dsb_sev();
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2005-04-16 16:20:36 -06:00
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}
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2006-05-19 14:55:35 -06:00
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/* write_can_lock - would write_trylock() succeed? */
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2009-12-03 12:08:46 -07:00
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#define arch_write_can_lock(x) ((x)->lock == 0)
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2006-05-19 14:55:35 -06:00
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2005-04-16 16:20:36 -06:00
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/*
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* Read locks are a bit more hairy:
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* - Exclusively load the lock value.
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* - Increment it.
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* - Store new lock value if positive, and we still own this location.
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* If the value is negative, we've already failed.
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* - If we failed to store the value, we want a negative result.
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* - If we failed, try again.
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* Unlocking is similarly hairy. We may have multiple read locks
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* currently active. However, we know we won't have any write
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* locks.
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*/
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2009-12-03 12:08:46 -07:00
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static inline void arch_read_lock(arch_rwlock_t *rw)
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2005-04-16 16:20:36 -06:00
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{
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unsigned long tmp, tmp2;
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__asm__ __volatile__(
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"1: ldrex %0, [%2]\n"
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" adds %0, %0, #1\n"
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" strexpl %1, %0, [%2]\n"
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2011-01-15 09:22:12 -07:00
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WFE("mi")
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2005-04-16 16:20:36 -06:00
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" rsbpls %0, %1, #0\n"
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" bmi 1b"
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: "=&r" (tmp), "=&r" (tmp2)
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: "r" (&rw->lock)
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2005-07-26 12:44:26 -06:00
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: "cc");
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smp_mb();
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2005-04-16 16:20:36 -06:00
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}
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2009-12-03 12:08:46 -07:00
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static inline void arch_read_unlock(arch_rwlock_t *rw)
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2005-04-16 16:20:36 -06:00
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{
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2005-07-24 05:13:40 -06:00
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unsigned long tmp, tmp2;
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|
2005-07-26 12:44:26 -06:00
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smp_mb();
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|
2005-04-16 16:20:36 -06:00
|
|
|
__asm__ __volatile__(
|
|
|
|
"1: ldrex %0, [%2]\n"
|
|
|
|
" sub %0, %0, #1\n"
|
|
|
|
" strex %1, %0, [%2]\n"
|
|
|
|
" teq %1, #0\n"
|
|
|
|
" bne 1b"
|
|
|
|
: "=&r" (tmp), "=&r" (tmp2)
|
|
|
|
: "r" (&rw->lock)
|
2005-07-26 12:44:26 -06:00
|
|
|
: "cc");
|
2010-01-25 11:43:03 -07:00
|
|
|
|
|
|
|
if (tmp == 0)
|
|
|
|
dsb_sev();
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2009-12-03 12:08:46 -07:00
|
|
|
static inline int arch_read_trylock(arch_rwlock_t *rw)
|
2006-08-31 08:09:30 -06:00
|
|
|
{
|
2006-09-06 12:03:14 -06:00
|
|
|
unsigned long tmp, tmp2 = 1;
|
2006-08-31 08:09:30 -06:00
|
|
|
|
|
|
|
__asm__ __volatile__(
|
|
|
|
"1: ldrex %0, [%2]\n"
|
|
|
|
" adds %0, %0, #1\n"
|
|
|
|
" strexpl %1, %0, [%2]\n"
|
|
|
|
: "=&r" (tmp), "+r" (tmp2)
|
|
|
|
: "r" (&rw->lock)
|
|
|
|
: "cc");
|
|
|
|
|
|
|
|
smp_mb();
|
|
|
|
return tmp2 == 0;
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2006-05-19 14:55:35 -06:00
|
|
|
/* read_can_lock - would read_trylock() succeed? */
|
2009-12-03 12:08:46 -07:00
|
|
|
#define arch_read_can_lock(x) ((x)->lock < 0x80000000)
|
2006-05-19 14:55:35 -06:00
|
|
|
|
2009-12-03 12:08:46 -07:00
|
|
|
#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
|
|
|
|
#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
|
2009-04-02 17:59:46 -06:00
|
|
|
|
2009-12-02 12:01:25 -07:00
|
|
|
#define arch_spin_relax(lock) cpu_relax()
|
|
|
|
#define arch_read_relax(lock) cpu_relax()
|
|
|
|
#define arch_write_relax(lock) cpu_relax()
|
2006-10-01 00:27:43 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
#endif /* __ASM_SPINLOCK_H */
|