2005-11-07 14:05:42 -07:00
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/*
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* linux/arch/arm/mach-realview/platsmp.c
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*
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* Copyright (C) 2002 ARM Ltd.
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/smp.h>
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2008-09-06 05:10:45 -06:00
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#include <linux/io.h>
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2005-11-07 14:05:42 -07:00
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2008-08-05 09:14:15 -06:00
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#include <mach/hardware.h>
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2011-04-03 06:01:30 -06:00
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#include <asm/hardware/gic.h>
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2008-02-04 09:39:00 -07:00
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#include <asm/mach-types.h>
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2011-01-19 03:24:56 -07:00
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#include <asm/smp_scu.h>
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2005-11-07 14:05:42 -07:00
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2008-08-05 09:14:15 -06:00
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#include <mach/board-eb.h>
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#include <mach/board-pb11mp.h>
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2009-05-30 06:56:12 -06:00
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#include <mach/board-pbx.h>
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2008-04-18 15:43:08 -06:00
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2008-12-01 07:54:58 -07:00
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#include "core.h"
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2011-01-19 03:24:56 -07:00
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extern void versatile_secondary_startup(void);
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ARM: Fix subtle race in CPU pen_release hotplug code
There is a subtle race in the CPU hotplug code, where a CPU which has
been offlined can online itself before being requested, which results
in things going astray on the next online/offline cycle.
What happens in the normal online/offline/online cycle is:
CPU0 CPU3
requests boot of CPU3
pen_release = 3
flush cache line
checks pen_release, reads 3
starts boot
pen_release = -1
... requests CPU3 offline ...
... dies ...
checks pen_release, reads -1
requests boot of CPU3
pen_release = 3
flush cache line
checks pen_release, reads 3
starts boot
pen_release = -1
However, as the write of -1 of pen_release is not fully flushed back to
memory, and the checking of pen_release is done with caches disabled,
this allows CPU3 the opportunity to read the old value of pen_release:
CPU0 CPU3
requests boot of CPU3
pen_release = 3
flush cache line
checks pen_release, reads 3
starts boot
pen_release = -1
... requests CPU3 offline ...
... dies ...
checks pen_release, reads 3
starts boot
pen_release = -1
requests boot of CPU3
pen_release = 3
flush cache line
Fix this by grouping the write of pen_release along with its cache line
flushing code to ensure that any update to pen_release is always pushed
out to physical memory.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-18 03:53:12 -07:00
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2008-12-01 07:54:58 -07:00
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static void __iomem *scu_base_addr(void)
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{
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if (machine_is_realview_eb_mp())
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return __io_address(REALVIEW_EB11MP_SCU_BASE);
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else if (machine_is_realview_pb11mp())
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return __io_address(REALVIEW_TC11MP_SCU_BASE);
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2009-05-30 06:56:12 -06:00
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else if (machine_is_realview_pbx() &&
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(core_tile_pbx11mp() || core_tile_pbxa9mp()))
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return __io_address(REALVIEW_PBX_TILE_SCU_BASE);
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2008-12-01 07:54:58 -07:00
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else
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return (void __iomem *)0;
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}
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2006-02-16 04:08:09 -07:00
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/*
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* Initialise the CPU possible map early - this describes the CPUs
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* which may be present or become present in the system.
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*/
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void __init smp_init_cpus(void)
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{
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2010-12-02 11:09:37 -07:00
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void __iomem *scu_base = scu_base_addr();
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unsigned int i, ncores;
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2006-02-16 04:08:09 -07:00
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2010-12-02 11:09:37 -07:00
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ncores = scu_base ? scu_get_core_count(scu_base) : 1;
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2005-11-07 14:05:42 -07:00
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/* sanity check */
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2011-10-20 15:04:18 -06:00
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if (ncores > nr_cpu_ids) {
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pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
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ncores, nr_cpu_ids);
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ncores = nr_cpu_ids;
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2005-11-07 14:05:42 -07:00
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}
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2010-12-03 03:42:58 -07:00
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for (i = 0; i < ncores; i++)
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set_cpu_possible(i, true);
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2011-04-03 06:01:30 -06:00
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set_smp_cross_call(gic_raise_softirq);
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2010-12-03 03:42:58 -07:00
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}
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2005-11-07 14:05:42 -07:00
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2010-12-03 04:09:48 -07:00
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void __init platform_smp_prepare_cpus(unsigned int max_cpus)
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2010-12-03 03:42:58 -07:00
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{
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2005-11-07 14:05:42 -07:00
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2010-12-03 04:09:48 -07:00
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scu_enable(scu_base_addr());
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2005-11-07 14:05:42 -07:00
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/*
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2010-12-03 04:09:48 -07:00
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* Write the address of secondary startup into the
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* system-wide flags register. The BootMonitor waits
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* until it receives a soft interrupt, and then the
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* secondary CPU branches to this address.
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2005-11-07 14:05:42 -07:00
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*/
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2011-12-15 07:02:33 -07:00
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__raw_writel(virt_to_phys(versatile_secondary_startup),
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2010-12-03 04:09:48 -07:00
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__io_address(REALVIEW_SYS_FLAGSSET));
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2005-11-07 14:05:42 -07:00
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}
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