2008-10-22 23:26:29 -06:00
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#ifndef _ASM_X86_PARAVIRT_H
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#define _ASM_X86_PARAVIRT_H
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2006-12-06 18:14:07 -07:00
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/* Various instructions on x86 need to be replaced for
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* para-virtualization: those hooks are defined here. */
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[PATCH] i386: PARAVIRT: Hooks to set up initial pagetable
This patch introduces paravirt_ops hooks to control how the kernel's
initial pagetable is set up.
In the case of a native boot, the very early bootstrap code creates a
simple non-PAE pagetable to map the kernel and physical memory. When
the VM subsystem is initialized, it creates a proper pagetable which
respects the PAE mode, large pages, etc.
When booting under a hypervisor, there are many possibilities for what
paging environment the hypervisor establishes for the guest kernel, so
the constructon of the kernel's pagetable depends on the hypervisor.
In the case of Xen, the hypervisor boots the kernel with a fully
constructed pagetable, which is already using PAE if necessary. Also,
Xen requires particular care when constructing pagetables to make sure
all pagetables are always mapped read-only.
In order to make this easier, kernel's initial pagetable construction
has been changed to only allocate and initialize a pagetable page if
there's no page already present in the pagetable. This allows the Xen
paravirt backend to make a copy of the hypervisor-provided pagetable,
allowing the kernel to establish any more mappings it needs while
keeping the existing ones.
A slightly subtle point which is worth highlighting here is that Xen
requires all kernel mappings to share the same pte_t pages between all
pagetables, so that updating a kernel page's mapping in one pagetable
is reflected in all other pagetables. This makes it possible to
allocate a page and attach it to a pagetable without having to
explicitly enumerate that page's mapping in all pagetables.
And:
+From: "Eric W. Biederman" <ebiederm@xmission.com>
If we don't set the leaf page table entries it is quite possible that
will inherit and incorrect page table entry from the initial boot
page table setup in head.S. So we need to redo the effort here,
so we pick up PSE, PGE and the like.
Hypervisors like Xen require that their page tables be read-only,
which is slightly incompatible with our low identity mappings, however
I discussed this with Jeremy he has modified the Xen early set_pte
function to avoid problems in this area.
Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Acked-by: William Irwin <bill.irwin@oracle.com>
Cc: Ingo Molnar <mingo@elte.hu>
2007-05-02 11:27:13 -06:00
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#ifdef CONFIG_PARAVIRT
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2009-02-11 11:20:05 -07:00
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#include <asm/pgtable_types.h>
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2008-01-30 05:32:06 -07:00
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#include <asm/asm.h>
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2006-12-06 18:14:07 -07:00
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2009-04-14 15:29:44 -06:00
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#include <asm/paravirt_types.h>
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x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-28 15:35:05 -07:00
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2006-12-06 18:14:07 -07:00
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#ifndef __ASSEMBLY__
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2007-05-02 11:27:13 -06:00
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#include <linux/types.h>
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2007-05-02 11:27:15 -06:00
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#include <linux/cpumask.h>
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2007-05-02 11:27:15 -06:00
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2007-05-02 11:27:14 -06:00
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static inline int paravirt_enabled(void)
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{
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2007-10-16 12:51:29 -06:00
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return pv_info.paravirt_enabled;
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2007-05-02 11:27:14 -06:00
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}
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2006-12-06 18:14:07 -07:00
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2008-01-30 05:31:02 -07:00
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static inline void load_sp0(struct tss_struct *tss,
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2006-12-06 18:14:07 -07:00
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struct thread_struct *thread)
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{
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2008-01-30 05:31:02 -07:00
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PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
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2006-12-06 18:14:07 -07:00
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}
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/* The paravirtualized CPUID instruction. */
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static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
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unsigned int *ecx, unsigned int *edx)
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{
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2007-10-16 12:51:29 -06:00
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PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
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2006-12-06 18:14:07 -07:00
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}
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/*
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* These special macros can be used to get or set a debugging register
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*/
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2007-05-02 11:27:14 -06:00
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static inline unsigned long paravirt_get_debugreg(int reg)
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{
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2007-10-16 12:51:29 -06:00
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return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
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2007-05-02 11:27:14 -06:00
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}
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#define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
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static inline void set_debugreg(unsigned long val, int reg)
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{
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2007-10-16 12:51:29 -06:00
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PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
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2007-05-02 11:27:14 -06:00
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}
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2006-12-06 18:14:07 -07:00
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2007-05-02 11:27:14 -06:00
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static inline void clts(void)
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{
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2007-10-16 12:51:29 -06:00
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PVOP_VCALL0(pv_cpu_ops.clts);
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2007-05-02 11:27:14 -06:00
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}
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2006-12-06 18:14:07 -07:00
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2007-05-02 11:27:14 -06:00
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static inline unsigned long read_cr0(void)
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{
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2007-10-16 12:51:29 -06:00
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return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
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2007-05-02 11:27:14 -06:00
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}
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2006-12-06 18:14:07 -07:00
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2007-05-02 11:27:14 -06:00
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static inline void write_cr0(unsigned long x)
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{
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2007-10-16 12:51:29 -06:00
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PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
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2007-05-02 11:27:14 -06:00
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}
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static inline unsigned long read_cr2(void)
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{
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2007-10-16 12:51:29 -06:00
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return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
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2007-05-02 11:27:14 -06:00
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}
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static inline void write_cr2(unsigned long x)
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{
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2007-10-16 12:51:29 -06:00
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PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
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2007-05-02 11:27:14 -06:00
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}
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static inline unsigned long read_cr3(void)
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{
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2007-10-16 12:51:29 -06:00
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return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
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2007-05-02 11:27:14 -06:00
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}
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2006-12-06 18:14:07 -07:00
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2007-05-02 11:27:14 -06:00
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static inline void write_cr3(unsigned long x)
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{
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2007-10-16 12:51:29 -06:00
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PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
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2007-05-02 11:27:14 -06:00
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}
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2006-12-06 18:14:07 -07:00
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2007-05-02 11:27:14 -06:00
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static inline unsigned long read_cr4(void)
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{
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2007-10-16 12:51:29 -06:00
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return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
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2007-05-02 11:27:14 -06:00
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}
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static inline unsigned long read_cr4_safe(void)
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{
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2007-10-16 12:51:29 -06:00
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return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
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2007-05-02 11:27:14 -06:00
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}
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2006-12-06 18:14:07 -07:00
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2007-05-02 11:27:14 -06:00
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static inline void write_cr4(unsigned long x)
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{
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2007-10-16 12:51:29 -06:00
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PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
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2007-05-02 11:27:14 -06:00
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}
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2007-05-02 11:27:13 -06:00
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2008-01-30 05:33:19 -07:00
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#ifdef CONFIG_X86_64
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2008-01-30 05:33:19 -07:00
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static inline unsigned long read_cr8(void)
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{
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return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
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}
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static inline void write_cr8(unsigned long x)
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{
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PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
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}
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2008-01-30 05:33:19 -07:00
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#endif
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2008-01-30 05:33:19 -07:00
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2006-12-06 18:14:07 -07:00
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static inline void raw_safe_halt(void)
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{
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2007-10-16 12:51:29 -06:00
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PVOP_VCALL0(pv_irq_ops.safe_halt);
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2006-12-06 18:14:07 -07:00
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}
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static inline void halt(void)
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{
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2007-10-16 12:51:29 -06:00
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PVOP_VCALL0(pv_irq_ops.safe_halt);
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2007-05-02 11:27:14 -06:00
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}
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static inline void wbinvd(void)
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{
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2007-10-16 12:51:29 -06:00
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PVOP_VCALL0(pv_cpu_ops.wbinvd);
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2006-12-06 18:14:07 -07:00
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}
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2007-10-16 12:51:29 -06:00
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#define get_kernel_rpl() (pv_info.kernel_rpl)
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2006-12-06 18:14:07 -07:00
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2007-05-02 11:27:14 -06:00
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static inline u64 paravirt_read_msr(unsigned msr, int *err)
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{
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2007-10-16 12:51:29 -06:00
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return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
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2007-05-02 11:27:14 -06:00
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}
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2009-08-31 01:50:09 -06:00
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static inline int paravirt_rdmsr_regs(u32 *regs)
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{
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return PVOP_CALL1(int, pv_cpu_ops.rdmsr_regs, regs);
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}
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2007-05-02 11:27:14 -06:00
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static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
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{
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2007-10-16 12:51:29 -06:00
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return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
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2007-05-02 11:27:14 -06:00
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}
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2009-08-31 01:50:09 -06:00
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static inline int paravirt_wrmsr_regs(u32 *regs)
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{
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return PVOP_CALL1(int, pv_cpu_ops.wrmsr_regs, regs);
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}
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2007-05-02 11:27:10 -06:00
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/* These should all do BUG_ON(_err), but our headers are too tangled. */
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2008-03-23 02:03:00 -06:00
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#define rdmsr(msr, val1, val2) \
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do { \
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2007-05-02 11:27:14 -06:00
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int _err; \
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u64 _l = paravirt_read_msr(msr, &_err); \
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val1 = (u32)_l; \
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val2 = _l >> 32; \
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2008-03-23 02:03:00 -06:00
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} while (0)
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2006-12-06 18:14:07 -07:00
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2008-03-23 02:03:00 -06:00
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#define wrmsr(msr, val1, val2) \
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do { \
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2007-05-02 11:27:14 -06:00
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paravirt_write_msr(msr, val1, val2); \
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2008-03-23 02:03:00 -06:00
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} while (0)
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2006-12-06 18:14:07 -07:00
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2008-03-23 02:03:00 -06:00
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#define rdmsrl(msr, val) \
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do { \
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2007-05-02 11:27:14 -06:00
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int _err; \
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val = paravirt_read_msr(msr, &_err); \
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2008-03-23 02:03:00 -06:00
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} while (0)
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2006-12-06 18:14:07 -07:00
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2008-03-23 02:03:00 -06:00
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#define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
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#define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
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2006-12-06 18:14:07 -07:00
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/* rdmsr with exception handling */
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2008-03-23 02:03:00 -06:00
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#define rdmsr_safe(msr, a, b) \
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({ \
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2007-05-02 11:27:14 -06:00
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int _err; \
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u64 _l = paravirt_read_msr(msr, &_err); \
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(*a) = (u32)_l; \
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(*b) = _l >> 32; \
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2008-03-23 02:03:00 -06:00
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_err; \
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})
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2006-12-06 18:14:07 -07:00
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2009-08-31 01:50:09 -06:00
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#define rdmsr_safe_regs(regs) paravirt_rdmsr_regs(regs)
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#define wrmsr_safe_regs(regs) paravirt_wrmsr_regs(regs)
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2008-03-22 03:59:28 -06:00
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static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
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{
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int err;
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*p = paravirt_read_msr(msr, &err);
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return err;
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}
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2008-08-22 02:32:50 -06:00
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static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
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{
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2009-08-31 01:50:10 -06:00
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u32 gprs[8] = { 0 };
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2008-08-22 02:32:50 -06:00
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int err;
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2009-08-31 01:50:10 -06:00
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gprs[1] = msr;
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gprs[7] = 0x9c5a203a;
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err = paravirt_rdmsr_regs(gprs);
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*p = gprs[0] | ((u64)gprs[2] << 32);
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2008-08-22 02:32:50 -06:00
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return err;
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}
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2007-05-02 11:27:14 -06:00
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2009-08-31 01:50:10 -06:00
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static inline int wrmsrl_amd_safe(unsigned msr, unsigned long long val)
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{
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u32 gprs[8] = { 0 };
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gprs[0] = (u32)val;
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gprs[1] = msr;
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gprs[2] = val >> 32;
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gprs[7] = 0x9c5a203a;
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return paravirt_wrmsr_regs(gprs);
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}
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2007-05-02 11:27:14 -06:00
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static inline u64 paravirt_read_tsc(void)
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{
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2007-10-16 12:51:29 -06:00
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return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
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2007-05-02 11:27:14 -06:00
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}
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2006-12-06 18:14:07 -07:00
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2008-03-23 02:03:00 -06:00
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#define rdtscl(low) \
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do { \
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2007-05-02 11:27:14 -06:00
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u64 _l = paravirt_read_tsc(); \
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low = (int)_l; \
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2008-03-23 02:03:00 -06:00
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} while (0)
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2006-12-06 18:14:07 -07:00
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2007-05-02 11:27:14 -06:00
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#define rdtscll(val) (val = paravirt_read_tsc())
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2006-12-06 18:14:07 -07:00
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2007-07-17 19:37:04 -06:00
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static inline unsigned long long paravirt_sched_clock(void)
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{
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2007-10-16 12:51:29 -06:00
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return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
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2007-07-17 19:37:04 -06:00
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}
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2007-03-05 01:30:35 -07:00
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2007-05-02 11:27:14 -06:00
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static inline unsigned long long paravirt_read_pmc(int counter)
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{
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2007-10-16 12:51:29 -06:00
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|
return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2006-12-06 18:14:07 -07:00
|
|
|
|
2008-03-23 02:03:00 -06:00
|
|
|
#define rdpmc(counter, low, high) \
|
|
|
|
do { \
|
2007-05-02 11:27:14 -06:00
|
|
|
u64 _l = paravirt_read_pmc(counter); \
|
|
|
|
low = (u32)_l; \
|
|
|
|
high = _l >> 32; \
|
2008-03-23 02:03:00 -06:00
|
|
|
} while (0)
|
2007-05-02 11:27:13 -06:00
|
|
|
|
2008-01-30 05:32:05 -07:00
|
|
|
static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
|
|
|
|
{
|
|
|
|
return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
|
|
|
|
}
|
|
|
|
|
|
|
|
#define rdtscp(low, high, aux) \
|
|
|
|
do { \
|
|
|
|
int __aux; \
|
|
|
|
unsigned long __val = paravirt_rdtscp(&__aux); \
|
|
|
|
(low) = (u32)__val; \
|
|
|
|
(high) = (u32)(__val >> 32); \
|
|
|
|
(aux) = __aux; \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
#define rdtscpll(val, aux) \
|
|
|
|
do { \
|
|
|
|
unsigned long __aux; \
|
|
|
|
val = paravirt_rdtscp(&__aux); \
|
|
|
|
(aux) = __aux; \
|
|
|
|
} while (0)
|
|
|
|
|
2008-07-23 15:21:18 -06:00
|
|
|
static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
|
|
|
|
{
|
|
|
|
PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
|
|
|
|
{
|
|
|
|
PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
|
|
|
|
}
|
|
|
|
|
2007-05-02 11:27:14 -06:00
|
|
|
static inline void load_TR_desc(void)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2008-01-30 05:31:12 -07:00
|
|
|
static inline void load_gdt(const struct desc_ptr *dtr)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2008-01-30 05:31:12 -07:00
|
|
|
static inline void load_idt(const struct desc_ptr *dtr)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
static inline void set_ldt(const void *addr, unsigned entries)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2008-01-30 05:31:12 -07:00
|
|
|
static inline void store_gdt(struct desc_ptr *dtr)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2008-01-30 05:31:12 -07:00
|
|
|
static inline void store_idt(struct desc_ptr *dtr)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
static inline unsigned long paravirt_store_tr(void)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
#define store_tr(tr) ((tr) = paravirt_store_tr())
|
|
|
|
static inline void load_TLS(struct thread_struct *t, unsigned cpu)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2008-01-30 05:31:13 -07:00
|
|
|
|
2008-06-24 22:19:32 -06:00
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
static inline void load_gs_index(unsigned int gs)
|
|
|
|
{
|
|
|
|
PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2008-01-30 05:31:13 -07:00
|
|
|
static inline void write_ldt_entry(struct desc_struct *dt, int entry,
|
|
|
|
const void *desc)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2008-01-30 05:31:13 -07:00
|
|
|
PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2008-01-30 05:31:13 -07:00
|
|
|
|
|
|
|
static inline void write_gdt_entry(struct desc_struct *dt, int entry,
|
|
|
|
void *desc, int type)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2008-01-30 05:31:13 -07:00
|
|
|
PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2008-01-30 05:31:13 -07:00
|
|
|
|
2008-01-30 05:31:12 -07:00
|
|
|
static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2008-01-30 05:31:12 -07:00
|
|
|
PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
static inline void set_iopl_mask(unsigned mask)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2007-05-02 11:27:13 -06:00
|
|
|
|
2006-12-06 18:14:07 -07:00
|
|
|
/* The paravirtualized I/O functions */
|
2008-03-23 02:03:00 -06:00
|
|
|
static inline void slow_down_io(void)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
pv_cpu_ops.io_delay();
|
2006-12-06 18:14:07 -07:00
|
|
|
#ifdef REALLY_SLOW_IO
|
2007-10-16 12:51:29 -06:00
|
|
|
pv_cpu_ops.io_delay();
|
|
|
|
pv_cpu_ops.io_delay();
|
|
|
|
pv_cpu_ops.io_delay();
|
2006-12-06 18:14:07 -07:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2007-02-13 05:26:21 -07:00
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
|
|
|
|
unsigned long start_esp)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
|
|
|
|
phys_apicid, start_eip, start_esp);
|
2007-02-13 05:26:21 -07:00
|
|
|
}
|
|
|
|
#endif
|
2006-12-06 18:14:08 -07:00
|
|
|
|
2007-05-02 11:27:14 -06:00
|
|
|
static inline void paravirt_activate_mm(struct mm_struct *prev,
|
|
|
|
struct mm_struct *next)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void arch_dup_mmap(struct mm_struct *oldmm,
|
|
|
|
struct mm_struct *mm)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void arch_exit_mmap(struct mm_struct *mm)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
|
2007-05-02 11:27:14 -06:00
|
|
|
static inline void __flush_tlb(void)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
static inline void __flush_tlb_global(void)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
static inline void __flush_tlb_single(unsigned long addr)
|
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2006-12-06 18:14:08 -07:00
|
|
|
|
2009-01-10 22:58:09 -07:00
|
|
|
static inline void flush_tlb_others(const struct cpumask *cpumask,
|
|
|
|
struct mm_struct *mm,
|
2007-05-02 11:27:15 -06:00
|
|
|
unsigned long va)
|
|
|
|
{
|
2009-01-10 22:58:09 -07:00
|
|
|
PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
|
2007-05-02 11:27:15 -06:00
|
|
|
}
|
|
|
|
|
2008-06-24 22:19:12 -06:00
|
|
|
static inline int paravirt_pgd_alloc(struct mm_struct *mm)
|
|
|
|
{
|
|
|
|
return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
|
|
|
|
{
|
|
|
|
PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
|
|
|
|
}
|
|
|
|
|
2008-07-30 15:32:27 -06:00
|
|
|
static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2008-03-17 17:37:01 -06:00
|
|
|
PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2008-07-30 15:32:27 -06:00
|
|
|
static inline void paravirt_release_pte(unsigned long pfn)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2008-03-17 17:37:01 -06:00
|
|
|
PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2007-02-13 05:26:21 -07:00
|
|
|
|
2008-07-30 15:32:27 -06:00
|
|
|
static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2008-03-17 17:37:01 -06:00
|
|
|
PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2007-02-13 05:26:21 -07:00
|
|
|
|
2008-07-30 15:32:27 -06:00
|
|
|
static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn,
|
|
|
|
unsigned long start, unsigned long count)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2008-03-17 17:37:01 -06:00
|
|
|
PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
2008-07-30 15:32:27 -06:00
|
|
|
static inline void paravirt_release_pmd(unsigned long pfn)
|
2006-12-06 18:14:08 -07:00
|
|
|
{
|
2008-03-17 17:37:01 -06:00
|
|
|
PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
|
2006-12-06 18:14:08 -07:00
|
|
|
}
|
|
|
|
|
2008-07-30 15:32:27 -06:00
|
|
|
static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
|
2008-03-17 17:37:02 -06:00
|
|
|
{
|
|
|
|
PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
|
|
|
|
}
|
2008-07-30 15:32:27 -06:00
|
|
|
static inline void paravirt_release_pud(unsigned long pfn)
|
2008-03-17 17:37:02 -06:00
|
|
|
{
|
|
|
|
PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
|
|
|
|
}
|
|
|
|
|
2007-05-02 11:27:15 -06:00
|
|
|
#ifdef CONFIG_HIGHPTE
|
|
|
|
static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
|
|
|
|
{
|
|
|
|
unsigned long ret;
|
2007-10-16 12:51:29 -06:00
|
|
|
ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
|
2007-05-02 11:27:15 -06:00
|
|
|
return (void *)ret;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2007-05-02 11:27:14 -06:00
|
|
|
static inline void pte_update(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep)
|
2006-12-06 18:14:08 -07:00
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
|
2006-12-06 18:14:08 -07:00
|
|
|
}
|
|
|
|
|
2007-05-02 11:27:14 -06:00
|
|
|
static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep)
|
2006-12-06 18:14:08 -07:00
|
|
|
{
|
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
|
2006-12-06 18:14:08 -07:00
|
|
|
}
|
|
|
|
|
2008-01-30 05:33:15 -07:00
|
|
|
static inline pte_t __pte(pteval_t val)
|
2006-12-06 18:14:08 -07:00
|
|
|
{
|
2008-01-30 05:33:15 -07:00
|
|
|
pteval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pteval_t) > sizeof(long))
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE2(pteval_t,
|
|
|
|
pv_mmu_ops.make_pte,
|
|
|
|
val, (u64)val >> 32);
|
2008-01-30 05:33:15 -07:00
|
|
|
else
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE1(pteval_t,
|
|
|
|
pv_mmu_ops.make_pte,
|
|
|
|
val);
|
2008-01-30 05:33:15 -07:00
|
|
|
|
2008-01-30 05:32:57 -07:00
|
|
|
return (pte_t) { .pte = ret };
|
2006-12-06 18:14:08 -07:00
|
|
|
}
|
|
|
|
|
2008-01-30 05:33:15 -07:00
|
|
|
static inline pteval_t pte_val(pte_t pte)
|
|
|
|
{
|
|
|
|
pteval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pteval_t) > sizeof(long))
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
|
|
|
|
pte.pte, (u64)pte.pte >> 32);
|
2008-01-30 05:33:15 -07:00
|
|
|
else
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
|
|
|
|
pte.pte);
|
2008-01-30 05:33:15 -07:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2008-01-30 05:33:15 -07:00
|
|
|
static inline pgd_t __pgd(pgdval_t val)
|
2006-12-06 18:14:08 -07:00
|
|
|
{
|
2008-01-30 05:33:15 -07:00
|
|
|
pgdval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pgdval_t) > sizeof(long))
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
|
|
|
|
val, (u64)val >> 32);
|
2008-01-30 05:33:15 -07:00
|
|
|
else
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
|
|
|
|
val);
|
2008-01-30 05:33:15 -07:00
|
|
|
|
|
|
|
return (pgd_t) { ret };
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pgdval_t pgd_val(pgd_t pgd)
|
|
|
|
{
|
|
|
|
pgdval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pgdval_t) > sizeof(long))
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
|
|
|
|
pgd.pgd, (u64)pgd.pgd >> 32);
|
2008-01-30 05:33:15 -07:00
|
|
|
else
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
|
|
|
|
pgd.pgd);
|
2008-01-30 05:33:15 -07:00
|
|
|
|
|
|
|
return ret;
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
|
2008-06-16 05:30:01 -06:00
|
|
|
#define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
|
|
|
|
static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep)
|
|
|
|
{
|
|
|
|
pteval_t ret;
|
|
|
|
|
|
|
|
ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
|
|
|
|
mm, addr, ptep);
|
|
|
|
|
|
|
|
return (pte_t) { .pte = ret };
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep, pte_t pte)
|
|
|
|
{
|
|
|
|
if (sizeof(pteval_t) > sizeof(long))
|
|
|
|
/* 5 arg words */
|
|
|
|
pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
|
|
|
|
else
|
|
|
|
PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
|
|
|
|
mm, addr, ptep, pte.pte);
|
|
|
|
}
|
|
|
|
|
2008-01-30 05:33:15 -07:00
|
|
|
static inline void set_pte(pte_t *ptep, pte_t pte)
|
|
|
|
{
|
|
|
|
if (sizeof(pteval_t) > sizeof(long))
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
|
|
|
|
pte.pte, (u64)pte.pte >> 32);
|
|
|
|
else
|
|
|
|
PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
|
|
|
|
pte.pte);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep, pte_t pte)
|
|
|
|
{
|
|
|
|
if (sizeof(pteval_t) > sizeof(long))
|
|
|
|
/* 5 arg words */
|
|
|
|
pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
|
|
|
|
else
|
|
|
|
PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
|
|
|
|
}
|
|
|
|
|
2008-01-30 05:33:15 -07:00
|
|
|
static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
|
|
|
|
{
|
|
|
|
pmdval_t val = native_pmd_val(pmd);
|
|
|
|
|
|
|
|
if (sizeof(pmdval_t) > sizeof(long))
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
|
|
|
|
else
|
|
|
|
PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
|
|
|
|
}
|
|
|
|
|
2008-01-30 05:33:19 -07:00
|
|
|
#if PAGETABLE_LEVELS >= 3
|
|
|
|
static inline pmd_t __pmd(pmdval_t val)
|
|
|
|
{
|
|
|
|
pmdval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pmdval_t) > sizeof(long))
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
|
|
|
|
val, (u64)val >> 32);
|
2008-01-30 05:33:19 -07:00
|
|
|
else
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
|
|
|
|
val);
|
2008-01-30 05:33:19 -07:00
|
|
|
|
|
|
|
return (pmd_t) { ret };
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pmdval_t pmd_val(pmd_t pmd)
|
|
|
|
{
|
|
|
|
pmdval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pmdval_t) > sizeof(long))
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
|
|
|
|
pmd.pmd, (u64)pmd.pmd >> 32);
|
2008-01-30 05:33:19 -07:00
|
|
|
else
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
|
|
|
|
pmd.pmd);
|
2008-01-30 05:33:19 -07:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void set_pud(pud_t *pudp, pud_t pud)
|
|
|
|
{
|
|
|
|
pudval_t val = native_pud_val(pud);
|
|
|
|
|
|
|
|
if (sizeof(pudval_t) > sizeof(long))
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
|
|
|
|
val, (u64)val >> 32);
|
|
|
|
else
|
|
|
|
PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
|
|
|
|
val);
|
|
|
|
}
|
2008-01-30 05:33:20 -07:00
|
|
|
#if PAGETABLE_LEVELS == 4
|
|
|
|
static inline pud_t __pud(pudval_t val)
|
|
|
|
{
|
|
|
|
pudval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pudval_t) > sizeof(long))
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
|
|
|
|
val, (u64)val >> 32);
|
2008-01-30 05:33:20 -07:00
|
|
|
else
|
2009-01-28 15:35:07 -07:00
|
|
|
ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
|
|
|
|
val);
|
2008-01-30 05:33:20 -07:00
|
|
|
|
|
|
|
return (pud_t) { ret };
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline pudval_t pud_val(pud_t pud)
|
|
|
|
{
|
|
|
|
pudval_t ret;
|
|
|
|
|
|
|
|
if (sizeof(pudval_t) > sizeof(long))
|
2009-01-29 02:51:34 -07:00
|
|
|
ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
|
|
|
|
pud.pud, (u64)pud.pud >> 32);
|
2008-01-30 05:33:20 -07:00
|
|
|
else
|
2009-01-29 02:51:34 -07:00
|
|
|
ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
|
|
|
|
pud.pud);
|
2008-01-30 05:33:20 -07:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
|
|
|
|
{
|
|
|
|
pgdval_t val = native_pgd_val(pgd);
|
|
|
|
|
|
|
|
if (sizeof(pgdval_t) > sizeof(long))
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
|
|
|
|
val, (u64)val >> 32);
|
|
|
|
else
|
|
|
|
PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
|
|
|
|
val);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void pgd_clear(pgd_t *pgdp)
|
|
|
|
{
|
|
|
|
set_pgd(pgdp, __pgd(0));
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void pud_clear(pud_t *pudp)
|
|
|
|
{
|
|
|
|
set_pud(pudp, __pud(0));
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* PAGETABLE_LEVELS == 4 */
|
|
|
|
|
2008-01-30 05:33:19 -07:00
|
|
|
#endif /* PAGETABLE_LEVELS >= 3 */
|
|
|
|
|
2008-01-30 05:33:15 -07:00
|
|
|
#ifdef CONFIG_X86_PAE
|
|
|
|
/* Special-case pte-setting operations for PAE, which can't update a
|
|
|
|
64-bit pte atomically */
|
|
|
|
static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
|
|
|
|
{
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
|
|
|
|
pte.pte, pte.pte >> 32);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep)
|
|
|
|
{
|
|
|
|
PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
|
|
|
|
}
|
2008-01-30 05:33:15 -07:00
|
|
|
|
|
|
|
static inline void pmd_clear(pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
|
|
|
|
}
|
2008-01-30 05:33:15 -07:00
|
|
|
#else /* !CONFIG_X86_PAE */
|
|
|
|
static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
|
|
|
|
{
|
|
|
|
set_pte(ptep, pte);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
|
|
|
|
pte_t *ptep)
|
|
|
|
{
|
|
|
|
set_pte_at(mm, addr, ptep, __pte(0));
|
|
|
|
}
|
2008-01-30 05:33:15 -07:00
|
|
|
|
|
|
|
static inline void pmd_clear(pmd_t *pmdp)
|
|
|
|
{
|
|
|
|
set_pmd(pmdp, __pmd(0));
|
|
|
|
}
|
2008-01-30 05:33:15 -07:00
|
|
|
#endif /* CONFIG_X86_PAE */
|
|
|
|
|
2009-02-18 00:24:03 -07:00
|
|
|
#define __HAVE_ARCH_START_CONTEXT_SWITCH
|
2009-02-18 12:18:57 -07:00
|
|
|
static inline void arch_start_context_switch(struct task_struct *prev)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2009-02-18 12:18:57 -07:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
|
2009-02-18 12:18:57 -07:00
|
|
|
static inline void arch_end_context_switch(struct task_struct *next)
|
2007-05-02 11:27:14 -06:00
|
|
|
{
|
2009-02-18 12:18:57 -07:00
|
|
|
PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
|
2007-02-13 05:26:21 -07:00
|
|
|
#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
|
2007-05-02 11:27:14 -06:00
|
|
|
static inline void arch_enter_lazy_mmu_mode(void)
|
|
|
|
{
|
paravirt: clean up lazy mode handling
Currently, the set_lazy_mode pv_op is overloaded with 5 functions:
1. enter lazy cpu mode
2. leave lazy cpu mode
3. enter lazy mmu mode
4. leave lazy mmu mode
5. flush pending batched operations
This complicates each paravirt backend, since it needs to deal with
all the possible state transitions, handling flushing, etc. In
particular, flushing is quite distinct from the other 4 functions, and
seems to just cause complication.
This patch removes the set_lazy_mode operation, and adds "enter" and
"leave" lazy mode operations on mmu_ops and cpu_ops. All the logic
associated with enter and leaving lazy states is now in common code
(basically BUG_ONs to make sure that no mode is current when entering
a lazy mode, and make sure that the mode is current when leaving).
Also, flush is handled in a common way, by simply leaving and
re-entering the lazy mode.
The result is that the Xen, lguest and VMI lazy mode implementations
are much simpler.
Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Zach Amsden <zach@vmware.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Avi Kivity <avi@qumranet.com>
Cc: Anthony Liguory <aliguori@us.ibm.com>
Cc: "Glauber de Oliveira Costa" <glommer@gmail.com>
Cc: Jun Nakajima <jun.nakajima@intel.com>
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void arch_leave_lazy_mmu_mode(void)
|
|
|
|
{
|
paravirt: clean up lazy mode handling
Currently, the set_lazy_mode pv_op is overloaded with 5 functions:
1. enter lazy cpu mode
2. leave lazy cpu mode
3. enter lazy mmu mode
4. leave lazy mmu mode
5. flush pending batched operations
This complicates each paravirt backend, since it needs to deal with
all the possible state transitions, handling flushing, etc. In
particular, flushing is quite distinct from the other 4 functions, and
seems to just cause complication.
This patch removes the set_lazy_mode operation, and adds "enter" and
"leave" lazy mode operations on mmu_ops and cpu_ops. All the logic
associated with enter and leaving lazy states is now in common code
(basically BUG_ONs to make sure that no mode is current when entering
a lazy mode, and make sure that the mode is current when leaving).
Also, flush is handled in a common way, by simply leaving and
re-entering the lazy mode.
The result is that the Xen, lguest and VMI lazy mode implementations
are much simpler.
Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Zach Amsden <zach@vmware.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Avi Kivity <avi@qumranet.com>
Cc: Anthony Liguory <aliguori@us.ibm.com>
Cc: "Glauber de Oliveira Costa" <glommer@gmail.com>
Cc: Jun Nakajima <jun.nakajima@intel.com>
2007-10-16 12:51:29 -06:00
|
|
|
PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
|
2007-05-02 11:27:14 -06:00
|
|
|
}
|
|
|
|
|
2009-02-12 11:02:56 -07:00
|
|
|
void arch_flush_lazy_mmu_mode(void);
|
2007-02-13 05:26:21 -07:00
|
|
|
|
2008-06-17 12:42:01 -06:00
|
|
|
static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
|
2009-04-09 11:55:33 -06:00
|
|
|
phys_addr_t phys, pgprot_t flags)
|
2008-06-17 12:42:01 -06:00
|
|
|
{
|
|
|
|
pv_mmu_ops.set_fixmap(idx, phys, flags);
|
|
|
|
}
|
|
|
|
|
x86: Fix performance regression caused by paravirt_ops on native kernels
Xiaohui Xin and some other folks at Intel have been looking into what's
behind the performance hit of paravirt_ops when running native.
It appears that the hit is entirely due to the paravirtualized
spinlocks introduced by:
| commit 8efcbab674de2bee45a2e4cdf97de16b8e609ac8
| Date: Mon Jul 7 12:07:51 2008 -0700
|
| paravirt: introduce a "lock-byte" spinlock implementation
The extra call/return in the spinlock path is somehow
causing an increase in the cycles/instruction of somewhere around 2-7%
(seems to vary quite a lot from test to test). The working theory is
that the CPU's pipeline is getting upset about the
call->call->locked-op->return->return, and seems to be failing to
speculate (though I haven't seen anything definitive about the precise
reasons). This doesn't entirely make sense, because the performance
hit is also visible on unlock and other operations which don't involve
locked instructions. But spinlock operations clearly swamp all the
other pvops operations, even though I can't imagine that they're
nearly as common (there's only a .05% increase in instructions
executed).
If I disable just the pv-spinlock calls, my tests show that pvops is
identical to non-pvops performance on native (my measurements show that
it is actually about .1% faster, but Xiaohui shows a .05% slowdown).
Summary of results, averaging 10 runs of the "mmperf" test, using a
no-pvops build as baseline:
nopv Pv-nospin Pv-spin
CPU cycles 100.00% 99.89% 102.18%
instructions 100.00% 100.10% 100.15%
CPI 100.00% 99.79% 102.03%
cache ref 100.00% 100.84% 100.28%
cache miss 100.00% 90.47% 88.56%
cache miss rate 100.00% 89.72% 88.31%
branches 100.00% 99.93% 100.04%
branch miss 100.00% 103.66% 107.72%
branch miss rt 100.00% 103.73% 107.67%
wallclock 100.00% 99.90% 102.20%
The clear effect here is that the 2% increase in CPI is
directly reflected in the final wallclock time.
(The other interesting effect is that the more ops are
out of line calls via pvops, the lower the cache access
and miss rates. Not too surprising, but it suggests that
the non-pvops kernel is over-inlined. On the flipside,
the branch misses go up correspondingly...)
So, what's the fix?
Paravirt patching turns all the pvops calls into direct calls, so
_spin_lock etc do end up having direct calls. For example, the compiler
generated code for paravirtualized _spin_lock is:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq *0xffffffff805a5b30
<_spin_lock+22>: retq
The indirect call will get patched to:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq <__ticket_spin_lock>
<_spin_lock+20>: nop; nop /* or whatever 2-byte nop */
<_spin_lock+22>: retq
One possibility is to inline _spin_lock, etc, when building an
optimised kernel (ie, when there's no spinlock/preempt
instrumentation/debugging enabled). That will remove the outer
call/return pair, returning the instruction stream to a single
call/return, which will presumably execute the same as the non-pvops
case. The downsides arel 1) it will replicate the
preempt_disable/enable code at eack lock/unlock callsite; this code is
fairly small, but not nothing; and 2) the spinlock definitions are
already a very heavily tangled mass of #ifdefs and other preprocessor
magic, and making any changes will be non-trivial.
The other obvious answer is to disable pv-spinlocks. Making them a
separate config option is fairly easy, and it would be trivial to
enable them only when Xen is enabled (as the only non-default user).
But it doesn't really address the common case of a distro build which
is going to have Xen support enabled, and leaves the open question of
whether the native performance cost of pv-spinlocks is worth the
performance improvement on a loaded Xen system (10% saving of overall
system CPU when guests block rather than spin). Still it is a
reasonable short-term workaround.
[ Impact: fix pvops performance regression when running native ]
Analysed-by: "Xin Xiaohui" <xiaohui.xin@intel.com>
Analysed-by: "Li Xin" <xin.li@intel.com>
Analysed-by: "Nakajima Jun" <jun.nakajima@intel.com>
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Cc: Nick Piggin <npiggin@suse.de>
Cc: Xen-devel <xen-devel@lists.xensource.com>
LKML-Reference: <4A0B62F7.5030802@goop.org>
[ fixed the help text ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-05-13 18:16:55 -06:00
|
|
|
#if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
|
2008-07-09 06:33:33 -06:00
|
|
|
|
x86/paravirt: add hooks for spinlock operations
Ticket spinlocks have absolutely ghastly worst-case performance
characteristics in a virtual environment. If there is any contention
for physical CPUs (ie, there are more runnable vcpus than cpus), then
ticket locks can cause the system to end up spending 90+% of its time
spinning.
The problem is that (v)cpus waiting on a ticket spinlock will be
granted access to the lock in strict order they got their tickets. If
the hypervisor scheduler doesn't give the vcpus time in that order,
they will burn timeslices waiting for the scheduler to give the right
vcpu some time. In the worst case it could take O(n^2) vcpu scheduler
timeslices for everyone waiting on the lock to get it, not counting
new cpus trying to take the lock while the log-jam is sorted out.
These hooks allow a paravirt backend to replace the spinlock
implementation.
At the very least, this could revert the implementation back to the
old lock algorithm, which allows the next scheduled vcpu to take the
lock, and has basically fairly good performance.
It also allows the spinlocks to take advantages of the hypervisor
features to make locks more efficient (spin and block, for example).
The cost to native execution is an extra direct call when using a
spinlock function. There's no overhead if CONFIG_PARAVIRT is turned
off.
The lock structure is fixed at a single "unsigned int", initialized to
zero, but the spinlock implementation can use it as it wishes.
Thanks to Thomas Friebel's Xen Summit talk "Preventing Guests from
Spinning Around" for pointing out this problem.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Christoph Lameter <clameter@linux-foundation.org>
Cc: Petr Tesarik <ptesarik@suse.cz>
Cc: Virtualization <virtualization@lists.linux-foundation.org>
Cc: Xen devel <xen-devel@lists.xensource.com>
Cc: Thomas Friebel <thomas.friebel@amd.com>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-07 13:07:50 -06:00
|
|
|
static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
|
|
|
|
{
|
|
|
|
return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
|
|
|
|
{
|
|
|
|
return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
|
|
|
|
}
|
2009-02-08 15:39:58 -07:00
|
|
|
#define __raw_spin_is_contended __raw_spin_is_contended
|
x86/paravirt: add hooks for spinlock operations
Ticket spinlocks have absolutely ghastly worst-case performance
characteristics in a virtual environment. If there is any contention
for physical CPUs (ie, there are more runnable vcpus than cpus), then
ticket locks can cause the system to end up spending 90+% of its time
spinning.
The problem is that (v)cpus waiting on a ticket spinlock will be
granted access to the lock in strict order they got their tickets. If
the hypervisor scheduler doesn't give the vcpus time in that order,
they will burn timeslices waiting for the scheduler to give the right
vcpu some time. In the worst case it could take O(n^2) vcpu scheduler
timeslices for everyone waiting on the lock to get it, not counting
new cpus trying to take the lock while the log-jam is sorted out.
These hooks allow a paravirt backend to replace the spinlock
implementation.
At the very least, this could revert the implementation back to the
old lock algorithm, which allows the next scheduled vcpu to take the
lock, and has basically fairly good performance.
It also allows the spinlocks to take advantages of the hypervisor
features to make locks more efficient (spin and block, for example).
The cost to native execution is an extra direct call when using a
spinlock function. There's no overhead if CONFIG_PARAVIRT is turned
off.
The lock structure is fixed at a single "unsigned int", initialized to
zero, but the spinlock implementation can use it as it wishes.
Thanks to Thomas Friebel's Xen Summit talk "Preventing Guests from
Spinning Around" for pointing out this problem.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Christoph Lameter <clameter@linux-foundation.org>
Cc: Petr Tesarik <ptesarik@suse.cz>
Cc: Virtualization <virtualization@lists.linux-foundation.org>
Cc: Xen devel <xen-devel@lists.xensource.com>
Cc: Thomas Friebel <thomas.friebel@amd.com>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-07 13:07:50 -06:00
|
|
|
|
|
|
|
static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
|
|
|
|
{
|
2008-07-17 15:22:34 -06:00
|
|
|
PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
|
x86/paravirt: add hooks for spinlock operations
Ticket spinlocks have absolutely ghastly worst-case performance
characteristics in a virtual environment. If there is any contention
for physical CPUs (ie, there are more runnable vcpus than cpus), then
ticket locks can cause the system to end up spending 90+% of its time
spinning.
The problem is that (v)cpus waiting on a ticket spinlock will be
granted access to the lock in strict order they got their tickets. If
the hypervisor scheduler doesn't give the vcpus time in that order,
they will burn timeslices waiting for the scheduler to give the right
vcpu some time. In the worst case it could take O(n^2) vcpu scheduler
timeslices for everyone waiting on the lock to get it, not counting
new cpus trying to take the lock while the log-jam is sorted out.
These hooks allow a paravirt backend to replace the spinlock
implementation.
At the very least, this could revert the implementation back to the
old lock algorithm, which allows the next scheduled vcpu to take the
lock, and has basically fairly good performance.
It also allows the spinlocks to take advantages of the hypervisor
features to make locks more efficient (spin and block, for example).
The cost to native execution is an extra direct call when using a
spinlock function. There's no overhead if CONFIG_PARAVIRT is turned
off.
The lock structure is fixed at a single "unsigned int", initialized to
zero, but the spinlock implementation can use it as it wishes.
Thanks to Thomas Friebel's Xen Summit talk "Preventing Guests from
Spinning Around" for pointing out this problem.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Christoph Lameter <clameter@linux-foundation.org>
Cc: Petr Tesarik <ptesarik@suse.cz>
Cc: Virtualization <virtualization@lists.linux-foundation.org>
Cc: Xen devel <xen-devel@lists.xensource.com>
Cc: Thomas Friebel <thomas.friebel@amd.com>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-07 13:07:50 -06:00
|
|
|
}
|
|
|
|
|
2008-08-19 14:19:36 -06:00
|
|
|
static __always_inline void __raw_spin_lock_flags(struct raw_spinlock *lock,
|
|
|
|
unsigned long flags)
|
|
|
|
{
|
|
|
|
PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
|
|
|
|
}
|
|
|
|
|
x86/paravirt: add hooks for spinlock operations
Ticket spinlocks have absolutely ghastly worst-case performance
characteristics in a virtual environment. If there is any contention
for physical CPUs (ie, there are more runnable vcpus than cpus), then
ticket locks can cause the system to end up spending 90+% of its time
spinning.
The problem is that (v)cpus waiting on a ticket spinlock will be
granted access to the lock in strict order they got their tickets. If
the hypervisor scheduler doesn't give the vcpus time in that order,
they will burn timeslices waiting for the scheduler to give the right
vcpu some time. In the worst case it could take O(n^2) vcpu scheduler
timeslices for everyone waiting on the lock to get it, not counting
new cpus trying to take the lock while the log-jam is sorted out.
These hooks allow a paravirt backend to replace the spinlock
implementation.
At the very least, this could revert the implementation back to the
old lock algorithm, which allows the next scheduled vcpu to take the
lock, and has basically fairly good performance.
It also allows the spinlocks to take advantages of the hypervisor
features to make locks more efficient (spin and block, for example).
The cost to native execution is an extra direct call when using a
spinlock function. There's no overhead if CONFIG_PARAVIRT is turned
off.
The lock structure is fixed at a single "unsigned int", initialized to
zero, but the spinlock implementation can use it as it wishes.
Thanks to Thomas Friebel's Xen Summit talk "Preventing Guests from
Spinning Around" for pointing out this problem.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Christoph Lameter <clameter@linux-foundation.org>
Cc: Petr Tesarik <ptesarik@suse.cz>
Cc: Virtualization <virtualization@lists.linux-foundation.org>
Cc: Xen devel <xen-devel@lists.xensource.com>
Cc: Thomas Friebel <thomas.friebel@amd.com>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-07 13:07:50 -06:00
|
|
|
static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
|
|
|
|
{
|
|
|
|
return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
|
|
|
|
{
|
2008-07-17 15:22:34 -06:00
|
|
|
PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
|
x86/paravirt: add hooks for spinlock operations
Ticket spinlocks have absolutely ghastly worst-case performance
characteristics in a virtual environment. If there is any contention
for physical CPUs (ie, there are more runnable vcpus than cpus), then
ticket locks can cause the system to end up spending 90+% of its time
spinning.
The problem is that (v)cpus waiting on a ticket spinlock will be
granted access to the lock in strict order they got their tickets. If
the hypervisor scheduler doesn't give the vcpus time in that order,
they will burn timeslices waiting for the scheduler to give the right
vcpu some time. In the worst case it could take O(n^2) vcpu scheduler
timeslices for everyone waiting on the lock to get it, not counting
new cpus trying to take the lock while the log-jam is sorted out.
These hooks allow a paravirt backend to replace the spinlock
implementation.
At the very least, this could revert the implementation back to the
old lock algorithm, which allows the next scheduled vcpu to take the
lock, and has basically fairly good performance.
It also allows the spinlocks to take advantages of the hypervisor
features to make locks more efficient (spin and block, for example).
The cost to native execution is an extra direct call when using a
spinlock function. There's no overhead if CONFIG_PARAVIRT is turned
off.
The lock structure is fixed at a single "unsigned int", initialized to
zero, but the spinlock implementation can use it as it wishes.
Thanks to Thomas Friebel's Xen Summit talk "Preventing Guests from
Spinning Around" for pointing out this problem.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Christoph Lameter <clameter@linux-foundation.org>
Cc: Petr Tesarik <ptesarik@suse.cz>
Cc: Virtualization <virtualization@lists.linux-foundation.org>
Cc: Xen devel <xen-devel@lists.xensource.com>
Cc: Thomas Friebel <thomas.friebel@amd.com>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-07 13:07:50 -06:00
|
|
|
}
|
|
|
|
|
2008-07-09 06:33:33 -06:00
|
|
|
#endif
|
|
|
|
|
2008-01-30 05:32:07 -07:00
|
|
|
#ifdef CONFIG_X86_32
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-28 15:35:05 -07:00
|
|
|
#define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
|
|
|
|
#define PV_RESTORE_REGS "popl %edx; popl %ecx;"
|
|
|
|
|
|
|
|
/* save and restore all caller-save registers, except return value */
|
2009-01-31 00:17:23 -07:00
|
|
|
#define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
|
|
|
|
#define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-28 15:35:05 -07:00
|
|
|
|
2008-01-30 05:32:07 -07:00
|
|
|
#define PV_FLAGS_ARG "0"
|
|
|
|
#define PV_EXTRA_CLOBBERS
|
|
|
|
#define PV_VEXTRA_CLOBBERS
|
|
|
|
#else
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-28 15:35:05 -07:00
|
|
|
/* save and restore all caller-save registers, except return value */
|
|
|
|
#define PV_SAVE_ALL_CALLER_REGS \
|
|
|
|
"push %rcx;" \
|
|
|
|
"push %rdx;" \
|
|
|
|
"push %rsi;" \
|
|
|
|
"push %rdi;" \
|
|
|
|
"push %r8;" \
|
|
|
|
"push %r9;" \
|
|
|
|
"push %r10;" \
|
|
|
|
"push %r11;"
|
|
|
|
#define PV_RESTORE_ALL_CALLER_REGS \
|
|
|
|
"pop %r11;" \
|
|
|
|
"pop %r10;" \
|
|
|
|
"pop %r9;" \
|
|
|
|
"pop %r8;" \
|
|
|
|
"pop %rdi;" \
|
|
|
|
"pop %rsi;" \
|
|
|
|
"pop %rdx;" \
|
|
|
|
"pop %rcx;"
|
|
|
|
|
2008-01-30 05:32:07 -07:00
|
|
|
/* We save some registers, but all of them, that's too much. We clobber all
|
|
|
|
* caller saved registers but the argument parameter */
|
|
|
|
#define PV_SAVE_REGS "pushq %%rdi;"
|
|
|
|
#define PV_RESTORE_REGS "popq %%rdi;"
|
2008-07-08 16:07:12 -06:00
|
|
|
#define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
|
|
|
|
#define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
|
2008-01-30 05:32:07 -07:00
|
|
|
#define PV_FLAGS_ARG "D"
|
|
|
|
#endif
|
|
|
|
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-28 15:35:05 -07:00
|
|
|
/*
|
|
|
|
* Generate a thunk around a function which saves all caller-save
|
|
|
|
* registers except for the return value. This allows C functions to
|
|
|
|
* be called from assembler code where fewer than normal registers are
|
|
|
|
* available. It may also help code generation around calls from C
|
|
|
|
* code if the common case doesn't use many registers.
|
|
|
|
*
|
|
|
|
* When a callee is wrapped in a thunk, the caller can assume that all
|
|
|
|
* arg regs and all scratch registers are preserved across the
|
|
|
|
* call. The return value in rax/eax will not be saved, even for void
|
|
|
|
* functions.
|
|
|
|
*/
|
|
|
|
#define PV_CALLEE_SAVE_REGS_THUNK(func) \
|
|
|
|
extern typeof(func) __raw_callee_save_##func; \
|
|
|
|
static void *__##func##__ __used = func; \
|
|
|
|
\
|
|
|
|
asm(".pushsection .text;" \
|
|
|
|
"__raw_callee_save_" #func ": " \
|
|
|
|
PV_SAVE_ALL_CALLER_REGS \
|
|
|
|
"call " #func ";" \
|
|
|
|
PV_RESTORE_ALL_CALLER_REGS \
|
|
|
|
"ret;" \
|
|
|
|
".popsection")
|
|
|
|
|
|
|
|
/* Get a reference to a callee-save function */
|
|
|
|
#define PV_CALLEE_SAVE(func) \
|
|
|
|
((struct paravirt_callee_save) { __raw_callee_save_##func })
|
|
|
|
|
|
|
|
/* Promise that "func" already uses the right calling convention */
|
|
|
|
#define __PV_IS_CALLEE_SAVE(func) \
|
|
|
|
((struct paravirt_callee_save) { func })
|
|
|
|
|
2006-12-06 18:14:08 -07:00
|
|
|
static inline unsigned long __raw_local_save_flags(void)
|
|
|
|
{
|
2009-10-12 17:32:43 -06:00
|
|
|
return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
|
2006-12-06 18:14:08 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void raw_local_irq_restore(unsigned long f)
|
|
|
|
{
|
2009-10-12 17:32:43 -06:00
|
|
|
PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
|
2006-12-06 18:14:08 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void raw_local_irq_disable(void)
|
|
|
|
{
|
2009-10-12 17:32:43 -06:00
|
|
|
PVOP_VCALLEE0(pv_irq_ops.irq_disable);
|
2006-12-06 18:14:08 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline void raw_local_irq_enable(void)
|
|
|
|
{
|
2009-10-12 17:32:43 -06:00
|
|
|
PVOP_VCALLEE0(pv_irq_ops.irq_enable);
|
2006-12-06 18:14:08 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline unsigned long __raw_local_irq_save(void)
|
|
|
|
{
|
|
|
|
unsigned long f;
|
|
|
|
|
2007-05-02 11:27:14 -06:00
|
|
|
f = __raw_local_save_flags();
|
|
|
|
raw_local_irq_disable();
|
2006-12-06 18:14:08 -07:00
|
|
|
return f;
|
|
|
|
}
|
|
|
|
|
x86/paravirt: add hooks for spinlock operations
Ticket spinlocks have absolutely ghastly worst-case performance
characteristics in a virtual environment. If there is any contention
for physical CPUs (ie, there are more runnable vcpus than cpus), then
ticket locks can cause the system to end up spending 90+% of its time
spinning.
The problem is that (v)cpus waiting on a ticket spinlock will be
granted access to the lock in strict order they got their tickets. If
the hypervisor scheduler doesn't give the vcpus time in that order,
they will burn timeslices waiting for the scheduler to give the right
vcpu some time. In the worst case it could take O(n^2) vcpu scheduler
timeslices for everyone waiting on the lock to get it, not counting
new cpus trying to take the lock while the log-jam is sorted out.
These hooks allow a paravirt backend to replace the spinlock
implementation.
At the very least, this could revert the implementation back to the
old lock algorithm, which allows the next scheduled vcpu to take the
lock, and has basically fairly good performance.
It also allows the spinlocks to take advantages of the hypervisor
features to make locks more efficient (spin and block, for example).
The cost to native execution is an extra direct call when using a
spinlock function. There's no overhead if CONFIG_PARAVIRT is turned
off.
The lock structure is fixed at a single "unsigned int", initialized to
zero, but the spinlock implementation can use it as it wishes.
Thanks to Thomas Friebel's Xen Summit talk "Preventing Guests from
Spinning Around" for pointing out this problem.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Christoph Lameter <clameter@linux-foundation.org>
Cc: Petr Tesarik <ptesarik@suse.cz>
Cc: Virtualization <virtualization@lists.linux-foundation.org>
Cc: Xen devel <xen-devel@lists.xensource.com>
Cc: Thomas Friebel <thomas.friebel@amd.com>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-07 13:07:50 -06:00
|
|
|
|
2007-05-02 11:27:14 -06:00
|
|
|
/* Make sure as little as possible of this mess escapes. */
|
2007-05-02 11:27:14 -06:00
|
|
|
#undef PARAVIRT_CALL
|
2007-05-02 11:27:15 -06:00
|
|
|
#undef __PVOP_CALL
|
|
|
|
#undef __PVOP_VCALL
|
2007-05-02 11:27:14 -06:00
|
|
|
#undef PVOP_VCALL0
|
|
|
|
#undef PVOP_CALL0
|
|
|
|
#undef PVOP_VCALL1
|
|
|
|
#undef PVOP_CALL1
|
|
|
|
#undef PVOP_VCALL2
|
|
|
|
#undef PVOP_CALL2
|
|
|
|
#undef PVOP_VCALL3
|
|
|
|
#undef PVOP_CALL3
|
|
|
|
#undef PVOP_VCALL4
|
|
|
|
#undef PVOP_CALL4
|
2006-12-06 18:14:08 -07:00
|
|
|
|
2009-08-20 05:19:57 -06:00
|
|
|
extern void default_banner(void);
|
|
|
|
|
2006-12-06 18:14:07 -07:00
|
|
|
#else /* __ASSEMBLY__ */
|
|
|
|
|
2008-01-30 05:32:06 -07:00
|
|
|
#define _PVSITE(ptype, clobbers, ops, word, algn) \
|
2006-12-06 18:14:08 -07:00
|
|
|
771:; \
|
|
|
|
ops; \
|
|
|
|
772:; \
|
|
|
|
.pushsection .parainstructions,"a"; \
|
2008-01-30 05:32:06 -07:00
|
|
|
.align algn; \
|
|
|
|
word 771b; \
|
2006-12-06 18:14:08 -07:00
|
|
|
.byte ptype; \
|
|
|
|
.byte 772b-771b; \
|
|
|
|
.short clobbers; \
|
|
|
|
.popsection
|
|
|
|
|
2008-01-30 05:32:06 -07:00
|
|
|
|
2009-01-28 15:35:04 -07:00
|
|
|
#define COND_PUSH(set, mask, reg) \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-28 15:35:05 -07:00
|
|
|
.if ((~(set)) & mask); push %reg; .endif
|
2009-01-28 15:35:04 -07:00
|
|
|
#define COND_POP(set, mask, reg) \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-28 15:35:05 -07:00
|
|
|
.if ((~(set)) & mask); pop %reg; .endif
|
2009-01-28 15:35:04 -07:00
|
|
|
|
2008-01-30 05:32:06 -07:00
|
|
|
#ifdef CONFIG_X86_64
|
2009-01-28 15:35:04 -07:00
|
|
|
|
|
|
|
#define PV_SAVE_REGS(set) \
|
|
|
|
COND_PUSH(set, CLBR_RAX, rax); \
|
|
|
|
COND_PUSH(set, CLBR_RCX, rcx); \
|
|
|
|
COND_PUSH(set, CLBR_RDX, rdx); \
|
|
|
|
COND_PUSH(set, CLBR_RSI, rsi); \
|
|
|
|
COND_PUSH(set, CLBR_RDI, rdi); \
|
|
|
|
COND_PUSH(set, CLBR_R8, r8); \
|
|
|
|
COND_PUSH(set, CLBR_R9, r9); \
|
|
|
|
COND_PUSH(set, CLBR_R10, r10); \
|
|
|
|
COND_PUSH(set, CLBR_R11, r11)
|
|
|
|
#define PV_RESTORE_REGS(set) \
|
|
|
|
COND_POP(set, CLBR_R11, r11); \
|
|
|
|
COND_POP(set, CLBR_R10, r10); \
|
|
|
|
COND_POP(set, CLBR_R9, r9); \
|
|
|
|
COND_POP(set, CLBR_R8, r8); \
|
|
|
|
COND_POP(set, CLBR_RDI, rdi); \
|
|
|
|
COND_POP(set, CLBR_RSI, rsi); \
|
|
|
|
COND_POP(set, CLBR_RDX, rdx); \
|
|
|
|
COND_POP(set, CLBR_RCX, rcx); \
|
|
|
|
COND_POP(set, CLBR_RAX, rax)
|
|
|
|
|
2008-01-30 05:32:06 -07:00
|
|
|
#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
|
2008-01-30 05:32:06 -07:00
|
|
|
#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
|
2008-06-24 22:19:15 -06:00
|
|
|
#define PARA_INDIRECT(addr) *addr(%rip)
|
2008-01-30 05:32:06 -07:00
|
|
|
#else
|
2009-01-28 15:35:04 -07:00
|
|
|
#define PV_SAVE_REGS(set) \
|
|
|
|
COND_PUSH(set, CLBR_EAX, eax); \
|
|
|
|
COND_PUSH(set, CLBR_EDI, edi); \
|
|
|
|
COND_PUSH(set, CLBR_ECX, ecx); \
|
|
|
|
COND_PUSH(set, CLBR_EDX, edx)
|
|
|
|
#define PV_RESTORE_REGS(set) \
|
|
|
|
COND_POP(set, CLBR_EDX, edx); \
|
|
|
|
COND_POP(set, CLBR_ECX, ecx); \
|
|
|
|
COND_POP(set, CLBR_EDI, edi); \
|
|
|
|
COND_POP(set, CLBR_EAX, eax)
|
|
|
|
|
2008-01-30 05:32:06 -07:00
|
|
|
#define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
|
2008-01-30 05:32:06 -07:00
|
|
|
#define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
|
2008-06-24 22:19:15 -06:00
|
|
|
#define PARA_INDIRECT(addr) *%cs:addr
|
2008-01-30 05:32:06 -07:00
|
|
|
#endif
|
|
|
|
|
2007-10-16 12:51:29 -06:00
|
|
|
#define INTERRUPT_RETURN \
|
|
|
|
PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
|
2008-06-24 22:19:15 -06:00
|
|
|
jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
|
2007-05-02 11:27:14 -06:00
|
|
|
|
|
|
|
#define DISABLE_INTERRUPTS(clobbers) \
|
2007-10-16 12:51:29 -06:00
|
|
|
PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-28 15:35:05 -07:00
|
|
|
PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
|
2008-06-24 22:19:15 -06:00
|
|
|
call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-28 15:35:05 -07:00
|
|
|
PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
|
2007-05-02 11:27:14 -06:00
|
|
|
|
|
|
|
#define ENABLE_INTERRUPTS(clobbers) \
|
2007-10-16 12:51:29 -06:00
|
|
|
PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-28 15:35:05 -07:00
|
|
|
PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
|
2008-06-24 22:19:15 -06:00
|
|
|
call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
|
x86/paravirt: add register-saving thunks to reduce caller register pressure
Impact: Optimization
One of the problems with inserting a pile of C calls where previously
there were none is that the register pressure is greatly increased.
The C calling convention says that the caller must expect a certain
set of registers may be trashed by the callee, and that the callee can
use those registers without restriction. This includes the function
argument registers, and several others.
This patch seeks to alleviate this pressure by introducing wrapper
thunks that will do the register saving/restoring, so that the
callsite doesn't need to worry about it, but the callee function can
be conventional compiler-generated code. In many cases (particularly
performance-sensitive cases) the callee will be in assembler anyway,
and need not use the compiler's calling convention.
Standard calling convention is:
arguments return scratch
x86-32 eax edx ecx eax ?
x86-64 rdi rsi rdx rcx rax r8 r9 r10 r11
The thunk preserves all argument and scratch registers. The return
register is not preserved, and is available as a scratch register for
unwrapped callee code (and of course the return value).
Wrapped function pointers are themselves wrapped in a struct
paravirt_callee_save structure, in order to get some warning from the
compiler when functions with mismatched calling conventions are used.
The most common paravirt ops, both statically and dynamically, are
interrupt enable/disable/save/restore, so handle them first. This is
particularly easy since their calls are handled specially anyway.
XXX Deal with VMI. What's their calling convention?
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-01-28 15:35:05 -07:00
|
|
|
PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
|
2007-05-02 11:27:14 -06:00
|
|
|
|
2008-06-24 22:19:28 -06:00
|
|
|
#define USERGS_SYSRET32 \
|
|
|
|
PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \
|
2008-01-30 05:30:33 -07:00
|
|
|
CLBR_NONE, \
|
2008-06-24 22:19:28 -06:00
|
|
|
jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
|
2008-01-30 05:32:07 -07:00
|
|
|
|
2008-01-30 05:32:06 -07:00
|
|
|
#ifdef CONFIG_X86_32
|
2008-06-24 22:19:15 -06:00
|
|
|
#define GET_CR0_INTO_EAX \
|
|
|
|
push %ecx; push %edx; \
|
|
|
|
call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
|
2007-05-02 11:27:14 -06:00
|
|
|
pop %edx; pop %ecx
|
2008-06-24 22:19:28 -06:00
|
|
|
|
|
|
|
#define ENABLE_INTERRUPTS_SYSEXIT \
|
|
|
|
PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
|
|
|
|
CLBR_NONE, \
|
|
|
|
jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
|
|
|
|
|
|
|
|
|
|
|
|
#else /* !CONFIG_X86_32 */
|
2008-06-24 22:19:30 -06:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If swapgs is used while the userspace stack is still current,
|
|
|
|
* there's no way to call a pvop. The PV replacement *must* be
|
|
|
|
* inlined, or the swapgs instruction must be trapped and emulated.
|
|
|
|
*/
|
|
|
|
#define SWAPGS_UNSAFE_STACK \
|
|
|
|
PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
|
|
|
|
swapgs)
|
|
|
|
|
2009-01-28 15:35:04 -07:00
|
|
|
/*
|
|
|
|
* Note: swapgs is very special, and in practise is either going to be
|
|
|
|
* implemented with a single "swapgs" instruction or something very
|
|
|
|
* special. Either way, we don't need to save any registers for
|
|
|
|
* it.
|
|
|
|
*/
|
2008-01-30 05:32:08 -07:00
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#define SWAPGS \
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PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
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2009-01-28 15:35:04 -07:00
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call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
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2008-01-30 05:32:08 -07:00
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)
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2008-06-24 22:19:15 -06:00
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#define GET_CR2_INTO_RCX \
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call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
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movq %rax, %rcx; \
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2008-01-30 05:32:07 -07:00
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xorq %rax, %rax;
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2008-06-24 22:19:31 -06:00
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#define PARAVIRT_ADJUST_EXCEPTION_FRAME \
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PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
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CLBR_NONE, \
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call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
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2008-06-24 22:19:28 -06:00
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#define USERGS_SYSRET64 \
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PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
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2008-06-24 22:19:26 -06:00
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CLBR_NONE, \
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2008-06-24 22:19:28 -06:00
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jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
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#define ENABLE_INTERRUPTS_SYSEXIT32 \
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PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \
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CLBR_NONE, \
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jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
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#endif /* CONFIG_X86_32 */
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2006-12-06 18:14:08 -07:00
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2006-12-06 18:14:07 -07:00
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#endif /* __ASSEMBLY__ */
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2009-08-20 05:19:57 -06:00
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#else /* CONFIG_PARAVIRT */
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# define default_banner x86_init_noop
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#endif /* !CONFIG_PARAVIRT */
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2008-10-22 23:26:29 -06:00
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#endif /* _ASM_X86_PARAVIRT_H */
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