2011-06-21 07:51:26 -06:00
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/*
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* Samsung S5P Multi Format Codec v 5.0
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*
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* This file contains definitions of enums and structs used by the codec
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* driver.
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*
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* Copyright (C) 2011 Samsung Electronics Co., Ltd.
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* Kamil Debski, <k.debski@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version
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*/
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#ifndef S5P_MFC_COMMON_H_
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#define S5P_MFC_COMMON_H_
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#include <linux/platform_device.h>
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#include <linux/videodev2.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-ioctl.h>
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#include <media/videobuf2-core.h>
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2012-10-03 19:19:11 -06:00
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#include "regs-mfc.h"
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#include "regs-mfc-v6.h"
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#include "regs-mfc-v7.h"
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2011-06-21 07:51:26 -06:00
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/* Definitions related to MFC memory */
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/* Offset base used to differentiate between CAPTURE and OUTPUT
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* while mmaping */
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#define DST_QUEUE_OFF_BASE (TASK_SIZE / 2)
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#define MFC_BANK1_ALLOC_CTX 0
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#define MFC_BANK2_ALLOC_CTX 1
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#define MFC_BANK1_ALIGN_ORDER 13
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#define MFC_BANK2_ALIGN_ORDER 13
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#define MFC_BASE_ALIGN_ORDER 17
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#include <media/videobuf2-dma-contig.h>
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static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b)
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{
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/* Same functionality as the vb2_dma_contig_plane_paddr */
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dma_addr_t *paddr = vb2_dma_contig_memops.cookie(b);
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return *paddr;
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}
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/* MFC definitions */
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#define MFC_MAX_EXTRA_DPB 5
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#define MFC_MAX_BUFFERS 32
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#define MFC_NUM_CONTEXTS 4
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/* Interrupt timeout */
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#define MFC_INT_TIMEOUT 2000
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/* Busy wait timeout */
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#define MFC_BW_TIMEOUT 500
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/* Watchdog interval */
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#define MFC_WATCHDOG_INTERVAL 1000
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/* After how many executions watchdog should assume lock up */
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#define MFC_WATCHDOG_CNT 10
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#define MFC_NO_INSTANCE_SET -1
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#define MFC_ENC_CAP_PLANE_COUNT 1
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#define MFC_ENC_OUT_PLANE_COUNT 2
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#define STUFF_BYTE 4
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#define MFC_MAX_CTRLS 77
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#define S5P_MFC_CODEC_NONE -1
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#define S5P_MFC_CODEC_H264_DEC 0
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#define S5P_MFC_CODEC_H264_MVC_DEC 1
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#define S5P_MFC_CODEC_VC1_DEC 2
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#define S5P_MFC_CODEC_MPEG4_DEC 3
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#define S5P_MFC_CODEC_MPEG2_DEC 4
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#define S5P_MFC_CODEC_H263_DEC 5
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#define S5P_MFC_CODEC_VC1RCV_DEC 6
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#define S5P_MFC_CODEC_VP8_DEC 7
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#define S5P_MFC_CODEC_H264_ENC 20
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#define S5P_MFC_CODEC_H264_MVC_ENC 21
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#define S5P_MFC_CODEC_MPEG4_ENC 22
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#define S5P_MFC_CODEC_H263_ENC 23
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#define S5P_MFC_CODEC_VP8_ENC 24
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#define S5P_MFC_R2H_CMD_EMPTY 0
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#define S5P_MFC_R2H_CMD_SYS_INIT_RET 1
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#define S5P_MFC_R2H_CMD_OPEN_INSTANCE_RET 2
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#define S5P_MFC_R2H_CMD_SEQ_DONE_RET 3
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#define S5P_MFC_R2H_CMD_INIT_BUFFERS_RET 4
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#define S5P_MFC_R2H_CMD_CLOSE_INSTANCE_RET 6
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#define S5P_MFC_R2H_CMD_SLEEP_RET 7
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#define S5P_MFC_R2H_CMD_WAKEUP_RET 8
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#define S5P_MFC_R2H_CMD_COMPLETE_SEQ_RET 9
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#define S5P_MFC_R2H_CMD_DPB_FLUSH_RET 10
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#define S5P_MFC_R2H_CMD_NAL_ABORT_RET 11
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#define S5P_MFC_R2H_CMD_FW_STATUS_RET 12
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#define S5P_MFC_R2H_CMD_FRAME_DONE_RET 13
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#define S5P_MFC_R2H_CMD_FIELD_DONE_RET 14
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#define S5P_MFC_R2H_CMD_SLICE_DONE_RET 15
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#define S5P_MFC_R2H_CMD_ENC_BUFFER_FUL_RET 16
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#define S5P_MFC_R2H_CMD_ERR_RET 32
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#define mfc_read(dev, offset) readl(dev->regs_base + (offset))
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#define mfc_write(dev, data, offset) writel((data), dev->regs_base + \
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(offset))
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/**
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* enum s5p_mfc_fmt_type - type of the pixelformat
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*/
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enum s5p_mfc_fmt_type {
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MFC_FMT_DEC,
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MFC_FMT_ENC,
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MFC_FMT_RAW,
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};
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/**
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* enum s5p_mfc_node_type - The type of an MFC device node.
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*/
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enum s5p_mfc_node_type {
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MFCNODE_INVALID = -1,
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MFCNODE_DECODER = 0,
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MFCNODE_ENCODER = 1,
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};
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/**
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* enum s5p_mfc_inst_type - The type of an MFC instance.
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*/
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enum s5p_mfc_inst_type {
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MFCINST_INVALID,
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MFCINST_DECODER,
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MFCINST_ENCODER,
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};
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/**
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* enum s5p_mfc_inst_state - The state of an MFC instance.
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*/
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enum s5p_mfc_inst_state {
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MFCINST_FREE = 0,
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MFCINST_INIT = 100,
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MFCINST_GOT_INST,
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MFCINST_HEAD_PARSED,
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MFCINST_HEAD_PRODUCED,
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MFCINST_BUFS_SET,
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MFCINST_RUNNING,
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MFCINST_FINISHING,
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MFCINST_FINISHED,
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MFCINST_RETURN_INST,
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MFCINST_ERROR,
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MFCINST_ABORT,
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MFCINST_FLUSH,
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MFCINST_RES_CHANGE_INIT,
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MFCINST_RES_CHANGE_FLUSH,
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MFCINST_RES_CHANGE_END,
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};
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/**
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* enum s5p_mfc_queue_state - The state of buffer queue.
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*/
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enum s5p_mfc_queue_state {
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QUEUE_FREE,
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QUEUE_BUFS_REQUESTED,
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QUEUE_BUFS_QUERIED,
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QUEUE_BUFS_MMAPED,
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};
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/**
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* enum s5p_mfc_decode_arg - type of frame decoding
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*/
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enum s5p_mfc_decode_arg {
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MFC_DEC_FRAME,
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MFC_DEC_LAST_FRAME,
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MFC_DEC_RES_CHANGE,
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};
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2012-08-21 05:05:32 -06:00
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#define MFC_BUF_FLAG_USED (1 << 0)
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#define MFC_BUF_FLAG_EOS (1 << 1)
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struct s5p_mfc_ctx;
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/**
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* struct s5p_mfc_buf - MFC buffer
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*/
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struct s5p_mfc_buf {
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struct list_head list;
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struct vb2_buffer *b;
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union {
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struct {
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size_t luma;
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size_t chroma;
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} raw;
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size_t stream;
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} cookie;
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int flags;
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};
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/**
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* struct s5p_mfc_pm - power management data structure
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*/
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struct s5p_mfc_pm {
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struct clk *clock;
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struct clk *clock_gate;
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atomic_t power;
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struct device *device;
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};
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2012-10-03 19:19:09 -06:00
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struct s5p_mfc_buf_size_v5 {
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unsigned int h264_ctx;
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unsigned int non_h264_ctx;
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unsigned int dsc;
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unsigned int shm;
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};
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2012-10-03 19:19:11 -06:00
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struct s5p_mfc_buf_size_v6 {
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unsigned int dev_ctx;
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unsigned int h264_dec_ctx;
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unsigned int other_dec_ctx;
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unsigned int h264_enc_ctx;
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unsigned int other_enc_ctx;
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};
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2012-10-03 19:19:09 -06:00
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struct s5p_mfc_buf_size {
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unsigned int fw;
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unsigned int cpb;
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void *priv;
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};
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struct s5p_mfc_buf_align {
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unsigned int base;
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};
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struct s5p_mfc_variant {
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unsigned int version;
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unsigned int port_num;
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struct s5p_mfc_buf_size *buf_size;
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struct s5p_mfc_buf_align *buf_align;
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char *fw_name;
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};
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/**
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* struct s5p_mfc_priv_buf - represents internal used buffer
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* @alloc: allocation-specific context for each buffer
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* (videobuf2 allocator)
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* @ofs: offset of each buffer, will be used for MFC
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* @virt: kernel virtual address, only valid when the
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* buffer accessed by driver
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* @dma: DMA address, only valid when kernel DMA API used
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* @size: size of the buffer
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*/
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struct s5p_mfc_priv_buf {
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void *alloc;
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unsigned long ofs;
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void *virt;
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dma_addr_t dma;
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size_t size;
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};
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2011-06-21 07:51:26 -06:00
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/**
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* struct s5p_mfc_dev - The struct containing driver internal parameters.
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*
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* @v4l2_dev: v4l2_device
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* @vfd_dec: video device for decoding
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* @vfd_enc: video device for encoding
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* @plat_dev: platform device
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* @mem_dev_l: child device of the left memory bank (0)
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* @mem_dev_r: child device of the right memory bank (1)
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* @regs_base: base address of the MFC hw registers
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* @irq: irq resource
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* @dec_ctrl_handler: control framework handler for decoding
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* @enc_ctrl_handler: control framework handler for encoding
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* @pm: power management control
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* @variant: MFC hardware variant information
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* @num_inst: couter of active MFC instances
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* @irqlock: lock for operations on videobuf2 queues
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* @condlock: lock for changing/checking if a context is ready to be
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* processed
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* @mfc_mutex: lock for video_device
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* @int_cond: variable used by the waitqueue
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* @int_type: type of last interrupt
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* @int_err: error number for last interrupt
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* @queue: waitqueue for waiting for completion of device commands
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* @fw_size: size of firmware
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* @fw_virt_addr: virtual firmware address
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* @bank1: address of the beginning of bank 1 memory
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* @bank2: address of the beginning of bank 2 memory
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* @hw_lock: used for hardware locking
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* @ctx: array of driver contexts
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* @curr_ctx: number of the currently running context
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* @ctx_work_bits: used to mark which contexts are waiting for hardware
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* @watchdog_cnt: counter for the watchdog
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* @watchdog_workqueue: workqueue for the watchdog
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* @watchdog_work: worker for the watchdog
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* @alloc_ctx: videobuf2 allocator contexts for two memory banks
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* @enter_suspend: flag set when entering suspend
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* @ctx_buf: common context memory (MFCv6)
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* @warn_start: hardware error code from which warnings start
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* @mfc_ops: ops structure holding HW operation function pointers
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* @mfc_cmds: cmd structure holding HW commands function pointers
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*
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*/
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struct s5p_mfc_dev {
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struct v4l2_device v4l2_dev;
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struct video_device *vfd_dec;
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struct video_device *vfd_enc;
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struct platform_device *plat_dev;
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struct device *mem_dev_l;
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struct device *mem_dev_r;
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void __iomem *regs_base;
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int irq;
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struct v4l2_ctrl_handler dec_ctrl_handler;
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struct v4l2_ctrl_handler enc_ctrl_handler;
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struct s5p_mfc_pm pm;
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struct s5p_mfc_variant *variant;
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int num_inst;
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spinlock_t irqlock; /* lock when operating on videobuf2 queues */
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spinlock_t condlock; /* lock when changing/checking if a context is
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ready to be processed */
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struct mutex mfc_mutex; /* video_device lock */
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int int_cond;
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int int_type;
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unsigned int int_err;
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wait_queue_head_t queue;
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size_t fw_size;
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void *fw_virt_addr;
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dma_addr_t bank1;
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dma_addr_t bank2;
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2011-06-21 07:51:26 -06:00
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unsigned long hw_lock;
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struct s5p_mfc_ctx *ctx[MFC_NUM_CONTEXTS];
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int curr_ctx;
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unsigned long ctx_work_bits;
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atomic_t watchdog_cnt;
|
|
|
|
struct timer_list watchdog_timer;
|
|
|
|
struct workqueue_struct *watchdog_workqueue;
|
|
|
|
struct work_struct watchdog_work;
|
|
|
|
void *alloc_ctx[2];
|
|
|
|
unsigned long enter_suspend;
|
2012-10-03 19:19:08 -06:00
|
|
|
|
2012-10-03 19:19:11 -06:00
|
|
|
struct s5p_mfc_priv_buf ctx_buf;
|
2012-10-03 19:19:08 -06:00
|
|
|
int warn_start;
|
|
|
|
struct s5p_mfc_hw_ops *mfc_ops;
|
|
|
|
struct s5p_mfc_hw_cmds *mfc_cmds;
|
2011-06-21 07:51:26 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct s5p_mfc_h264_enc_params - encoding parameters for h264
|
|
|
|
*/
|
|
|
|
struct s5p_mfc_h264_enc_params {
|
|
|
|
enum v4l2_mpeg_video_h264_profile profile;
|
|
|
|
enum v4l2_mpeg_video_h264_loop_filter_mode loop_filter_mode;
|
|
|
|
s8 loop_filter_alpha;
|
|
|
|
s8 loop_filter_beta;
|
|
|
|
enum v4l2_mpeg_video_h264_entropy_mode entropy_mode;
|
|
|
|
u8 max_ref_pic;
|
|
|
|
u8 num_ref_pic_4p;
|
|
|
|
int _8x8_transform;
|
|
|
|
int rc_mb_dark;
|
|
|
|
int rc_mb_smooth;
|
|
|
|
int rc_mb_static;
|
|
|
|
int rc_mb_activity;
|
|
|
|
int vui_sar;
|
|
|
|
u8 vui_sar_idc;
|
|
|
|
u16 vui_ext_sar_width;
|
|
|
|
u16 vui_ext_sar_height;
|
|
|
|
int open_gop;
|
|
|
|
u16 open_gop_size;
|
|
|
|
u8 rc_frame_qp;
|
|
|
|
u8 rc_min_qp;
|
|
|
|
u8 rc_max_qp;
|
|
|
|
u8 rc_p_frame_qp;
|
|
|
|
u8 rc_b_frame_qp;
|
|
|
|
enum v4l2_mpeg_video_h264_level level_v4l2;
|
|
|
|
int level;
|
|
|
|
u16 cpb_size;
|
2012-10-03 19:19:09 -06:00
|
|
|
int interlace;
|
2012-10-03 19:19:11 -06:00
|
|
|
u8 hier_qp;
|
|
|
|
u8 hier_qp_type;
|
|
|
|
u8 hier_qp_layer;
|
|
|
|
u8 hier_qp_layer_qp[7];
|
|
|
|
u8 sei_frame_packing;
|
|
|
|
u8 sei_fp_curr_frame_0;
|
|
|
|
u8 sei_fp_arrangement_type;
|
|
|
|
|
|
|
|
u8 fmo;
|
|
|
|
u8 fmo_map_type;
|
|
|
|
u8 fmo_slice_grp;
|
|
|
|
u8 fmo_chg_dir;
|
|
|
|
u32 fmo_chg_rate;
|
|
|
|
u32 fmo_run_len[4];
|
|
|
|
u8 aso;
|
|
|
|
u32 aso_slice_order[8];
|
2011-06-21 07:51:26 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct s5p_mfc_mpeg4_enc_params - encoding parameters for h263 and mpeg4
|
|
|
|
*/
|
|
|
|
struct s5p_mfc_mpeg4_enc_params {
|
|
|
|
/* MPEG4 Only */
|
|
|
|
enum v4l2_mpeg_video_mpeg4_profile profile;
|
|
|
|
int quarter_pixel;
|
|
|
|
/* Common for MPEG4, H263 */
|
|
|
|
u16 vop_time_res;
|
|
|
|
u16 vop_frm_delta;
|
|
|
|
u8 rc_frame_qp;
|
|
|
|
u8 rc_min_qp;
|
|
|
|
u8 rc_max_qp;
|
|
|
|
u8 rc_p_frame_qp;
|
|
|
|
u8 rc_b_frame_qp;
|
|
|
|
enum v4l2_mpeg_video_mpeg4_level level_v4l2;
|
|
|
|
int level;
|
|
|
|
};
|
|
|
|
|
2013-07-08 22:24:42 -06:00
|
|
|
/**
|
|
|
|
* struct s5p_mfc_vp8_enc_params - encoding parameters for vp8
|
|
|
|
*/
|
|
|
|
struct s5p_mfc_vp8_enc_params {
|
|
|
|
u8 imd_4x4;
|
|
|
|
enum v4l2_vp8_num_partitions num_partitions;
|
|
|
|
enum v4l2_vp8_num_ref_frames num_ref;
|
|
|
|
u8 filter_level;
|
|
|
|
u8 filter_sharpness;
|
|
|
|
u32 golden_frame_ref_period;
|
|
|
|
enum v4l2_vp8_golden_frame_sel golden_frame_sel;
|
|
|
|
u8 hier_layer;
|
|
|
|
u8 hier_layer_qp[3];
|
|
|
|
};
|
|
|
|
|
2011-06-21 07:51:26 -06:00
|
|
|
/**
|
|
|
|
* struct s5p_mfc_enc_params - general encoding parameters
|
|
|
|
*/
|
|
|
|
struct s5p_mfc_enc_params {
|
|
|
|
u16 width;
|
|
|
|
u16 height;
|
|
|
|
|
|
|
|
u16 gop_size;
|
|
|
|
enum v4l2_mpeg_video_multi_slice_mode slice_mode;
|
|
|
|
u16 slice_mb;
|
|
|
|
u32 slice_bit;
|
|
|
|
u16 intra_refresh_mb;
|
|
|
|
int pad;
|
|
|
|
u8 pad_luma;
|
|
|
|
u8 pad_cb;
|
|
|
|
u8 pad_cr;
|
|
|
|
int rc_frame;
|
2012-10-03 19:19:09 -06:00
|
|
|
int rc_mb;
|
2011-06-21 07:51:26 -06:00
|
|
|
u32 rc_bitrate;
|
|
|
|
u16 rc_reaction_coeff;
|
|
|
|
u16 vbv_size;
|
2012-10-03 19:19:11 -06:00
|
|
|
u32 vbv_delay;
|
2011-06-21 07:51:26 -06:00
|
|
|
|
|
|
|
enum v4l2_mpeg_video_header_mode seq_hdr_mode;
|
|
|
|
enum v4l2_mpeg_mfc51_video_frame_skip_mode frame_skip_mode;
|
|
|
|
int fixed_target_bit;
|
|
|
|
|
|
|
|
u8 num_b_frame;
|
|
|
|
u32 rc_framerate_num;
|
|
|
|
u32 rc_framerate_denom;
|
|
|
|
|
2013-05-28 00:26:14 -06:00
|
|
|
struct {
|
2011-06-21 07:51:26 -06:00
|
|
|
struct s5p_mfc_h264_enc_params h264;
|
|
|
|
struct s5p_mfc_mpeg4_enc_params mpeg4;
|
2013-07-08 22:24:42 -06:00
|
|
|
struct s5p_mfc_vp8_enc_params vp8;
|
2011-06-21 07:51:26 -06:00
|
|
|
} codec;
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct s5p_mfc_codec_ops - codec ops, used by encoding
|
|
|
|
*/
|
|
|
|
struct s5p_mfc_codec_ops {
|
|
|
|
/* initialization routines */
|
|
|
|
int (*pre_seq_start) (struct s5p_mfc_ctx *ctx);
|
|
|
|
int (*post_seq_start) (struct s5p_mfc_ctx *ctx);
|
|
|
|
/* execution routines */
|
|
|
|
int (*pre_frame_start) (struct s5p_mfc_ctx *ctx);
|
|
|
|
int (*post_frame_start) (struct s5p_mfc_ctx *ctx);
|
|
|
|
};
|
|
|
|
|
|
|
|
#define call_cop(c, op, args...) \
|
|
|
|
(((c)->c_ops->op) ? \
|
|
|
|
((c)->c_ops->op(args)) : 0)
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct s5p_mfc_ctx - This struct contains the instance context
|
|
|
|
*
|
|
|
|
* @dev: pointer to the s5p_mfc_dev of the device
|
|
|
|
* @fh: struct v4l2_fh
|
|
|
|
* @num: number of the context that this structure describes
|
|
|
|
* @int_cond: variable used by the waitqueue
|
|
|
|
* @int_type: type of the last interrupt
|
|
|
|
* @int_err: error number received from MFC hw in the interrupt
|
|
|
|
* @queue: waitqueue that can be used to wait for this context to
|
|
|
|
* finish
|
|
|
|
* @src_fmt: source pixelformat information
|
|
|
|
* @dst_fmt: destination pixelformat information
|
|
|
|
* @vq_src: vb2 queue for source buffers
|
|
|
|
* @vq_dst: vb2 queue for destination buffers
|
|
|
|
* @src_queue: driver internal queue for source buffers
|
|
|
|
* @dst_queue: driver internal queue for destination buffers
|
|
|
|
* @src_queue_cnt: number of buffers queued on the source internal queue
|
|
|
|
* @dst_queue_cnt: number of buffers queued on the dest internal queue
|
|
|
|
* @type: type of the instance - decoder or encoder
|
|
|
|
* @state: state of the context
|
|
|
|
* @inst_no: number of hw instance associated with the context
|
|
|
|
* @img_width: width of the image that is decoded or encoded
|
|
|
|
* @img_height: height of the image that is decoded or encoded
|
|
|
|
* @buf_width: width of the buffer for processed image
|
|
|
|
* @buf_height: height of the buffer for processed image
|
|
|
|
* @luma_size: size of a luma plane
|
|
|
|
* @chroma_size: size of a chroma plane
|
|
|
|
* @mv_size: size of a motion vectors buffer
|
|
|
|
* @consumed_stream: number of bytes that have been used so far from the
|
|
|
|
* decoding buffer
|
|
|
|
* @dpb_flush_flag: flag used to indicate that a DPB buffers are being
|
|
|
|
* flushed
|
2012-10-03 19:19:11 -06:00
|
|
|
* @head_processed: flag mentioning whether the header data is processed
|
|
|
|
* completely or not
|
2013-01-03 03:06:04 -07:00
|
|
|
* @bank1: handle to memory allocated for temporary buffers from
|
2011-06-21 07:51:26 -06:00
|
|
|
* memory bank 1
|
2013-01-03 03:06:04 -07:00
|
|
|
* @bank2: handle to memory allocated for temporary buffers from
|
2011-06-21 07:51:26 -06:00
|
|
|
* memory bank 2
|
|
|
|
* @capture_state: state of the capture buffers queue
|
|
|
|
* @output_state: state of the output buffers queue
|
|
|
|
* @src_bufs: information on allocated source buffers
|
|
|
|
* @dst_bufs: information on allocated destination buffers
|
|
|
|
* @sequence: counter for the sequence number for v4l2
|
|
|
|
* @dec_dst_flag: flags for buffers queued in the hardware
|
|
|
|
* @dec_src_buf_size: size of the buffer for source buffers in decoding
|
|
|
|
* @codec_mode: number of codec mode used by MFC hw
|
|
|
|
* @slice_interface: slice interface flag
|
|
|
|
* @loop_filter_mpeg4: loop filter for MPEG4 flag
|
|
|
|
* @display_delay: value of the display delay for H264
|
|
|
|
* @display_delay_enable: display delay for H264 enable flag
|
|
|
|
* @after_packed_pb: flag used to track buffer when stream is in
|
|
|
|
* Packed PB format
|
2012-10-03 19:19:11 -06:00
|
|
|
* @sei_fp_parse: enable/disable parsing of frame packing SEI information
|
2011-06-21 07:51:26 -06:00
|
|
|
* @dpb_count: count of the DPB buffers required by MFC hw
|
|
|
|
* @total_dpb_count: count of DPB buffers with additional buffers
|
|
|
|
* requested by the application
|
2012-10-03 19:19:09 -06:00
|
|
|
* @ctx: context buffer information
|
|
|
|
* @dsc: descriptor buffer information
|
|
|
|
* @shm: shared memory buffer information
|
2012-10-03 19:19:11 -06:00
|
|
|
* @mv_count: number of MV buffers allocated for decoding
|
2011-06-21 07:51:26 -06:00
|
|
|
* @enc_params: encoding parameters for MFC
|
|
|
|
* @enc_dst_buf_size: size of the buffers for encoder output
|
2012-10-03 19:19:11 -06:00
|
|
|
* @luma_dpb_size: dpb buffer size for luma
|
|
|
|
* @chroma_dpb_size: dpb buffer size for chroma
|
|
|
|
* @me_buffer_size: size of the motion estimation buffer
|
|
|
|
* @tmv_buffer_size: size of temporal predictor motion vector buffer
|
2011-06-21 07:51:26 -06:00
|
|
|
* @frame_type: used to force the type of the next encoded frame
|
|
|
|
* @ref_queue: list of the reference buffers for encoding
|
|
|
|
* @ref_queue_cnt: number of the buffers in the reference list
|
|
|
|
* @c_ops: ops for encoding
|
|
|
|
* @ctrls: array of controls, used when adding controls to the
|
|
|
|
* v4l2 control framework
|
|
|
|
* @ctrl_handler: handler for v4l2 framework
|
|
|
|
*/
|
|
|
|
struct s5p_mfc_ctx {
|
|
|
|
struct s5p_mfc_dev *dev;
|
|
|
|
struct v4l2_fh fh;
|
|
|
|
|
|
|
|
int num;
|
|
|
|
|
|
|
|
int int_cond;
|
|
|
|
int int_type;
|
|
|
|
unsigned int int_err;
|
|
|
|
wait_queue_head_t queue;
|
|
|
|
|
|
|
|
struct s5p_mfc_fmt *src_fmt;
|
|
|
|
struct s5p_mfc_fmt *dst_fmt;
|
|
|
|
|
|
|
|
struct vb2_queue vq_src;
|
|
|
|
struct vb2_queue vq_dst;
|
|
|
|
|
|
|
|
struct list_head src_queue;
|
|
|
|
struct list_head dst_queue;
|
|
|
|
|
|
|
|
unsigned int src_queue_cnt;
|
|
|
|
unsigned int dst_queue_cnt;
|
|
|
|
|
|
|
|
enum s5p_mfc_inst_type type;
|
|
|
|
enum s5p_mfc_inst_state state;
|
|
|
|
int inst_no;
|
|
|
|
|
|
|
|
/* Image parameters */
|
|
|
|
int img_width;
|
|
|
|
int img_height;
|
|
|
|
int buf_width;
|
|
|
|
int buf_height;
|
|
|
|
|
|
|
|
int luma_size;
|
|
|
|
int chroma_size;
|
|
|
|
int mv_size;
|
|
|
|
|
|
|
|
unsigned long consumed_stream;
|
|
|
|
|
|
|
|
unsigned int dpb_flush_flag;
|
2012-10-03 19:19:11 -06:00
|
|
|
unsigned int head_processed;
|
2011-06-21 07:51:26 -06:00
|
|
|
|
2013-01-03 03:06:04 -07:00
|
|
|
struct s5p_mfc_priv_buf bank1;
|
|
|
|
struct s5p_mfc_priv_buf bank2;
|
2011-06-21 07:51:26 -06:00
|
|
|
|
|
|
|
enum s5p_mfc_queue_state capture_state;
|
|
|
|
enum s5p_mfc_queue_state output_state;
|
|
|
|
|
|
|
|
struct s5p_mfc_buf src_bufs[MFC_MAX_BUFFERS];
|
|
|
|
int src_bufs_cnt;
|
|
|
|
struct s5p_mfc_buf dst_bufs[MFC_MAX_BUFFERS];
|
|
|
|
int dst_bufs_cnt;
|
|
|
|
|
|
|
|
unsigned int sequence;
|
|
|
|
unsigned long dec_dst_flag;
|
|
|
|
size_t dec_src_buf_size;
|
|
|
|
|
|
|
|
/* Control values */
|
|
|
|
int codec_mode;
|
|
|
|
int slice_interface;
|
|
|
|
int loop_filter_mpeg4;
|
|
|
|
int display_delay;
|
|
|
|
int display_delay_enable;
|
|
|
|
int after_packed_pb;
|
2012-10-03 19:19:11 -06:00
|
|
|
int sei_fp_parse;
|
2011-06-21 07:51:26 -06:00
|
|
|
|
2013-04-24 06:41:53 -06:00
|
|
|
int pb_count;
|
2011-06-21 07:51:26 -06:00
|
|
|
int total_dpb_count;
|
2012-10-03 19:19:11 -06:00
|
|
|
int mv_count;
|
2011-06-21 07:51:26 -06:00
|
|
|
/* Buffers */
|
2012-10-03 19:19:09 -06:00
|
|
|
struct s5p_mfc_priv_buf ctx;
|
|
|
|
struct s5p_mfc_priv_buf dsc;
|
|
|
|
struct s5p_mfc_priv_buf shm;
|
2011-06-21 07:51:26 -06:00
|
|
|
|
|
|
|
struct s5p_mfc_enc_params enc_params;
|
|
|
|
|
|
|
|
size_t enc_dst_buf_size;
|
2012-10-03 19:19:11 -06:00
|
|
|
size_t luma_dpb_size;
|
|
|
|
size_t chroma_dpb_size;
|
|
|
|
size_t me_buffer_size;
|
|
|
|
size_t tmv_buffer_size;
|
2011-06-21 07:51:26 -06:00
|
|
|
|
|
|
|
enum v4l2_mpeg_mfc51_video_force_frame_type force_frame_type;
|
|
|
|
|
|
|
|
struct list_head ref_queue;
|
|
|
|
unsigned int ref_queue_cnt;
|
|
|
|
|
2012-10-03 19:19:11 -06:00
|
|
|
enum v4l2_mpeg_video_multi_slice_mode slice_mode;
|
|
|
|
union {
|
|
|
|
unsigned int mb;
|
|
|
|
unsigned int bits;
|
|
|
|
} slice_size;
|
|
|
|
|
2011-06-21 07:51:26 -06:00
|
|
|
struct s5p_mfc_codec_ops *c_ops;
|
|
|
|
|
|
|
|
struct v4l2_ctrl *ctrls[MFC_MAX_CTRLS];
|
|
|
|
struct v4l2_ctrl_handler ctrl_handler;
|
2012-10-03 19:19:11 -06:00
|
|
|
unsigned int frame_tag;
|
|
|
|
size_t scratch_buf_size;
|
2011-06-21 07:51:26 -06:00
|
|
|
};
|
|
|
|
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/*
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* struct s5p_mfc_fmt - structure used to store information about pixelformats
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* used by the MFC
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*/
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struct s5p_mfc_fmt {
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char *name;
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u32 fourcc;
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u32 codec_mode;
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enum s5p_mfc_fmt_type type;
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u32 num_planes;
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};
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/**
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* struct mfc_control - structure used to store information about MFC controls
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* it is used to initialize the control framework.
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*/
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struct mfc_control {
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__u32 id;
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enum v4l2_ctrl_type type;
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__u8 name[32]; /* Whatever */
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__s32 minimum; /* Note signedness */
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__s32 maximum;
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__s32 step;
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__u32 menu_skip_mask;
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__s32 default_value;
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__u32 flags;
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__u32 reserved[2];
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__u8 is_volatile;
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};
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2012-10-03 19:19:08 -06:00
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/* Macro for making hardware specific calls */
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#define s5p_mfc_hw_call(f, op, args...) \
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((f && f->op) ? f->op(args) : -ENODEV)
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2011-06-21 07:51:26 -06:00
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#define fh_to_ctx(__fh) container_of(__fh, struct s5p_mfc_ctx, fh)
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#define ctrl_to_ctx(__ctrl) \
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container_of((__ctrl)->handler, struct s5p_mfc_ctx, ctrl_handler)
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2012-08-14 03:13:40 -06:00
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void clear_work_bit(struct s5p_mfc_ctx *ctx);
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void set_work_bit(struct s5p_mfc_ctx *ctx);
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void clear_work_bit_irqsave(struct s5p_mfc_ctx *ctx);
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void set_work_bit_irqsave(struct s5p_mfc_ctx *ctx);
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2012-10-03 19:19:11 -06:00
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#define HAS_PORTNUM(dev) (dev ? (dev->variant ? \
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(dev->variant->port_num ? 1 : 0) : 0) : 0)
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#define IS_TWOPORT(dev) (dev->variant->port_num == 2 ? 1 : 0)
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2013-07-08 22:24:36 -06:00
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#define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60 ? 1 : 0)
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2013-07-08 22:24:38 -06:00
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#define IS_MFCV7(dev) (dev->variant->version >= 0x70 ? 1 : 0)
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2012-10-03 19:19:11 -06:00
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2011-06-21 07:51:26 -06:00
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#endif /* S5P_MFC_COMMON_H_ */
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