2009-04-25 08:30:44 -06:00
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/*
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* Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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2009-08-12 15:54:03 -06:00
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*
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2009-04-25 08:30:44 -06:00
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* File: mac.c
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*
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* Purpose: MAC routines
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*
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* Author: Tevin Chen
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*
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* Date: May 21, 1996
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*
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* Functions:
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* MACbIsRegBitsOn - Test if All test Bits On
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* MACbIsRegBitsOff - Test if All test Bits Off
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* MACbIsIntDisable - Test if MAC interrupt disable
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* MACvSetShortRetryLimit - Set 802.11 Short Retry limit
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* MACvSetLongRetryLimit - Set 802.11 Long Retry limit
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* MACvSetLoopbackMode - Set MAC Loopback Mode
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* MACvSaveContext - Save Context of MAC Registers
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* MACvRestoreContext - Restore Context of MAC Registers
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* MACbSoftwareReset - Software Reset MAC
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* MACbSafeRxOff - Turn Off MAC Rx
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* MACbSafeTxOff - Turn Off MAC Tx
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* MACbSafeStop - Stop MAC function
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* MACbShutdown - Shut down MAC
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* MACvInitialize - Initialize MAC
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2012-08-20 09:43:13 -06:00
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* MACvSetCurrRxDescAddr - Set Rx Descriptors Address
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* MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
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* MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
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2009-04-25 08:30:44 -06:00
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* MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
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*
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* Revision History:
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* 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
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* 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn()
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* 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
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*
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*/
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#include "tmacro.h"
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#include "mac.h"
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/*
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* Description:
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* Test if all test bits on
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*
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* Parameters:
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* In:
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2016-02-28 12:02:54 -07:00
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* io_base - Base Address for MAC
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2009-04-25 08:30:44 -06:00
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* byRegOfs - Offset of MAC Register
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* byTestBits - Test bits
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* Out:
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* none
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*
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2010-08-01 09:15:49 -06:00
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* Return Value: true if all test bits On; otherwise false
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2009-04-25 08:30:44 -06:00
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*
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*/
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2015-11-22 02:07:22 -07:00
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bool MACbIsRegBitsOn(struct vnt_private *priv, unsigned char byRegOfs,
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2015-04-26 06:40:23 -06:00
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unsigned char byTestBits)
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2009-04-25 08:30:44 -06:00
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{
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2016-02-28 12:02:54 -07:00
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void __iomem *io_base = priv->PortOffset;
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2009-04-25 08:30:44 -06:00
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2016-02-28 12:02:55 -07:00
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return (ioread8(io_base + byRegOfs) & byTestBits) == byTestBits;
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2009-04-25 08:30:44 -06:00
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}
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/*
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* Description:
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* Test if all test bits off
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*
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* Parameters:
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* In:
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2016-02-28 12:02:54 -07:00
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* io_base - Base Address for MAC
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2009-04-25 08:30:44 -06:00
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* byRegOfs - Offset of MAC Register
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* byTestBits - Test bits
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* Out:
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* none
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*
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2010-08-01 09:15:49 -06:00
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* Return Value: true if all test bits Off; otherwise false
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2009-04-25 08:30:44 -06:00
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*
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*/
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2015-11-22 02:07:22 -07:00
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bool MACbIsRegBitsOff(struct vnt_private *priv, unsigned char byRegOfs,
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2015-04-26 06:40:23 -06:00
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unsigned char byTestBits)
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2009-04-25 08:30:44 -06:00
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{
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2016-02-28 12:02:54 -07:00
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void __iomem *io_base = priv->PortOffset;
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2009-04-25 08:30:44 -06:00
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2016-02-28 12:02:55 -07:00
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return !(ioread8(io_base + byRegOfs) & byTestBits);
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2009-04-25 08:30:44 -06:00
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}
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/*
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* Description:
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* Test if MAC interrupt disable
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*
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* Parameters:
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* In:
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2016-02-28 12:02:54 -07:00
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* io_base - Base Address for MAC
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2009-04-25 08:30:44 -06:00
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* Out:
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* none
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*
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2010-08-01 09:15:49 -06:00
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* Return Value: true if interrupt is disable; otherwise false
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2009-04-25 08:30:44 -06:00
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*
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*/
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2015-11-22 02:07:22 -07:00
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bool MACbIsIntDisable(struct vnt_private *priv)
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2009-04-25 08:30:44 -06:00
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{
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2016-02-28 12:02:54 -07:00
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void __iomem *io_base = priv->PortOffset;
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2009-04-25 08:30:44 -06:00
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2016-02-28 12:02:56 -07:00
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if (ioread32(io_base + MAC_REG_IMR))
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2013-03-18 11:44:55 -06:00
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return false;
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2009-04-25 08:30:44 -06:00
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2013-03-18 11:44:55 -06:00
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return true;
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2009-04-25 08:30:44 -06:00
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}
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/*
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* Description:
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* Set 802.11 Short Retry Limit
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*
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* Parameters:
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* In:
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2016-02-28 12:02:54 -07:00
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* io_base - Base Address for MAC
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2009-04-25 08:30:44 -06:00
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* byRetryLimit- Retry Limit
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* Out:
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* none
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*
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* Return Value: none
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*
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*/
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2015-11-22 02:07:22 -07:00
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void MACvSetShortRetryLimit(struct vnt_private *priv, unsigned char byRetryLimit)
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2009-04-25 08:30:44 -06:00
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{
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2016-02-28 12:02:54 -07:00
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void __iomem *io_base = priv->PortOffset;
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2015-02-28 07:28:15 -07:00
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/* set SRT */
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2016-02-28 12:02:54 -07:00
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VNSvOutPortB(io_base + MAC_REG_SRT, byRetryLimit);
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2009-04-25 08:30:44 -06:00
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}
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/*
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* Description:
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* Set 802.11 Long Retry Limit
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*
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* Parameters:
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* In:
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2016-02-28 12:02:54 -07:00
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* io_base - Base Address for MAC
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2009-04-25 08:30:44 -06:00
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* byRetryLimit- Retry Limit
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* Out:
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* none
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*
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* Return Value: none
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*
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*/
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2015-11-22 02:07:22 -07:00
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void MACvSetLongRetryLimit(struct vnt_private *priv, unsigned char byRetryLimit)
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2009-04-25 08:30:44 -06:00
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{
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2016-02-28 12:02:54 -07:00
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void __iomem *io_base = priv->PortOffset;
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2015-02-28 07:28:15 -07:00
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/* set LRT */
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2016-02-28 12:02:54 -07:00
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VNSvOutPortB(io_base + MAC_REG_LRT, byRetryLimit);
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2009-04-25 08:30:44 -06:00
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}
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/*
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* Description:
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* Set MAC Loopback mode
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*
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* Parameters:
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* In:
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2016-02-28 12:02:54 -07:00
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* io_base - Base Address for MAC
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2009-04-25 08:30:44 -06:00
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* byLoopbackMode - Loopback Mode
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* Out:
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* none
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*
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* Return Value: none
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*
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*/
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2015-11-22 02:07:22 -07:00
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void MACvSetLoopbackMode(struct vnt_private *priv, unsigned char byLoopbackMode)
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2009-04-25 08:30:44 -06:00
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{
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2016-02-28 12:02:54 -07:00
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void __iomem *io_base = priv->PortOffset;
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2013-03-18 11:44:55 -06:00
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unsigned char byOrgValue;
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byLoopbackMode <<= 6;
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2015-02-28 07:28:15 -07:00
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/* set TCR */
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2016-02-28 12:02:54 -07:00
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VNSvInPortB(io_base + MAC_REG_TEST, &byOrgValue);
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2013-03-18 11:44:55 -06:00
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byOrgValue = byOrgValue & 0x3F;
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byOrgValue = byOrgValue | byLoopbackMode;
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2016-02-28 12:02:54 -07:00
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VNSvOutPortB(io_base + MAC_REG_TEST, byOrgValue);
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2009-04-25 08:30:44 -06:00
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}
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/*
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* Description:
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* Save MAC registers to context buffer
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*
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* Parameters:
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* In:
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2016-02-28 12:02:54 -07:00
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* io_base - Base Address for MAC
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2009-04-25 08:30:44 -06:00
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* Out:
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2016-03-06 05:57:00 -07:00
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* cxt_buf - Context buffer
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2009-04-25 08:30:44 -06:00
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*
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* Return Value: none
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*
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*/
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2016-03-06 05:57:00 -07:00
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void MACvSaveContext(struct vnt_private *priv, unsigned char *cxt_buf)
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2009-04-25 08:30:44 -06:00
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{
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2016-02-28 12:02:54 -07:00
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void __iomem *io_base = priv->PortOffset;
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2009-04-25 08:30:44 -06:00
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2015-02-28 07:28:15 -07:00
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/* read page0 register */
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2016-03-06 05:57:00 -07:00
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memcpy_fromio(cxt_buf, io_base, MAC_MAX_CONTEXT_SIZE_PAGE0);
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2009-04-25 08:30:44 -06:00
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2016-02-28 12:02:54 -07:00
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MACvSelectPage1(io_base);
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2009-04-25 08:30:44 -06:00
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2015-02-28 07:28:15 -07:00
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/* read page1 register */
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2016-03-06 05:57:00 -07:00
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memcpy_fromio(cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0, io_base,
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2016-02-28 12:02:57 -07:00
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MAC_MAX_CONTEXT_SIZE_PAGE1);
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2009-04-25 08:30:44 -06:00
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2016-02-28 12:02:54 -07:00
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MACvSelectPage0(io_base);
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2009-04-25 08:30:44 -06:00
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}
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/*
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* Description:
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* Restore MAC registers from context buffer
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*
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* Parameters:
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* In:
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2016-02-28 12:02:54 -07:00
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* io_base - Base Address for MAC
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2016-03-06 05:57:00 -07:00
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* cxt_buf - Context buffer
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2009-04-25 08:30:44 -06:00
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* Out:
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* none
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*
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* Return Value: none
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*
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*/
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2016-03-06 05:57:00 -07:00
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void MACvRestoreContext(struct vnt_private *priv, unsigned char *cxt_buf)
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2009-04-25 08:30:44 -06:00
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{
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2016-02-28 12:02:54 -07:00
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void __iomem *io_base = priv->PortOffset;
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2009-04-25 08:30:44 -06:00
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2016-02-28 12:02:54 -07:00
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MACvSelectPage1(io_base);
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2015-02-28 07:28:15 -07:00
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/* restore page1 */
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2016-03-06 05:57:01 -07:00
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memcpy_toio(io_base, cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0,
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MAC_MAX_CONTEXT_SIZE_PAGE1);
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2014-04-19 13:45:00 -06:00
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2016-02-28 12:02:54 -07:00
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MACvSelectPage0(io_base);
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2009-04-25 08:30:44 -06:00
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2015-02-28 07:28:15 -07:00
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/* restore RCR,TCR,IMR... */
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2016-03-06 05:57:01 -07:00
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memcpy_toio(io_base + MAC_REG_RCR, cxt_buf + MAC_REG_RCR,
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MAC_REG_ISR - MAC_REG_RCR);
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2014-04-19 13:45:00 -06:00
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2015-02-28 07:28:15 -07:00
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/* restore MAC Config. */
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2016-03-06 05:57:01 -07:00
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memcpy_toio(io_base + MAC_REG_LRT, cxt_buf + MAC_REG_LRT,
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MAC_REG_PAGE1SEL - MAC_REG_LRT);
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2014-04-19 13:45:00 -06:00
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2016-03-06 05:57:00 -07:00
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VNSvOutPortB(io_base + MAC_REG_CFG, *(cxt_buf + MAC_REG_CFG));
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2009-04-25 08:30:44 -06:00
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2015-02-28 07:28:15 -07:00
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/* restore PS Config. */
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2016-03-06 05:57:01 -07:00
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memcpy_toio(io_base + MAC_REG_PSCFG, cxt_buf + MAC_REG_PSCFG,
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MAC_REG_BBREGCTL - MAC_REG_PSCFG);
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2009-04-25 08:30:44 -06:00
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2015-02-28 07:28:15 -07:00
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/* restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR */
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2016-03-06 05:57:03 -07:00
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iowrite32(*(u32 *)(cxt_buf + MAC_REG_TXDMAPTR0),
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io_base + MAC_REG_TXDMAPTR0);
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iowrite32(*(u32 *)(cxt_buf + MAC_REG_AC0DMAPTR),
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io_base + MAC_REG_AC0DMAPTR);
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iowrite32(*(u32 *)(cxt_buf + MAC_REG_BCNDMAPTR),
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io_base + MAC_REG_BCNDMAPTR);
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iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR0),
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io_base + MAC_REG_RXDMAPTR0);
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iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR1),
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io_base + MAC_REG_RXDMAPTR1);
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2009-04-25 08:30:44 -06:00
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}
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/*
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* Description:
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* Software Reset MAC
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*
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* Parameters:
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* In:
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2016-02-28 12:02:54 -07:00
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* io_base - Base Address for MAC
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2009-04-25 08:30:44 -06:00
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* Out:
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* none
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*
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2010-08-01 09:15:49 -06:00
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* Return Value: true if Reset Success; otherwise false
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2009-04-25 08:30:44 -06:00
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*
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*/
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2015-11-22 02:07:22 -07:00
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bool MACbSoftwareReset(struct vnt_private *priv)
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2009-04-25 08:30:44 -06:00
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{
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2016-02-28 12:02:54 -07:00
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void __iomem *io_base = priv->PortOffset;
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2013-03-18 11:44:55 -06:00
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unsigned short ww;
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2015-02-28 07:28:15 -07:00
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/* turn on HOSTCR_SOFTRST, just write 0x01 to reset */
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_HOSTCR, 0x01);
|
2013-03-18 11:44:55 -06:00
|
|
|
|
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
2016-02-28 12:02:55 -07:00
|
|
|
if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_SOFTRST))
|
2013-03-18 11:44:55 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (ww == W_MAX_TIMEOUT)
|
|
|
|
return false;
|
|
|
|
return true;
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* save some important register's value, then do reset, then restore register's value
|
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
2010-08-01 09:15:49 -06:00
|
|
|
* Return Value: true if success; otherwise false
|
2009-04-25 08:30:44 -06:00
|
|
|
*
|
|
|
|
*/
|
2015-11-22 02:07:22 -07:00
|
|
|
bool MACbSafeSoftwareReset(struct vnt_private *priv)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2013-03-18 11:44:55 -06:00
|
|
|
unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
|
|
|
|
bool bRetVal;
|
|
|
|
|
2015-02-28 07:28:15 -07:00
|
|
|
/* PATCH....
|
|
|
|
* save some important register's value, then do
|
|
|
|
* reset, then restore register's value
|
|
|
|
*/
|
|
|
|
/* save MAC context */
|
2015-11-22 02:07:22 -07:00
|
|
|
MACvSaveContext(priv, abyTmpRegData);
|
2015-02-28 07:28:15 -07:00
|
|
|
/* do reset */
|
2015-11-22 02:07:22 -07:00
|
|
|
bRetVal = MACbSoftwareReset(priv);
|
2015-02-28 07:28:15 -07:00
|
|
|
/* restore MAC context, except CR0 */
|
2015-11-22 02:07:22 -07:00
|
|
|
MACvRestoreContext(priv, abyTmpRegData);
|
2013-03-18 11:44:55 -06:00
|
|
|
|
|
|
|
return bRetVal;
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
2015-01-11 15:18:00 -07:00
|
|
|
* Turn Off MAC Rx
|
2009-04-25 08:30:44 -06:00
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
2010-08-01 09:15:49 -06:00
|
|
|
* Return Value: true if success; otherwise false
|
2009-04-25 08:30:44 -06:00
|
|
|
*
|
|
|
|
*/
|
2015-11-22 02:07:22 -07:00
|
|
|
bool MACbSafeRxOff(struct vnt_private *priv)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2013-03-18 11:44:55 -06:00
|
|
|
unsigned short ww;
|
|
|
|
|
2015-02-28 07:28:15 -07:00
|
|
|
/* turn off wow temp for turn off Rx safely */
|
2013-03-18 11:44:55 -06:00
|
|
|
|
2015-02-28 07:28:15 -07:00
|
|
|
/* Clear RX DMA0,1 */
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL0);
|
|
|
|
iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL1);
|
2013-03-18 11:44:55 -06:00
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
2016-02-28 12:02:56 -07:00
|
|
|
if (!(ioread32(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
|
2013-03-18 11:44:55 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (ww == W_MAX_TIMEOUT) {
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug(" DBG_PORT80(0x10)\n");
|
2013-03-18 21:55:38 -06:00
|
|
|
return false;
|
2013-03-18 11:44:55 -06:00
|
|
|
}
|
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
2016-02-28 12:02:56 -07:00
|
|
|
if (!(ioread32(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
|
2013-03-18 11:44:55 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (ww == W_MAX_TIMEOUT) {
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug(" DBG_PORT80(0x11)\n");
|
2013-03-18 21:55:38 -06:00
|
|
|
return false;
|
2013-03-18 11:44:55 -06:00
|
|
|
}
|
|
|
|
|
2015-02-28 07:28:15 -07:00
|
|
|
/* try to safe shutdown RX */
|
2016-02-28 12:02:54 -07:00
|
|
|
MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_RXON);
|
2015-02-28 07:28:15 -07:00
|
|
|
/* W_MAX_TIMEOUT is the timeout period */
|
2013-03-18 11:44:55 -06:00
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
2016-02-28 12:02:55 -07:00
|
|
|
if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_RXONST))
|
2013-03-18 11:44:55 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (ww == W_MAX_TIMEOUT) {
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug(" DBG_PORT80(0x12)\n");
|
2013-03-18 21:55:38 -06:00
|
|
|
return false;
|
2013-03-18 11:44:55 -06:00
|
|
|
}
|
|
|
|
return true;
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
2015-01-11 15:18:00 -07:00
|
|
|
* Turn Off MAC Tx
|
2009-04-25 08:30:44 -06:00
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
2010-08-01 09:15:49 -06:00
|
|
|
* Return Value: true if success; otherwise false
|
2009-04-25 08:30:44 -06:00
|
|
|
*
|
|
|
|
*/
|
2015-11-22 02:07:22 -07:00
|
|
|
bool MACbSafeTxOff(struct vnt_private *priv)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2013-03-18 11:44:55 -06:00
|
|
|
unsigned short ww;
|
|
|
|
|
2015-02-28 07:28:15 -07:00
|
|
|
/* Clear TX DMA */
|
|
|
|
/* Tx0 */
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_TXDMACTL0);
|
2015-02-28 07:28:15 -07:00
|
|
|
/* AC0 */
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_AC0DMACTL);
|
2013-03-18 11:44:55 -06:00
|
|
|
|
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
2016-02-28 12:02:56 -07:00
|
|
|
if (!(ioread32(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
|
2013-03-18 11:44:55 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (ww == W_MAX_TIMEOUT) {
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug(" DBG_PORT80(0x20)\n");
|
2013-03-18 21:55:38 -06:00
|
|
|
return false;
|
2013-03-18 11:44:55 -06:00
|
|
|
}
|
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
2016-02-28 12:02:56 -07:00
|
|
|
if (!(ioread32(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
|
2013-03-18 11:44:55 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (ww == W_MAX_TIMEOUT) {
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug(" DBG_PORT80(0x21)\n");
|
2013-03-18 21:55:38 -06:00
|
|
|
return false;
|
2013-03-18 11:44:55 -06:00
|
|
|
}
|
|
|
|
|
2015-02-28 07:28:15 -07:00
|
|
|
/* try to safe shutdown TX */
|
2016-02-28 12:02:54 -07:00
|
|
|
MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_TXON);
|
2013-03-18 11:44:55 -06:00
|
|
|
|
2015-02-28 07:28:15 -07:00
|
|
|
/* W_MAX_TIMEOUT is the timeout period */
|
2013-03-18 11:44:55 -06:00
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
2016-02-28 12:02:55 -07:00
|
|
|
if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_TXONST))
|
2013-03-18 11:44:55 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (ww == W_MAX_TIMEOUT) {
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug(" DBG_PORT80(0x24)\n");
|
2013-03-18 21:55:38 -06:00
|
|
|
return false;
|
2013-03-18 11:44:55 -06:00
|
|
|
}
|
|
|
|
return true;
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Stop MAC function
|
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
2010-08-01 09:15:49 -06:00
|
|
|
* Return Value: true if success; otherwise false
|
2009-04-25 08:30:44 -06:00
|
|
|
*
|
|
|
|
*/
|
2015-11-22 02:07:22 -07:00
|
|
|
bool MACbSafeStop(struct vnt_private *priv)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2016-02-14 22:15:12 -07:00
|
|
|
|
2016-02-28 12:02:54 -07:00
|
|
|
MACvRegBitsOff(io_base, MAC_REG_TCR, TCR_AUTOBCNTX);
|
2013-03-18 11:44:55 -06:00
|
|
|
|
2015-11-22 02:07:22 -07:00
|
|
|
if (!MACbSafeRxOff(priv)) {
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug(" MACbSafeRxOff == false)\n");
|
2015-11-22 02:07:22 -07:00
|
|
|
MACbSafeSoftwareReset(priv);
|
2013-03-18 11:44:55 -06:00
|
|
|
return false;
|
|
|
|
}
|
2015-11-22 02:07:22 -07:00
|
|
|
if (!MACbSafeTxOff(priv)) {
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug(" MACbSafeTxOff == false)\n");
|
2015-11-22 02:07:22 -07:00
|
|
|
MACbSafeSoftwareReset(priv);
|
2013-03-18 11:44:55 -06:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-02-28 12:02:54 -07:00
|
|
|
MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN);
|
2013-03-18 11:44:55 -06:00
|
|
|
|
|
|
|
return true;
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Shut Down MAC
|
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
2010-08-01 09:15:49 -06:00
|
|
|
* Return Value: true if success; otherwise false
|
2009-04-25 08:30:44 -06:00
|
|
|
*
|
|
|
|
*/
|
2015-11-22 02:07:22 -07:00
|
|
|
bool MACbShutdown(struct vnt_private *priv)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2015-02-28 07:28:15 -07:00
|
|
|
/* disable MAC IMR */
|
2016-02-28 12:02:54 -07:00
|
|
|
MACvIntDisable(io_base);
|
2015-11-22 02:07:22 -07:00
|
|
|
MACvSetLoopbackMode(priv, MAC_LB_INTERNAL);
|
2015-02-28 07:28:15 -07:00
|
|
|
/* stop the adapter */
|
2015-11-22 02:07:22 -07:00
|
|
|
if (!MACbSafeStop(priv)) {
|
|
|
|
MACvSetLoopbackMode(priv, MAC_LB_NONE);
|
2013-03-18 11:44:55 -06:00
|
|
|
return false;
|
|
|
|
}
|
2015-11-22 02:07:22 -07:00
|
|
|
MACvSetLoopbackMode(priv, MAC_LB_NONE);
|
2013-03-18 11:44:55 -06:00
|
|
|
return true;
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Initialize MAC
|
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
|
|
|
* Return Value: none
|
|
|
|
*
|
|
|
|
*/
|
2015-11-22 02:07:22 -07:00
|
|
|
void MACvInitialize(struct vnt_private *priv)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2015-02-28 07:28:15 -07:00
|
|
|
/* clear sticky bits */
|
2016-02-28 12:02:54 -07:00
|
|
|
MACvClearStckDS(io_base);
|
2015-02-28 07:28:15 -07:00
|
|
|
/* disable force PME-enable */
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_PMC1, PME_OVR);
|
2015-02-28 07:28:15 -07:00
|
|
|
/* only 3253 A */
|
2013-03-18 11:44:55 -06:00
|
|
|
|
2015-02-28 07:28:15 -07:00
|
|
|
/* do reset */
|
2015-11-22 02:07:22 -07:00
|
|
|
MACbSoftwareReset(priv);
|
2013-03-18 11:44:55 -06:00
|
|
|
|
2015-02-28 07:28:15 -07:00
|
|
|
/* reset TSF counter */
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
|
2015-02-28 07:28:15 -07:00
|
|
|
/* enable TSF counter */
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Set the chip with current rx descriptor address
|
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
* dwCurrDescAddr - Descriptor Address
|
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
|
|
|
* Return Value: none
|
|
|
|
*
|
|
|
|
*/
|
2016-03-06 05:57:02 -07:00
|
|
|
void MACvSetCurrRx0DescAddr(struct vnt_private *priv, u32 dwCurrDescAddr)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2013-03-18 11:44:55 -06:00
|
|
|
unsigned short ww;
|
|
|
|
unsigned char byOrgDMACtl;
|
|
|
|
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvInPortB(io_base + MAC_REG_RXDMACTL0, &byOrgDMACtl);
|
2014-04-19 13:45:00 -06:00
|
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
|
2014-04-19 13:45:00 -06:00
|
|
|
|
2013-03-18 11:44:55 -06:00
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
2016-02-28 12:02:55 -07:00
|
|
|
if (!(ioread8(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
|
2013-03-18 11:44:55 -06:00
|
|
|
break;
|
|
|
|
}
|
2014-04-19 13:45:00 -06:00
|
|
|
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(dwCurrDescAddr, io_base + MAC_REG_RXDMAPTR0);
|
2014-04-19 13:45:00 -06:00
|
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_RXDMACTL0, DMACTL_RUN);
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Set the chip with current rx descriptor address
|
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
* dwCurrDescAddr - Descriptor Address
|
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
|
|
|
* Return Value: none
|
|
|
|
*
|
|
|
|
*/
|
2016-03-06 05:57:02 -07:00
|
|
|
void MACvSetCurrRx1DescAddr(struct vnt_private *priv, u32 dwCurrDescAddr)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2013-03-18 11:44:55 -06:00
|
|
|
unsigned short ww;
|
|
|
|
unsigned char byOrgDMACtl;
|
|
|
|
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvInPortB(io_base + MAC_REG_RXDMACTL1, &byOrgDMACtl);
|
2014-04-19 13:45:00 -06:00
|
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
|
2014-04-19 13:45:00 -06:00
|
|
|
|
2013-03-18 11:44:55 -06:00
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
2016-02-28 12:02:55 -07:00
|
|
|
if (!(ioread8(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
|
2013-03-18 11:44:55 -06:00
|
|
|
break;
|
|
|
|
}
|
2014-04-19 13:45:00 -06:00
|
|
|
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(dwCurrDescAddr, io_base + MAC_REG_RXDMAPTR1);
|
2014-04-19 13:45:00 -06:00
|
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_RXDMACTL1, DMACTL_RUN);
|
2014-04-19 13:45:00 -06:00
|
|
|
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Set the chip with current tx0 descriptor address
|
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
* dwCurrDescAddr - Descriptor Address
|
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
|
|
|
* Return Value: none
|
|
|
|
*
|
|
|
|
*/
|
2015-11-22 02:07:22 -07:00
|
|
|
void MACvSetCurrTx0DescAddrEx(struct vnt_private *priv,
|
2016-03-06 05:57:02 -07:00
|
|
|
u32 dwCurrDescAddr)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2013-03-18 11:44:55 -06:00
|
|
|
unsigned short ww;
|
|
|
|
unsigned char byOrgDMACtl;
|
|
|
|
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvInPortB(io_base + MAC_REG_TXDMACTL0, &byOrgDMACtl);
|
2014-04-19 13:45:00 -06:00
|
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
|
2014-04-19 13:45:00 -06:00
|
|
|
|
2013-03-18 11:44:55 -06:00
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
2016-02-28 12:02:55 -07:00
|
|
|
if (!(ioread8(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
|
2013-03-18 11:44:55 -06:00
|
|
|
break;
|
|
|
|
}
|
2014-04-19 13:45:00 -06:00
|
|
|
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(dwCurrDescAddr, io_base + MAC_REG_TXDMAPTR0);
|
2014-04-19 13:45:00 -06:00
|
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_TXDMACTL0, DMACTL_RUN);
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Set the chip with current AC0 descriptor address
|
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
* dwCurrDescAddr - Descriptor Address
|
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
|
|
|
* Return Value: none
|
|
|
|
*
|
|
|
|
*/
|
2015-02-28 07:28:15 -07:00
|
|
|
/* TxDMA1 = AC0DMA */
|
2015-11-22 02:07:22 -07:00
|
|
|
void MACvSetCurrAC0DescAddrEx(struct vnt_private *priv,
|
2016-03-06 05:57:02 -07:00
|
|
|
u32 dwCurrDescAddr)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2013-03-18 11:44:55 -06:00
|
|
|
unsigned short ww;
|
|
|
|
unsigned char byOrgDMACtl;
|
|
|
|
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvInPortB(io_base + MAC_REG_AC0DMACTL, &byOrgDMACtl);
|
2014-04-19 13:45:00 -06:00
|
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
|
2014-04-19 13:45:00 -06:00
|
|
|
|
2013-03-18 11:44:55 -06:00
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
2016-02-28 12:02:55 -07:00
|
|
|
if (!(ioread8(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
|
2013-03-18 11:44:55 -06:00
|
|
|
break;
|
|
|
|
}
|
2015-10-12 11:44:15 -06:00
|
|
|
if (ww == W_MAX_TIMEOUT)
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug(" DBG_PORT80(0x26)\n");
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(dwCurrDescAddr, io_base + MAC_REG_AC0DMAPTR);
|
2014-04-19 13:45:00 -06:00
|
|
|
if (byOrgDMACtl & DMACTL_RUN)
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_AC0DMACTL, DMACTL_RUN);
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
2015-11-22 02:07:22 -07:00
|
|
|
void MACvSetCurrTXDescAddr(int iTxType, struct vnt_private *priv,
|
2016-03-06 05:57:02 -07:00
|
|
|
u32 dwCurrDescAddr)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2014-04-19 13:45:00 -06:00
|
|
|
if (iTxType == TYPE_AC0DMA)
|
2015-11-22 02:07:22 -07:00
|
|
|
MACvSetCurrAC0DescAddrEx(priv, dwCurrDescAddr);
|
2014-04-19 13:45:00 -06:00
|
|
|
else if (iTxType == TYPE_TXDMA0)
|
2015-11-22 02:07:22 -07:00
|
|
|
MACvSetCurrTx0DescAddrEx(priv, dwCurrDescAddr);
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Micro Second Delay via MAC
|
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
* uDelay - Delay time (timer resolution is 4 us)
|
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
|
|
|
* Return Value: none
|
|
|
|
*
|
|
|
|
*/
|
2015-11-22 02:07:22 -07:00
|
|
|
void MACvTimer0MicroSDelay(struct vnt_private *priv, unsigned int uDelay)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2013-03-18 11:44:55 -06:00
|
|
|
unsigned char byValue;
|
|
|
|
unsigned int uu, ii;
|
|
|
|
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_TMCTL0, 0);
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(uDelay, io_base + MAC_REG_TMDATA0);
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
|
2015-02-28 07:28:15 -07:00
|
|
|
for (ii = 0; ii < 66; ii++) { /* assume max PCI clock is 66Mhz */
|
2013-03-18 11:44:55 -06:00
|
|
|
for (uu = 0; uu < uDelay; uu++) {
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvInPortB(io_base + MAC_REG_TMCTL0, &byValue);
|
2013-03-18 11:44:55 -06:00
|
|
|
if ((byValue == 0) ||
|
|
|
|
(byValue & TMCTL_TSUSP)) {
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_TMCTL0, 0);
|
2013-03-18 11:44:55 -06:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_TMCTL0, 0);
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Micro Second One shot timer via MAC
|
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
* uDelay - Delay time
|
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
|
|
|
* Return Value: none
|
|
|
|
*
|
|
|
|
*/
|
2015-11-22 02:07:22 -07:00
|
|
|
void MACvOneShotTimer1MicroSec(struct vnt_private *priv, unsigned int uDelayTime)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2015-11-22 02:07:22 -07:00
|
|
|
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_TMCTL1, 0);
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(uDelayTime, io_base + MAC_REG_TMDATA1);
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortB(io_base + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
2015-11-22 02:07:22 -07:00
|
|
|
void MACvSetMISCFifo(struct vnt_private *priv, unsigned short wOffset,
|
2016-03-06 05:57:02 -07:00
|
|
|
u32 dwData)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2015-11-22 02:07:22 -07:00
|
|
|
|
2013-03-18 11:44:55 -06:00
|
|
|
if (wOffset > 273)
|
|
|
|
return;
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortW(io_base + MAC_REG_MISCFFNDEX, wOffset);
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(dwData, io_base + MAC_REG_MISCFFDATA);
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortW(io_base + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
2015-11-22 02:07:22 -07:00
|
|
|
bool MACbPSWakeup(struct vnt_private *priv)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2013-03-18 11:44:55 -06:00
|
|
|
unsigned char byOrgValue;
|
|
|
|
unsigned int ww;
|
2015-02-28 07:28:15 -07:00
|
|
|
/* Read PSCTL */
|
2015-11-22 02:07:22 -07:00
|
|
|
if (MACbIsRegBitsOff(priv, MAC_REG_PSCTL, PSCTL_PS))
|
2013-03-18 11:44:55 -06:00
|
|
|
return true;
|
2014-04-19 13:45:00 -06:00
|
|
|
|
2015-02-28 07:28:15 -07:00
|
|
|
/* Disable PS */
|
2016-02-28 12:02:54 -07:00
|
|
|
MACvRegBitsOff(io_base, MAC_REG_PSCTL, PSCTL_PSEN);
|
2013-03-18 11:44:55 -06:00
|
|
|
|
2015-02-28 07:28:15 -07:00
|
|
|
/* Check if SyncFlushOK */
|
2013-03-18 11:44:55 -06:00
|
|
|
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvInPortB(io_base + MAC_REG_PSCTL, &byOrgValue);
|
2013-03-18 11:44:55 -06:00
|
|
|
if (byOrgValue & PSCTL_WAKEDONE)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (ww == W_MAX_TIMEOUT) {
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug(" DBG_PORT80(0x33)\n");
|
2013-03-18 11:44:55 -06:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
return true;
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Set the Key by MISCFIFO
|
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
*
|
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
|
|
|
* Return Value: none
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
2015-11-22 02:07:22 -07:00
|
|
|
void MACvSetKeyEntry(struct vnt_private *priv, unsigned short wKeyCtl,
|
2015-04-26 06:40:23 -06:00
|
|
|
unsigned int uEntryIdx, unsigned int uKeyIdx,
|
|
|
|
unsigned char *pbyAddr, u32 *pdwKey,
|
|
|
|
unsigned char byLocalID)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2013-03-18 11:44:55 -06:00
|
|
|
unsigned short wOffset;
|
2014-03-06 15:44:22 -07:00
|
|
|
u32 dwData;
|
2013-03-18 11:44:55 -06:00
|
|
|
int ii;
|
|
|
|
|
|
|
|
if (byLocalID <= 1)
|
|
|
|
return;
|
|
|
|
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug("MACvSetKeyEntry\n");
|
2013-03-18 11:44:55 -06:00
|
|
|
wOffset = MISCFIFO_KEYETRY0;
|
|
|
|
wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
|
|
|
|
|
|
|
|
dwData = 0;
|
|
|
|
dwData |= wKeyCtl;
|
|
|
|
dwData <<= 16;
|
|
|
|
dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug("1. wOffset: %d, Data: %X, KeyCtl:%X\n",
|
|
|
|
wOffset, dwData, wKeyCtl);
|
2013-03-18 11:44:55 -06:00
|
|
|
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortW(io_base + MAC_REG_MISCFFNDEX, wOffset);
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(dwData, io_base + MAC_REG_MISCFFDATA);
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortW(io_base + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
|
2013-03-18 11:44:55 -06:00
|
|
|
wOffset++;
|
|
|
|
|
|
|
|
dwData = 0;
|
|
|
|
dwData |= *(pbyAddr+3);
|
|
|
|
dwData <<= 8;
|
|
|
|
dwData |= *(pbyAddr+2);
|
|
|
|
dwData <<= 8;
|
|
|
|
dwData |= *(pbyAddr+1);
|
|
|
|
dwData <<= 8;
|
|
|
|
dwData |= *(pbyAddr+0);
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug("2. wOffset: %d, Data: %X\n", wOffset, dwData);
|
2013-03-18 11:44:55 -06:00
|
|
|
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortW(io_base + MAC_REG_MISCFFNDEX, wOffset);
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(dwData, io_base + MAC_REG_MISCFFDATA);
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortW(io_base + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
|
2013-03-18 11:44:55 -06:00
|
|
|
wOffset++;
|
|
|
|
|
|
|
|
wOffset += (uKeyIdx * 4);
|
|
|
|
for (ii = 0; ii < 4; ii++) {
|
2015-02-28 07:28:15 -07:00
|
|
|
/* always push 128 bits */
|
2014-08-17 10:17:04 -06:00
|
|
|
pr_debug("3.(%d) wOffset: %d, Data: %X\n",
|
|
|
|
ii, wOffset+ii, *pdwKey);
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortW(io_base + MAC_REG_MISCFFNDEX, wOffset+ii);
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(*pdwKey++, io_base + MAC_REG_MISCFFDATA);
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortW(io_base + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
|
2013-03-18 11:44:55 -06:00
|
|
|
}
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Description:
|
|
|
|
* Disable the Key Entry by MISCFIFO
|
|
|
|
*
|
|
|
|
* Parameters:
|
|
|
|
* In:
|
2016-02-28 12:02:54 -07:00
|
|
|
* io_base - Base Address for MAC
|
2009-04-25 08:30:44 -06:00
|
|
|
*
|
|
|
|
* Out:
|
|
|
|
* none
|
|
|
|
*
|
|
|
|
* Return Value: none
|
|
|
|
*
|
|
|
|
*/
|
2015-11-22 02:07:22 -07:00
|
|
|
void MACvDisableKeyEntry(struct vnt_private *priv, unsigned int uEntryIdx)
|
2009-04-25 08:30:44 -06:00
|
|
|
{
|
2016-02-28 12:02:54 -07:00
|
|
|
void __iomem *io_base = priv->PortOffset;
|
2013-03-18 11:44:55 -06:00
|
|
|
unsigned short wOffset;
|
2009-04-25 08:30:44 -06:00
|
|
|
|
2013-03-18 11:44:55 -06:00
|
|
|
wOffset = MISCFIFO_KEYETRY0;
|
|
|
|
wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
|
2009-04-25 08:30:44 -06:00
|
|
|
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortW(io_base + MAC_REG_MISCFFNDEX, wOffset);
|
2016-03-06 05:57:03 -07:00
|
|
|
iowrite32(0, io_base + MAC_REG_MISCFFDATA);
|
2016-02-28 12:02:54 -07:00
|
|
|
VNSvOutPortW(io_base + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
|
2009-04-25 08:30:44 -06:00
|
|
|
}
|