2007-07-16 10:43:43 -06:00
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/*
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* Common CPM code
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*
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* Author: Scott Wood <scottwood@freescale.com>
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*
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2010-03-26 02:43:46 -06:00
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* Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
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2007-07-16 10:43:43 -06:00
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*
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2007-09-28 13:06:16 -06:00
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* Some parts derived from commproc.c/cpm2_common.c, which is:
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* Copyright (c) 1997 Dan error_act (dmalek@jlc.net)
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* Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
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* Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
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* 2006 (c) MontaVista Software, Inc.
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* Vitaly Bordug <vbordug@ru.mvista.com>
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*
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2007-07-16 10:43:43 -06:00
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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2007-09-28 13:06:16 -06:00
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#include <linux/of_device.h>
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2008-07-28 02:43:22 -06:00
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#include <linux/spinlock.h>
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2011-05-27 08:46:24 -06:00
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#include <linux/export.h>
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2008-07-28 02:43:22 -06:00
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#include <linux/of.h>
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2013-09-26 06:40:04 -06:00
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#include <linux/of_address.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
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#include <linux/slab.h>
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2007-09-28 13:06:16 -06:00
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2007-07-16 10:43:43 -06:00
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#include <asm/udbg.h>
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#include <asm/io.h>
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2007-09-28 13:06:16 -06:00
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#include <asm/cpm.h>
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powerpc/8xx: Fix vaddr for IMMR early remap
Memory: 124428K/131072K available (3748K kernel code, 188K rwdata,
648K rodata, 508K init, 290K bss, 6644K reserved)
Kernel virtual memory layout:
* 0xfffdf000..0xfffff000 : fixmap
* 0xfde00000..0xfe000000 : consistent mem
* 0xfddf6000..0xfde00000 : early ioremap
* 0xc9000000..0xfddf6000 : vmalloc & ioremap
SLUB: HWalign=16, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Today, IMMR is mapped 1:1 at startup
Mapping IMMR 1:1 is just wrong because it may overlap with another
area. On most mpc8xx boards it is OK as IMMR is set to 0xff000000
but for instance on EP88xC board, IMMR is at 0xfa200000 which
overlaps with VM ioremap area
This patch fixes the virtual address for remapping IMMR with the fixmap
regardless of the value of IMMR.
The size of IMMR area is 256kbytes (CPM at offset 0, security engine
at offset 128k) so a 512k page is enough
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
2016-05-17 01:02:43 -06:00
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#include <asm/fixmap.h>
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2015-11-29 19:48:57 -07:00
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#include <soc/fsl/qe/qe.h>
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2007-09-28 13:06:16 -06:00
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2007-07-16 10:43:43 -06:00
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#include <mm/mmu_decl.h>
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2008-07-28 02:43:22 -06:00
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#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
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#include <linux/of_gpio.h>
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#endif
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2007-07-16 10:43:43 -06:00
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#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
|
powerpc/8xx: Fix vaddr for IMMR early remap
Memory: 124428K/131072K available (3748K kernel code, 188K rwdata,
648K rodata, 508K init, 290K bss, 6644K reserved)
Kernel virtual memory layout:
* 0xfffdf000..0xfffff000 : fixmap
* 0xfde00000..0xfe000000 : consistent mem
* 0xfddf6000..0xfde00000 : early ioremap
* 0xc9000000..0xfddf6000 : vmalloc & ioremap
SLUB: HWalign=16, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Today, IMMR is mapped 1:1 at startup
Mapping IMMR 1:1 is just wrong because it may overlap with another
area. On most mpc8xx boards it is OK as IMMR is set to 0xff000000
but for instance on EP88xC board, IMMR is at 0xfa200000 which
overlaps with VM ioremap area
This patch fixes the virtual address for remapping IMMR with the fixmap
regardless of the value of IMMR.
The size of IMMR area is 256kbytes (CPM at offset 0, security engine
at offset 128k) so a 512k page is enough
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
2016-05-17 01:02:43 -06:00
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static u32 __iomem *cpm_udbg_txdesc;
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static u8 __iomem *cpm_udbg_txbuf;
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2007-07-16 10:43:43 -06:00
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static void udbg_putc_cpm(char c)
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{
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if (c == '\n')
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2008-06-27 14:01:00 -06:00
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udbg_putc_cpm('\r');
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2007-07-16 10:43:43 -06:00
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while (in_be32(&cpm_udbg_txdesc[0]) & 0x80000000)
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;
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|
powerpc/8xx: Fix vaddr for IMMR early remap
Memory: 124428K/131072K available (3748K kernel code, 188K rwdata,
648K rodata, 508K init, 290K bss, 6644K reserved)
Kernel virtual memory layout:
* 0xfffdf000..0xfffff000 : fixmap
* 0xfde00000..0xfe000000 : consistent mem
* 0xfddf6000..0xfde00000 : early ioremap
* 0xc9000000..0xfddf6000 : vmalloc & ioremap
SLUB: HWalign=16, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Today, IMMR is mapped 1:1 at startup
Mapping IMMR 1:1 is just wrong because it may overlap with another
area. On most mpc8xx boards it is OK as IMMR is set to 0xff000000
but for instance on EP88xC board, IMMR is at 0xfa200000 which
overlaps with VM ioremap area
This patch fixes the virtual address for remapping IMMR with the fixmap
regardless of the value of IMMR.
The size of IMMR area is 256kbytes (CPM at offset 0, security engine
at offset 128k) so a 512k page is enough
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
2016-05-17 01:02:43 -06:00
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out_8(cpm_udbg_txbuf, c);
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2007-07-16 10:43:43 -06:00
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out_be32(&cpm_udbg_txdesc[0], 0xa0000001);
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}
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void __init udbg_init_cpm(void)
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{
|
powerpc/8xx: Fix vaddr for IMMR early remap
Memory: 124428K/131072K available (3748K kernel code, 188K rwdata,
648K rodata, 508K init, 290K bss, 6644K reserved)
Kernel virtual memory layout:
* 0xfffdf000..0xfffff000 : fixmap
* 0xfde00000..0xfe000000 : consistent mem
* 0xfddf6000..0xfde00000 : early ioremap
* 0xc9000000..0xfddf6000 : vmalloc & ioremap
SLUB: HWalign=16, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Today, IMMR is mapped 1:1 at startup
Mapping IMMR 1:1 is just wrong because it may overlap with another
area. On most mpc8xx boards it is OK as IMMR is set to 0xff000000
but for instance on EP88xC board, IMMR is at 0xfa200000 which
overlaps with VM ioremap area
This patch fixes the virtual address for remapping IMMR with the fixmap
regardless of the value of IMMR.
The size of IMMR area is 256kbytes (CPM at offset 0, security engine
at offset 128k) so a 512k page is enough
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
2016-05-17 01:02:43 -06:00
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#ifdef CONFIG_PPC_8xx
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cpm_udbg_txdesc = (u32 __iomem __force *)
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(CONFIG_PPC_EARLY_DEBUG_CPM_ADDR - PHYS_IMMR_BASE +
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VIRT_IMMR_BASE);
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cpm_udbg_txbuf = (u8 __iomem __force *)
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(in_be32(&cpm_udbg_txdesc[1]) - PHYS_IMMR_BASE +
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VIRT_IMMR_BASE);
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#else
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cpm_udbg_txdesc = (u32 __iomem __force *)
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CONFIG_PPC_EARLY_DEBUG_CPM_ADDR;
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cpm_udbg_txbuf = (u8 __iomem __force *)in_be32(&cpm_udbg_txdesc[1]);
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#endif
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2007-07-16 10:43:43 -06:00
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if (cpm_udbg_txdesc) {
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#ifdef CONFIG_CPM2
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2009-03-19 13:34:08 -06:00
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setbat(1, 0xf0000000, 0xf0000000, 1024*1024, PAGE_KERNEL_NCG);
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2007-07-16 10:43:43 -06:00
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#endif
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udbg_putc = udbg_putc_cpm;
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}
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}
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#endif
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2007-09-28 13:06:16 -06:00
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2008-07-28 02:43:22 -06:00
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#if defined(CONFIG_CPM2) || defined(CONFIG_8xx_GPIO)
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struct cpm2_ioports {
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u32 dir, par, sor, odr, dat;
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u32 res[3];
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};
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struct cpm2_gpio32_chip {
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struct of_mm_gpio_chip mm_gc;
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spinlock_t lock;
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/* shadowed data register to clear/set bits safely */
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u32 cpdata;
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};
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static void cpm2_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
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{
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2016-08-11 02:50:40 -06:00
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struct cpm2_gpio32_chip *cpm2_gc =
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container_of(mm_gc, struct cpm2_gpio32_chip, mm_gc);
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2008-07-28 02:43:22 -06:00
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struct cpm2_ioports __iomem *iop = mm_gc->regs;
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cpm2_gc->cpdata = in_be32(&iop->dat);
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}
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static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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struct cpm2_ioports __iomem *iop = mm_gc->regs;
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u32 pin_mask;
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pin_mask = 1 << (31 - gpio);
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return !!(in_be32(&iop->dat) & pin_mask);
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}
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2008-08-19 06:20:23 -06:00
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static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,
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int value)
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2008-07-28 02:43:22 -06:00
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{
|
2015-12-08 07:05:43 -07:00
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struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(&mm_gc->gc);
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2008-07-28 02:43:22 -06:00
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struct cpm2_ioports __iomem *iop = mm_gc->regs;
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if (value)
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cpm2_gc->cpdata |= pin_mask;
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else
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cpm2_gc->cpdata &= ~pin_mask;
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out_be32(&iop->dat, cpm2_gc->cpdata);
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2008-08-19 06:20:23 -06:00
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}
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static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
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2015-12-08 07:05:43 -07:00
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struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc);
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2008-08-19 06:20:23 -06:00
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unsigned long flags;
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u32 pin_mask = 1 << (31 - gpio);
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spin_lock_irqsave(&cpm2_gc->lock, flags);
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__cpm2_gpio32_set(mm_gc, pin_mask, value);
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2008-07-28 02:43:22 -06:00
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spin_unlock_irqrestore(&cpm2_gc->lock, flags);
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}
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static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
|
2015-12-08 07:05:43 -07:00
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struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc);
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2008-07-28 02:43:22 -06:00
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struct cpm2_ioports __iomem *iop = mm_gc->regs;
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2008-08-19 06:20:23 -06:00
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unsigned long flags;
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u32 pin_mask = 1 << (31 - gpio);
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2008-07-28 02:43:22 -06:00
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2008-08-19 06:20:23 -06:00
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spin_lock_irqsave(&cpm2_gc->lock, flags);
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2008-07-28 02:43:22 -06:00
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setbits32(&iop->dir, pin_mask);
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2008-08-19 06:20:23 -06:00
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__cpm2_gpio32_set(mm_gc, pin_mask, val);
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2008-07-28 02:43:22 -06:00
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2008-08-19 06:20:23 -06:00
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spin_unlock_irqrestore(&cpm2_gc->lock, flags);
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2008-07-28 02:43:22 -06:00
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return 0;
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}
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static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
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{
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struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
|
2015-12-08 07:05:43 -07:00
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struct cpm2_gpio32_chip *cpm2_gc = gpiochip_get_data(gc);
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2008-07-28 02:43:22 -06:00
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struct cpm2_ioports __iomem *iop = mm_gc->regs;
|
2008-08-19 06:20:23 -06:00
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unsigned long flags;
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u32 pin_mask = 1 << (31 - gpio);
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2008-07-28 02:43:22 -06:00
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2008-08-19 06:20:23 -06:00
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spin_lock_irqsave(&cpm2_gc->lock, flags);
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2008-07-28 02:43:22 -06:00
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clrbits32(&iop->dir, pin_mask);
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2008-08-19 06:20:23 -06:00
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spin_unlock_irqrestore(&cpm2_gc->lock, flags);
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2008-07-28 02:43:22 -06:00
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return 0;
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}
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int cpm2_gpiochip_add32(struct device_node *np)
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{
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struct cpm2_gpio32_chip *cpm2_gc;
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struct of_mm_gpio_chip *mm_gc;
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struct gpio_chip *gc;
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cpm2_gc = kzalloc(sizeof(*cpm2_gc), GFP_KERNEL);
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if (!cpm2_gc)
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return -ENOMEM;
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spin_lock_init(&cpm2_gc->lock);
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mm_gc = &cpm2_gc->mm_gc;
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2010-06-08 07:48:16 -06:00
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gc = &mm_gc->gc;
|
2008-07-28 02:43:22 -06:00
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mm_gc->save_regs = cpm2_gpio32_save_regs;
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gc->ngpio = 32;
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gc->direction_input = cpm2_gpio32_dir_in;
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gc->direction_output = cpm2_gpio32_dir_out;
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gc->get = cpm2_gpio32_get;
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gc->set = cpm2_gpio32_set;
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2015-12-08 07:05:43 -07:00
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return of_mm_gpiochip_add_data(np, mm_gc, cpm2_gc);
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2008-07-28 02:43:22 -06:00
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}
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#endif /* CONFIG_CPM2 || CONFIG_8xx_GPIO */
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