2017-07-31 01:36:37 -06:00
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/*
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* Copyright (c) 2017 MediaTek Inc.
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* Author: John Crispin <john@phrozen.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include "mt7623n-rfb.dtsi"
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/ {
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model = "MediaTek MT7623N NAND reference board";
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compatible = "mediatek,mt7623n-rfb-nand", "mediatek,mt7623";
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};
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2017-07-31 01:36:41 -06:00
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2017-08-03 21:59:35 -06:00
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&bch {
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status = "okay";
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2017-07-31 01:36:41 -06:00
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};
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&nandc {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&nand_pins_default>;
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2017-08-03 21:59:35 -06:00
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2017-07-31 01:36:41 -06:00
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nand@0 {
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reg = <0>;
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spare_per_sector = <64>;
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nand-ecc-mode = "hw";
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nand-ecc-strength = <12>;
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nand-ecc-step-size = <1024>;
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2017-08-03 21:59:35 -06:00
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2017-07-31 01:36:41 -06:00
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "preloader";
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reg = <0x0 0x40000>;
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};
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partition@40000 {
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label = "uboot";
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reg = <0x40000 0x80000>;
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};
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partition@C0000 {
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label = "uboot-env";
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reg = <0xC0000 0x40000>;
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};
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partition@140000 {
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label = "bootimg";
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reg = <0x140000 0x2000000>;
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};
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partition@2140000 {
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label = "recovery";
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reg = <0x2140000 0x2000000>;
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};
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partition@4140000 {
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label = "rootfs";
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reg = <0x4140000 0x1000000>;
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};
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partition@5140000 {
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label = "usrdata";
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reg = <0x5140000 0x1000000>;
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};
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};
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};
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};
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2017-08-03 21:59:35 -06:00
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&pio {
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nand_pins_default: nanddefault {
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pins_ale {
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pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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pins_dat {
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pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
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<MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
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<MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
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<MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>,
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<MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>,
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<MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>,
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<MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>,
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<MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>,
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<MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>;
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input-enable;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up;
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};
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pins_we {
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pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
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};
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};
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2017-07-31 01:36:41 -06:00
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};
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