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ARM: dts: r8a7743: add VIN dt support 

Add VIN[012] support to SoC dt. Also, add aliases.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
hifive-unleashed-5.1
Fabrizio Castro 2017-11-16 18:22:50 +00:00 committed by Simon Horman
parent b3a0317e31
commit 001b32ae64
1 changed files with 36 additions and 0 deletions
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36
arch/arm/boot/dts/r8a7743.dtsi
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@ -32,6 +32,9 @@
spi1 = &msiof0;
spi2 = &msiof1;
spi3 = &msiof2;
vin0 = &vin0;
vin1 = &vin1;
vin2 = &vin2;
};
cpus {
@ -1037,6 +1040,39 @@
};
};
vin0: video@e6ef0000 {
compatible = "renesas,vin-r8a7743",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef0000 0 0x1000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 811>;
status = "disabled";
};
vin1: video@e6ef1000 {
compatible = "renesas,vin-r8a7743",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef1000 0 0x1000>;
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 810>;
status = "disabled";
};
vin2: video@e6ef2000 {
compatible = "renesas,vin-r8a7743",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef2000 0 0x1000>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 809>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 809>;
status = "disabled";
};
du: display@feb00000 {
compatible = "renesas,du-r8a7743";
reg = <0 0xfeb00000 0 0x40000>,