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rtc: rv3028: fix clock output support

rv3028_clkout_set_rate unconditionally sets RV3028_CLKOUT_CLKOE but
clk_set_rate may be called with the clock disabled. Ensure the clock is
kept disabled if it was not yet enabled.

Also, the actual rate was overwritten when enabling the clock, properly
write to the register only once.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20201009153101.721149-1-alexandre.belloni@bootlin.com
zero-sugar-mainline-defconfig
Alexandre Belloni 2020-10-09 17:30:58 +02:00
parent 770c03e6da
commit 00e8e87f10
1 changed files with 9 additions and 10 deletions

View File

@ -619,24 +619,23 @@ static int rv3028_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
int i, ret;
u32 enabled;
struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &enabled);
if (ret < 0)
return ret;
ret = regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0);
if (ret < 0)
return ret;
for (i = 0; i < ARRAY_SIZE(clkout_rates); i++) {
if (clkout_rates[i] == rate) {
ret = regmap_update_bits(rv3028->regmap,
RV3028_CLKOUT,
RV3028_CLKOUT_FD_MASK, i);
if (ret < 0)
return ret;
enabled &= RV3028_CLKOUT_CLKOE;
for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
if (clkout_rates[i] == rate)
return regmap_write(rv3028->regmap, RV3028_CLKOUT,
RV3028_CLKOUT_CLKSY | RV3028_CLKOUT_CLKOE);
}
}
RV3028_CLKOUT_CLKSY | enabled | i);
return -EINVAL;
}