staging: qlge: replace pr_err with netdev_err
Replace all pr_errs with netdev_err. Suggested-by: Joe Perches <joe@perches.com> Signed-off-by: Coiby Xu <coiby.xu@gmail.com> Reviewed-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20200627145857.15926-5-coiby.xu@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>zero-sugar-mainline-defconfig
Coiby Xu
Greg Kroah-Hartman
parent
ae7368f9a3
commit
0107635e15
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@ -647,7 +647,7 @@ static void ql_get_mac_protocol_registers(struct ql_adapter *qdev, u32 *buf)
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max_offset = MAC_ADDR_MAX_MGMT_TU_DP_WCOUNT;
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break;
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default:
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pr_err("Bad type!!! 0x%08x\n", type);
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netdev_err(qdev->ndev, "Bad type!!! 0x%08x\n", type);
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max_index = 0;
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max_offset = 0;
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break;
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@ -1335,9 +1335,8 @@ static void ql_dump_intr_states(struct ql_adapter *qdev)
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for (i = 0; i < qdev->intr_count; i++) {
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ql_write32(qdev, INTR_EN, qdev->intr_context[i].intr_read_mask);
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value = ql_read32(qdev, INTR_EN);
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pr_err("%s: Interrupt %d is %s\n",
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qdev->ndev->name, i,
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(value & INTR_EN_EN ? "enabled" : "disabled"));
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netdev_err(qdev->ndev, "Interrupt %d is %s\n", i,
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(value & INTR_EN_EN ? "enabled" : "disabled"));
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}
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}
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@ -1345,13 +1344,14 @@ static void ql_dump_intr_states(struct ql_adapter *qdev)
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do { \
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u32 data; \
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ql_read_xgmac_reg(qdev, reg, &data); \
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pr_err("%s: %s = 0x%.08x\n", qdev->ndev->name, #reg, data); \
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netdev_err(qdev->ndev, "%s = 0x%.08x\n", #reg, data); \
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} while (0)
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void ql_dump_xgmac_control_regs(struct ql_adapter *qdev)
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{
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if (ql_sem_spinlock(qdev, qdev->xg_sem_mask)) {
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pr_err("%s: Couldn't get xgmac sem\n", __func__);
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netdev_err(qdev->ndev, "%s: Couldn't get xgmac sem\n",
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__func__);
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return;
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}
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DUMP_XGMAC(qdev, PAUSE_SRC_LO);
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@ -1388,25 +1388,28 @@ static void ql_dump_cam_entries(struct ql_adapter *qdev)
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return;
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for (i = 0; i < 4; i++) {
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if (ql_get_mac_addr_reg(qdev, MAC_ADDR_TYPE_CAM_MAC, i, value)) {
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pr_err("%s: Failed read of mac index register\n",
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__func__);
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netdev_err(qdev->ndev,
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"%s: Failed read of mac index register\n",
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__func__);
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break;
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}
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if (value[0])
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pr_err("%s: CAM index %d CAM Lookup Lower = 0x%.08x:%.08x, Output = 0x%.08x\n",
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qdev->ndev->name, i, value[1], value[0],
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value[2]);
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netdev_err(qdev->ndev,
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"CAM index %d CAM Lookup Lower = 0x%.08x:%.08x, Output = 0x%.08x\n",
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i, value[1], value[0], value[2]);
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}
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for (i = 0; i < 32; i++) {
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if (ql_get_mac_addr_reg
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(qdev, MAC_ADDR_TYPE_MULTI_MAC, i, value)) {
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pr_err("%s: Failed read of mac index register\n",
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__func__);
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netdev_err(qdev->ndev,
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"%s: Failed read of mac index register\n",
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__func__);
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break;
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}
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if (value[0])
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pr_err("%s: MCAST index %d CAM Lookup Lower = 0x%.08x:%.08x\n",
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qdev->ndev->name, i, value[1], value[0]);
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netdev_err(qdev->ndev,
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"MCAST index %d CAM Lookup Lower = 0x%.08x:%.08x\n",
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i, value[1], value[0]);
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}
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ql_sem_unlock(qdev, SEM_MAC_ADDR_MASK);
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}
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@ -1422,23 +1425,25 @@ void ql_dump_routing_entries(struct ql_adapter *qdev)
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for (i = 0; i < 16; i++) {
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value = 0;
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if (ql_get_routing_reg(qdev, i, &value)) {
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pr_err("%s: Failed read of routing index register\n",
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__func__);
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netdev_err(qdev->ndev,
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"%s: Failed read of routing index register\n",
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__func__);
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break;
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}
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if (value)
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pr_err("%s: Routing Mask %d = 0x%.08x\n",
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qdev->ndev->name, i, value);
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netdev_err(qdev->ndev,
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"%s: Routing Mask %d = 0x%.08x\n",
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i, value);
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}
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ql_sem_unlock(qdev, SEM_RT_IDX_MASK);
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}
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#define DUMP_REG(qdev, reg) \
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pr_err("%-32s= 0x%x\n", #reg, ql_read32(qdev, reg))
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netdev_err(qdev->ndev, "%-32s= 0x%x\n", #reg, ql_read32(qdev, reg))
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void ql_dump_regs(struct ql_adapter *qdev)
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{
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pr_err("reg dump for function #%d\n", qdev->func);
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netdev_err(qdev->ndev, "reg dump for function #%d\n", qdev->func);
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DUMP_REG(qdev, SYS);
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DUMP_REG(qdev, RST_FO);
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DUMP_REG(qdev, FSC);
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@ -1503,11 +1508,12 @@ void ql_dump_regs(struct ql_adapter *qdev)
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#ifdef QL_STAT_DUMP
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#define DUMP_STAT(qdev, stat) \
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pr_err("%s = %ld\n", #stat, (unsigned long)(qdev)->nic_stats.stat)
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netdev_err(qdev->ndev, "%s = %ld\n", #stat, \
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(unsigned long)(qdev)->nic_stats.stat)
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void ql_dump_stat(struct ql_adapter *qdev)
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{
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pr_err("%s: Enter\n", __func__);
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netdev_err(qdev->ndev, "%s: Enter\n", __func__);
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DUMP_STAT(qdev, tx_pkts);
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DUMP_STAT(qdev, tx_bytes);
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DUMP_STAT(qdev, tx_mcast_pkts);
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@ -1556,11 +1562,12 @@ void ql_dump_stat(struct ql_adapter *qdev)
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#ifdef QL_DEV_DUMP
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#define DUMP_QDEV_FIELD(qdev, type, field) \
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pr_err("qdev->%-24s = " type "\n", #field, (qdev)->field)
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netdev_err(qdev->ndev, "qdev->%-24s = " type "\n", #field, (qdev)->field)
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#define DUMP_QDEV_DMA_FIELD(qdev, field) \
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pr_err("qdev->%-24s = %llx\n", #field, (unsigned long long)qdev->field)
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netdev_err(qdev->ndev, "qdev->%-24s = %llx\n", #field, \
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(unsigned long long)qdev->field)
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#define DUMP_QDEV_ARRAY(qdev, type, array, index, field) \
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pr_err("%s[%d].%s = " type "\n", \
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netdev_err(qdev->ndev, "%s[%d].%s = " type "\n", \
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#array, index, #field, (qdev)->array[index].field)
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void ql_dump_qdev(struct ql_adapter *qdev)
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{
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@ -1611,99 +1618,100 @@ void ql_dump_qdev(struct ql_adapter *qdev)
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#ifdef QL_CB_DUMP
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void ql_dump_wqicb(struct wqicb *wqicb)
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{
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pr_err("Dumping wqicb stuff...\n");
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pr_err("wqicb->len = 0x%x\n", le16_to_cpu(wqicb->len));
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pr_err("wqicb->flags = %x\n", le16_to_cpu(wqicb->flags));
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pr_err("wqicb->cq_id_rss = %d\n",
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le16_to_cpu(wqicb->cq_id_rss));
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pr_err("wqicb->rid = 0x%x\n", le16_to_cpu(wqicb->rid));
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pr_err("wqicb->wq_addr = 0x%llx\n",
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(unsigned long long)le64_to_cpu(wqicb->addr));
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pr_err("wqicb->wq_cnsmr_idx_addr = 0x%llx\n",
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(unsigned long long)le64_to_cpu(wqicb->cnsmr_idx_addr));
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netdev_err(qdev->ndev, "Dumping wqicb stuff...\n");
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netdev_err(qdev->ndev, "wqicb->len = 0x%x\n", le16_to_cpu(wqicb->len));
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netdev_err(qdev->ndev, "wqicb->flags = %x\n",
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le16_to_cpu(wqicb->flags));
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netdev_err(qdev->ndev, "wqicb->cq_id_rss = %d\n",
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le16_to_cpu(wqicb->cq_id_rss));
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netdev_err(qdev->ndev, "wqicb->rid = 0x%x\n", le16_to_cpu(wqicb->rid));
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netdev_err(qdev->ndev, "wqicb->wq_addr = 0x%llx\n",
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(unsigned long long)le64_to_cpu(wqicb->addr));
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netdev_err(qdev->ndev, "wqicb->wq_cnsmr_idx_addr = 0x%llx\n",
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(unsigned long long)le64_to_cpu(wqicb->cnsmr_idx_addr));
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}
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void ql_dump_tx_ring(struct tx_ring *tx_ring)
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{
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if (!tx_ring)
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return;
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pr_err("===================== Dumping tx_ring %d ===============\n",
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tx_ring->wq_id);
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pr_err("tx_ring->base = %p\n", tx_ring->wq_base);
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pr_err("tx_ring->base_dma = 0x%llx\n",
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(unsigned long long)tx_ring->wq_base_dma);
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pr_err("tx_ring->cnsmr_idx_sh_reg, addr = 0x%p, value = %d\n",
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tx_ring->cnsmr_idx_sh_reg,
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tx_ring->cnsmr_idx_sh_reg
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netdev_err(qdev->ndev, "===================== Dumping tx_ring %d ===============\n",
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tx_ring->wq_id);
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netdev_err(qdev->ndev, "tx_ring->base = %p\n", tx_ring->wq_base);
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netdev_err(qdev->ndev, "tx_ring->base_dma = 0x%llx\n",
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(unsigned long long)tx_ring->wq_base_dma);
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netdev_err(qdev->ndev, "tx_ring->cnsmr_idx_sh_reg, addr = 0x%p, value = %d\n",
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tx_ring->cnsmr_idx_sh_reg,
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tx_ring->cnsmr_idx_sh_reg
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? ql_read_sh_reg(tx_ring->cnsmr_idx_sh_reg) : 0);
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pr_err("tx_ring->size = %d\n", tx_ring->wq_size);
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pr_err("tx_ring->len = %d\n", tx_ring->wq_len);
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pr_err("tx_ring->prod_idx_db_reg = %p\n", tx_ring->prod_idx_db_reg);
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pr_err("tx_ring->valid_db_reg = %p\n", tx_ring->valid_db_reg);
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pr_err("tx_ring->prod_idx = %d\n", tx_ring->prod_idx);
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pr_err("tx_ring->cq_id = %d\n", tx_ring->cq_id);
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pr_err("tx_ring->wq_id = %d\n", tx_ring->wq_id);
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pr_err("tx_ring->q = %p\n", tx_ring->q);
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pr_err("tx_ring->tx_count = %d\n", atomic_read(&tx_ring->tx_count));
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netdev_err(qdev->ndev, "tx_ring->size = %d\n", tx_ring->wq_size);
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netdev_err(qdev->ndev, "tx_ring->len = %d\n", tx_ring->wq_len);
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netdev_err(qdev->ndev, "tx_ring->prod_idx_db_reg = %p\n", tx_ring->prod_idx_db_reg);
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netdev_err(qdev->ndev, "tx_ring->valid_db_reg = %p\n", tx_ring->valid_db_reg);
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netdev_err(qdev->ndev, "tx_ring->prod_idx = %d\n", tx_ring->prod_idx);
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netdev_err(qdev->ndev, "tx_ring->cq_id = %d\n", tx_ring->cq_id);
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netdev_err(qdev->ndev, "tx_ring->wq_id = %d\n", tx_ring->wq_id);
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netdev_err(qdev->ndev, "tx_ring->q = %p\n", tx_ring->q);
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netdev_err(qdev->ndev, "tx_ring->tx_count = %d\n", atomic_read(&tx_ring->tx_count));
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}
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void ql_dump_ricb(struct ricb *ricb)
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{
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int i;
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pr_err("===================== Dumping ricb ===============\n");
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pr_err("Dumping ricb stuff...\n");
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netdev_err(qdev->ndev, "===================== Dumping ricb ===============\n");
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netdev_err(qdev->ndev, "Dumping ricb stuff...\n");
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pr_err("ricb->base_cq = %d\n", ricb->base_cq & 0x1f);
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pr_err("ricb->flags = %s%s%s%s%s%s%s%s%s\n",
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ricb->base_cq & RSS_L4K ? "RSS_L4K " : "",
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ricb->flags & RSS_L6K ? "RSS_L6K " : "",
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ricb->flags & RSS_LI ? "RSS_LI " : "",
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ricb->flags & RSS_LB ? "RSS_LB " : "",
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ricb->flags & RSS_LM ? "RSS_LM " : "",
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ricb->flags & RSS_RI4 ? "RSS_RI4 " : "",
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ricb->flags & RSS_RT4 ? "RSS_RT4 " : "",
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ricb->flags & RSS_RI6 ? "RSS_RI6 " : "",
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ricb->flags & RSS_RT6 ? "RSS_RT6 " : "");
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pr_err("ricb->mask = 0x%.04x\n", le16_to_cpu(ricb->mask));
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netdev_err(qdev->ndev, "ricb->base_cq = %d\n", ricb->base_cq & 0x1f);
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netdev_err(qdev->ndev, "ricb->flags = %s%s%s%s%s%s%s%s%s\n",
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ricb->base_cq & RSS_L4K ? "RSS_L4K " : "",
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ricb->flags & RSS_L6K ? "RSS_L6K " : "",
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ricb->flags & RSS_LI ? "RSS_LI " : "",
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ricb->flags & RSS_LB ? "RSS_LB " : "",
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ricb->flags & RSS_LM ? "RSS_LM " : "",
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ricb->flags & RSS_RI4 ? "RSS_RI4 " : "",
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ricb->flags & RSS_RT4 ? "RSS_RT4 " : "",
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ricb->flags & RSS_RI6 ? "RSS_RI6 " : "",
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ricb->flags & RSS_RT6 ? "RSS_RT6 " : "");
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netdev_err(qdev->ndev, "ricb->mask = 0x%.04x\n", le16_to_cpu(ricb->mask));
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for (i = 0; i < 16; i++)
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pr_err("ricb->hash_cq_id[%d] = 0x%.08x\n", i,
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le32_to_cpu(ricb->hash_cq_id[i]));
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netdev_err(qdev->ndev, "ricb->hash_cq_id[%d] = 0x%.08x\n", i,
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le32_to_cpu(ricb->hash_cq_id[i]));
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for (i = 0; i < 10; i++)
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pr_err("ricb->ipv6_hash_key[%d] = 0x%.08x\n", i,
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le32_to_cpu(ricb->ipv6_hash_key[i]));
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netdev_err(qdev->ndev, "ricb->ipv6_hash_key[%d] = 0x%.08x\n", i,
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le32_to_cpu(ricb->ipv6_hash_key[i]));
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for (i = 0; i < 4; i++)
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pr_err("ricb->ipv4_hash_key[%d] = 0x%.08x\n", i,
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le32_to_cpu(ricb->ipv4_hash_key[i]));
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netdev_err(qdev->ndev, "ricb->ipv4_hash_key[%d] = 0x%.08x\n", i,
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le32_to_cpu(ricb->ipv4_hash_key[i]));
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}
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void ql_dump_cqicb(struct cqicb *cqicb)
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{
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pr_err("Dumping cqicb stuff...\n");
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netdev_err(qdev->ndev, "Dumping cqicb stuff...\n");
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pr_err("cqicb->msix_vect = %d\n", cqicb->msix_vect);
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pr_err("cqicb->flags = %x\n", cqicb->flags);
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pr_err("cqicb->len = %d\n", le16_to_cpu(cqicb->len));
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pr_err("cqicb->addr = 0x%llx\n",
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(unsigned long long)le64_to_cpu(cqicb->addr));
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pr_err("cqicb->prod_idx_addr = 0x%llx\n",
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(unsigned long long)le64_to_cpu(cqicb->prod_idx_addr));
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pr_err("cqicb->pkt_delay = 0x%.04x\n",
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le16_to_cpu(cqicb->pkt_delay));
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pr_err("cqicb->irq_delay = 0x%.04x\n",
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le16_to_cpu(cqicb->irq_delay));
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pr_err("cqicb->lbq_addr = 0x%llx\n",
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(unsigned long long)le64_to_cpu(cqicb->lbq_addr));
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pr_err("cqicb->lbq_buf_size = 0x%.04x\n",
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le16_to_cpu(cqicb->lbq_buf_size));
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pr_err("cqicb->lbq_len = 0x%.04x\n",
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le16_to_cpu(cqicb->lbq_len));
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pr_err("cqicb->sbq_addr = 0x%llx\n",
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(unsigned long long)le64_to_cpu(cqicb->sbq_addr));
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pr_err("cqicb->sbq_buf_size = 0x%.04x\n",
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le16_to_cpu(cqicb->sbq_buf_size));
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pr_err("cqicb->sbq_len = 0x%.04x\n",
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le16_to_cpu(cqicb->sbq_len));
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netdev_err(qdev->ndev, "cqicb->msix_vect = %d\n", cqicb->msix_vect);
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netdev_err(qdev->ndev, "cqicb->flags = %x\n", cqicb->flags);
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netdev_err(qdev->ndev, "cqicb->len = %d\n", le16_to_cpu(cqicb->len));
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netdev_err(qdev->ndev, "cqicb->addr = 0x%llx\n",
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(unsigned long long)le64_to_cpu(cqicb->addr));
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netdev_err(qdev->ndev, "cqicb->prod_idx_addr = 0x%llx\n",
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(unsigned long long)le64_to_cpu(cqicb->prod_idx_addr));
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netdev_err(qdev->ndev, "cqicb->pkt_delay = 0x%.04x\n",
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le16_to_cpu(cqicb->pkt_delay));
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netdev_err(qdev->ndev, "cqicb->irq_delay = 0x%.04x\n",
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le16_to_cpu(cqicb->irq_delay));
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netdev_err(qdev->ndev, "cqicb->lbq_addr = 0x%llx\n",
|
||||
(unsigned long long)le64_to_cpu(cqicb->lbq_addr));
|
||||
netdev_err(qdev->ndev, "cqicb->lbq_buf_size = 0x%.04x\n",
|
||||
le16_to_cpu(cqicb->lbq_buf_size));
|
||||
netdev_err(qdev->ndev, "cqicb->lbq_len = 0x%.04x\n",
|
||||
le16_to_cpu(cqicb->lbq_len));
|
||||
netdev_err(qdev->ndev, "cqicb->sbq_addr = 0x%llx\n",
|
||||
(unsigned long long)le64_to_cpu(cqicb->sbq_addr));
|
||||
netdev_err(qdev->ndev, "cqicb->sbq_buf_size = 0x%.04x\n",
|
||||
le16_to_cpu(cqicb->sbq_buf_size));
|
||||
netdev_err(qdev->ndev, "cqicb->sbq_len = 0x%.04x\n",
|
||||
le16_to_cpu(cqicb->sbq_len));
|
||||
}
|
||||
|
||||
static const char *qlge_rx_ring_type_name(struct rx_ring *rx_ring)
|
||||
|
|
@ -1720,71 +1728,73 @@ void ql_dump_rx_ring(struct rx_ring *rx_ring)
|
|||
{
|
||||
if (!rx_ring)
|
||||
return;
|
||||
pr_err("===================== Dumping rx_ring %d ===============\n",
|
||||
rx_ring->cq_id);
|
||||
pr_err("Dumping rx_ring %d, type = %s\n", rx_ring->cq_id,
|
||||
qlge_rx_ring_type_name(rx_ring));
|
||||
pr_err("rx_ring->cqicb = %p\n", &rx_ring->cqicb);
|
||||
pr_err("rx_ring->cq_base = %p\n", rx_ring->cq_base);
|
||||
pr_err("rx_ring->cq_base_dma = %llx\n",
|
||||
(unsigned long long)rx_ring->cq_base_dma);
|
||||
pr_err("rx_ring->cq_size = %d\n", rx_ring->cq_size);
|
||||
pr_err("rx_ring->cq_len = %d\n", rx_ring->cq_len);
|
||||
pr_err("rx_ring->prod_idx_sh_reg, addr = 0x%p, value = %d\n",
|
||||
rx_ring->prod_idx_sh_reg,
|
||||
rx_ring->prod_idx_sh_reg
|
||||
? ql_read_sh_reg(rx_ring->prod_idx_sh_reg) : 0);
|
||||
pr_err("rx_ring->prod_idx_sh_reg_dma = %llx\n",
|
||||
(unsigned long long)rx_ring->prod_idx_sh_reg_dma);
|
||||
pr_err("rx_ring->cnsmr_idx_db_reg = %p\n",
|
||||
rx_ring->cnsmr_idx_db_reg);
|
||||
pr_err("rx_ring->cnsmr_idx = %d\n", rx_ring->cnsmr_idx);
|
||||
pr_err("rx_ring->curr_entry = %p\n", rx_ring->curr_entry);
|
||||
pr_err("rx_ring->valid_db_reg = %p\n", rx_ring->valid_db_reg);
|
||||
netdev_err(qdev->ndev,
|
||||
"===================== Dumping rx_ring %d ===============\n",
|
||||
rx_ring->cq_id);
|
||||
netdev_err(qdev->ndev,
|
||||
"Dumping rx_ring %d, type = %s\n", rx_ring->cq_id,
|
||||
qlge_rx_ring_type_name(rx_ring));
|
||||
netdev_err(qdev->ndev, "rx_ring->cqicb = %p\n", &rx_ring->cqicb);
|
||||
netdev_err(qdev->ndev, "rx_ring->cq_base = %p\n", rx_ring->cq_base);
|
||||
netdev_err(qdev->ndev, "rx_ring->cq_base_dma = %llx\n",
|
||||
(unsigned long long)rx_ring->cq_base_dma);
|
||||
netdev_err(qdev->ndev, "rx_ring->cq_size = %d\n", rx_ring->cq_size);
|
||||
netdev_err(qdev->ndev, "rx_ring->cq_len = %d\n", rx_ring->cq_len);
|
||||
netdev_err(qdev->ndev,
|
||||
"rx_ring->prod_idx_sh_reg, addr = 0x%p, value = %d\n",
|
||||
rx_ring->prod_idx_sh_reg,
|
||||
rx_ring->prod_idx_sh_reg ? ql_read_sh_reg(rx_ring->prod_idx_sh_reg) : 0);
|
||||
netdev_err(qdev->ndev, "rx_ring->prod_idx_sh_reg_dma = %llx\n",
|
||||
(unsigned long long)rx_ring->prod_idx_sh_reg_dma);
|
||||
netdev_err(qdev->ndev, "rx_ring->cnsmr_idx_db_reg = %p\n",
|
||||
rx_ring->cnsmr_idx_db_reg);
|
||||
netdev_err(qdev->ndev, "rx_ring->cnsmr_idx = %d\n", rx_ring->cnsmr_idx);
|
||||
netdev_err(qdev->ndev, "rx_ring->curr_entry = %p\n", rx_ring->curr_entry);
|
||||
netdev_err(qdev->ndev, "rx_ring->valid_db_reg = %p\n", rx_ring->valid_db_reg);
|
||||
|
||||
pr_err("rx_ring->lbq.base = %p\n", rx_ring->lbq.base);
|
||||
pr_err("rx_ring->lbq.base_dma = %llx\n",
|
||||
(unsigned long long)rx_ring->lbq.base_dma);
|
||||
pr_err("rx_ring->lbq.base_indirect = %p\n",
|
||||
rx_ring->lbq.base_indirect);
|
||||
pr_err("rx_ring->lbq.base_indirect_dma = %llx\n",
|
||||
(unsigned long long)rx_ring->lbq.base_indirect_dma);
|
||||
pr_err("rx_ring->lbq = %p\n", rx_ring->lbq.queue);
|
||||
pr_err("rx_ring->lbq.prod_idx_db_reg = %p\n",
|
||||
rx_ring->lbq.prod_idx_db_reg);
|
||||
pr_err("rx_ring->lbq.next_to_use = %d\n", rx_ring->lbq.next_to_use);
|
||||
pr_err("rx_ring->lbq.next_to_clean = %d\n", rx_ring->lbq.next_to_clean);
|
||||
netdev_err(qdev->ndev, "rx_ring->lbq.base = %p\n", rx_ring->lbq.base);
|
||||
netdev_err(qdev->ndev, "rx_ring->lbq.base_dma = %llx\n",
|
||||
(unsigned long long)rx_ring->lbq.base_dma);
|
||||
netdev_err(qdev->ndev, "rx_ring->lbq.base_indirect = %p\n",
|
||||
rx_ring->lbq.base_indirect);
|
||||
netdev_err(qdev->ndev, "rx_ring->lbq.base_indirect_dma = %llx\n",
|
||||
(unsigned long long)rx_ring->lbq.base_indirect_dma);
|
||||
netdev_err(qdev->ndev, "rx_ring->lbq = %p\n", rx_ring->lbq.queue);
|
||||
netdev_err(qdev->ndev, "rx_ring->lbq.prod_idx_db_reg = %p\n",
|
||||
rx_ring->lbq.prod_idx_db_reg);
|
||||
netdev_err(qdev->ndev, "rx_ring->lbq.next_to_use = %d\n", rx_ring->lbq.next_to_use);
|
||||
netdev_err(qdev->ndev, "rx_ring->lbq.next_to_clean = %d\n", rx_ring->lbq.next_to_clean);
|
||||
|
||||
pr_err("rx_ring->sbq.base = %p\n", rx_ring->sbq.base);
|
||||
pr_err("rx_ring->sbq.base_dma = %llx\n",
|
||||
(unsigned long long)rx_ring->sbq.base_dma);
|
||||
pr_err("rx_ring->sbq.base_indirect = %p\n",
|
||||
rx_ring->sbq.base_indirect);
|
||||
pr_err("rx_ring->sbq.base_indirect_dma = %llx\n",
|
||||
(unsigned long long)rx_ring->sbq.base_indirect_dma);
|
||||
pr_err("rx_ring->sbq = %p\n", rx_ring->sbq.queue);
|
||||
pr_err("rx_ring->sbq.prod_idx_db_reg addr = %p\n",
|
||||
rx_ring->sbq.prod_idx_db_reg);
|
||||
pr_err("rx_ring->sbq.next_to_use = %d\n", rx_ring->sbq.next_to_use);
|
||||
pr_err("rx_ring->sbq.next_to_clean = %d\n", rx_ring->sbq.next_to_clean);
|
||||
pr_err("rx_ring->cq_id = %d\n", rx_ring->cq_id);
|
||||
pr_err("rx_ring->irq = %d\n", rx_ring->irq);
|
||||
pr_err("rx_ring->cpu = %d\n", rx_ring->cpu);
|
||||
pr_err("rx_ring->qdev = %p\n", rx_ring->qdev);
|
||||
netdev_err(qdev->ndev, "rx_ring->sbq.base = %p\n", rx_ring->sbq.base);
|
||||
netdev_err(qdev->ndev, "rx_ring->sbq.base_dma = %llx\n",
|
||||
(unsigned long long)rx_ring->sbq.base_dma);
|
||||
netdev_err(qdev->ndev, "rx_ring->sbq.base_indirect = %p\n",
|
||||
rx_ring->sbq.base_indirect);
|
||||
netdev_err(qdev->ndev, "rx_ring->sbq.base_indirect_dma = %llx\n",
|
||||
(unsigned long long)rx_ring->sbq.base_indirect_dma);
|
||||
netdev_err(qdev->ndev, "rx_ring->sbq = %p\n", rx_ring->sbq.queue);
|
||||
netdev_err(qdev->ndev, "rx_ring->sbq.prod_idx_db_reg addr = %p\n",
|
||||
rx_ring->sbq.prod_idx_db_reg);
|
||||
netdev_err(qdev->ndev, "rx_ring->sbq.next_to_use = %d\n", rx_ring->sbq.next_to_use);
|
||||
netdev_err(qdev->ndev, "rx_ring->sbq.next_to_clean = %d\n", rx_ring->sbq.next_to_clean);
|
||||
netdev_err(qdev->ndev, "rx_ring->cq_id = %d\n", rx_ring->cq_id);
|
||||
netdev_err(qdev->ndev, "rx_ring->irq = %d\n", rx_ring->irq);
|
||||
netdev_err(qdev->ndev, "rx_ring->cpu = %d\n", rx_ring->cpu);
|
||||
netdev_err(qdev->ndev, "rx_ring->qdev = %p\n", rx_ring->qdev);
|
||||
}
|
||||
|
||||
void ql_dump_hw_cb(struct ql_adapter *qdev, int size, u32 bit, u16 q_id)
|
||||
{
|
||||
void *ptr;
|
||||
|
||||
pr_err("%s: Enter\n", __func__);
|
||||
netdev_err(qdev->ndev, "%s: Enter\n", __func__);
|
||||
|
||||
ptr = kmalloc(size, GFP_ATOMIC);
|
||||
if (!ptr)
|
||||
return;
|
||||
|
||||
if (ql_write_cfg(qdev, ptr, size, bit, q_id)) {
|
||||
pr_err("%s: Failed to upload control block!\n", __func__);
|
||||
netdev_err(qdev->ndev, "%s: Failed to upload control block!\n", __func__);
|
||||
goto fail_it;
|
||||
}
|
||||
switch (bit) {
|
||||
|
|
@ -1798,7 +1808,7 @@ void ql_dump_hw_cb(struct ql_adapter *qdev, int size, u32 bit, u16 q_id)
|
|||
ql_dump_ricb((struct ricb *)ptr);
|
||||
break;
|
||||
default:
|
||||
pr_err("%s: Invalid bit value = %x\n", __func__, bit);
|
||||
netdev_err(qdev->ndev, "%s: Invalid bit value = %x\n", __func__, bit);
|
||||
break;
|
||||
}
|
||||
fail_it:
|
||||
|
|
@ -1809,29 +1819,29 @@ fail_it:
|
|||
#ifdef QL_OB_DUMP
|
||||
void ql_dump_tx_desc(struct tx_buf_desc *tbd)
|
||||
{
|
||||
pr_err("tbd->addr = 0x%llx\n",
|
||||
le64_to_cpu((u64) tbd->addr));
|
||||
pr_err("tbd->len = %d\n",
|
||||
le32_to_cpu(tbd->len & TX_DESC_LEN_MASK));
|
||||
pr_err("tbd->flags = %s %s\n",
|
||||
tbd->len & TX_DESC_C ? "C" : ".",
|
||||
tbd->len & TX_DESC_E ? "E" : ".");
|
||||
netdev_err(qdev->ndev, "tbd->addr = 0x%llx\n",
|
||||
le64_to_cpu((u64)tbd->addr));
|
||||
netdev_err(qdev->ndev, "tbd->len = %d\n",
|
||||
le32_to_cpu(tbd->len & TX_DESC_LEN_MASK));
|
||||
netdev_err(qdev->ndev, "tbd->flags = %s %s\n",
|
||||
tbd->len & TX_DESC_C ? "C" : ".",
|
||||
tbd->len & TX_DESC_E ? "E" : ".");
|
||||
tbd++;
|
||||
pr_err("tbd->addr = 0x%llx\n",
|
||||
le64_to_cpu((u64) tbd->addr));
|
||||
pr_err("tbd->len = %d\n",
|
||||
le32_to_cpu(tbd->len & TX_DESC_LEN_MASK));
|
||||
pr_err("tbd->flags = %s %s\n",
|
||||
tbd->len & TX_DESC_C ? "C" : ".",
|
||||
tbd->len & TX_DESC_E ? "E" : ".");
|
||||
netdev_err(qdev->ndev, "tbd->addr = 0x%llx\n",
|
||||
le64_to_cpu((u64)tbd->addr));
|
||||
netdev_err(qdev->ndev, "tbd->len = %d\n",
|
||||
le32_to_cpu(tbd->len & TX_DESC_LEN_MASK));
|
||||
netdev_err(qdev->ndev, "tbd->flags = %s %s\n",
|
||||
tbd->len & TX_DESC_C ? "C" : ".",
|
||||
tbd->len & TX_DESC_E ? "E" : ".");
|
||||
tbd++;
|
||||
pr_err("tbd->addr = 0x%llx\n",
|
||||
le64_to_cpu((u64) tbd->addr));
|
||||
pr_err("tbd->len = %d\n",
|
||||
le32_to_cpu(tbd->len & TX_DESC_LEN_MASK));
|
||||
pr_err("tbd->flags = %s %s\n",
|
||||
tbd->len & TX_DESC_C ? "C" : ".",
|
||||
tbd->len & TX_DESC_E ? "E" : ".");
|
||||
netdev_err(qdev->ndev, "tbd->addr = 0x%llx\n",
|
||||
le64_to_cpu((u64)tbd->addr));
|
||||
netdev_err(qdev->ndev, "tbd->len = %d\n",
|
||||
le32_to_cpu(tbd->len & TX_DESC_LEN_MASK));
|
||||
netdev_err(qdev->ndev, "tbd->flags = %s %s\n",
|
||||
tbd->len & TX_DESC_C ? "C" : ".",
|
||||
tbd->len & TX_DESC_E ? "E" : ".");
|
||||
}
|
||||
|
||||
void ql_dump_ob_mac_iocb(struct ob_mac_iocb_req *ob_mac_iocb)
|
||||
|
|
@ -1841,39 +1851,39 @@ void ql_dump_ob_mac_iocb(struct ob_mac_iocb_req *ob_mac_iocb)
|
|||
struct tx_buf_desc *tbd;
|
||||
u16 frame_len;
|
||||
|
||||
pr_err("%s\n", __func__);
|
||||
pr_err("opcode = %s\n",
|
||||
(ob_mac_iocb->opcode == OPCODE_OB_MAC_IOCB) ? "MAC" : "TSO");
|
||||
pr_err("flags1 = %s %s %s %s %s\n",
|
||||
ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_OI ? "OI" : "",
|
||||
ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_I ? "I" : "",
|
||||
ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_D ? "D" : "",
|
||||
ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_IP4 ? "IP4" : "",
|
||||
ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_IP6 ? "IP6" : "");
|
||||
pr_err("flags2 = %s %s %s\n",
|
||||
ob_mac_tso_iocb->flags2 & OB_MAC_TSO_IOCB_LSO ? "LSO" : "",
|
||||
ob_mac_tso_iocb->flags2 & OB_MAC_TSO_IOCB_UC ? "UC" : "",
|
||||
ob_mac_tso_iocb->flags2 & OB_MAC_TSO_IOCB_TC ? "TC" : "");
|
||||
pr_err("flags3 = %s %s %s\n",
|
||||
ob_mac_tso_iocb->flags3 & OB_MAC_TSO_IOCB_IC ? "IC" : "",
|
||||
ob_mac_tso_iocb->flags3 & OB_MAC_TSO_IOCB_DFP ? "DFP" : "",
|
||||
ob_mac_tso_iocb->flags3 & OB_MAC_TSO_IOCB_V ? "V" : "");
|
||||
pr_err("tid = %x\n", ob_mac_iocb->tid);
|
||||
pr_err("txq_idx = %d\n", ob_mac_iocb->txq_idx);
|
||||
pr_err("vlan_tci = %x\n", ob_mac_tso_iocb->vlan_tci);
|
||||
netdev_err(qdev->ndev, "%s\n", __func__);
|
||||
netdev_err(qdev->ndev, "opcode = %s\n",
|
||||
(ob_mac_iocb->opcode == OPCODE_OB_MAC_IOCB) ? "MAC" : "TSO");
|
||||
netdev_err(qdev->ndev, "flags1 = %s %s %s %s %s\n",
|
||||
ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_OI ? "OI" : "",
|
||||
ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_I ? "I" : "",
|
||||
ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_D ? "D" : "",
|
||||
ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_IP4 ? "IP4" : "",
|
||||
ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_IP6 ? "IP6" : "");
|
||||
netdev_err(qdev->ndev, "flags2 = %s %s %s\n",
|
||||
ob_mac_tso_iocb->flags2 & OB_MAC_TSO_IOCB_LSO ? "LSO" : "",
|
||||
ob_mac_tso_iocb->flags2 & OB_MAC_TSO_IOCB_UC ? "UC" : "",
|
||||
ob_mac_tso_iocb->flags2 & OB_MAC_TSO_IOCB_TC ? "TC" : "");
|
||||
netdev_err(qdev->ndev, "flags3 = %s %s %s\n",
|
||||
ob_mac_tso_iocb->flags3 & OB_MAC_TSO_IOCB_IC ? "IC" : "",
|
||||
ob_mac_tso_iocb->flags3 & OB_MAC_TSO_IOCB_DFP ? "DFP" : "",
|
||||
ob_mac_tso_iocb->flags3 & OB_MAC_TSO_IOCB_V ? "V" : "");
|
||||
netdev_err(qdev->ndev, "tid = %x\n", ob_mac_iocb->tid);
|
||||
netdev_err(qdev->ndev, "txq_idx = %d\n", ob_mac_iocb->txq_idx);
|
||||
netdev_err(qdev->ndev, "vlan_tci = %x\n", ob_mac_tso_iocb->vlan_tci);
|
||||
if (ob_mac_iocb->opcode == OPCODE_OB_MAC_TSO_IOCB) {
|
||||
pr_err("frame_len = %d\n",
|
||||
le32_to_cpu(ob_mac_tso_iocb->frame_len));
|
||||
pr_err("mss = %d\n",
|
||||
le16_to_cpu(ob_mac_tso_iocb->mss));
|
||||
pr_err("prot_hdr_len = %d\n",
|
||||
le16_to_cpu(ob_mac_tso_iocb->total_hdrs_len));
|
||||
pr_err("hdr_offset = 0x%.04x\n",
|
||||
le16_to_cpu(ob_mac_tso_iocb->net_trans_offset));
|
||||
netdev_err(qdev->ndev, "frame_len = %d\n",
|
||||
le32_to_cpu(ob_mac_tso_iocb->frame_len));
|
||||
netdev_err(qdev->ndev, "mss = %d\n",
|
||||
le16_to_cpu(ob_mac_tso_iocb->mss));
|
||||
netdev_err(qdev->ndev, "prot_hdr_len = %d\n",
|
||||
le16_to_cpu(ob_mac_tso_iocb->total_hdrs_len));
|
||||
netdev_err(qdev->ndev, "hdr_offset = 0x%.04x\n",
|
||||
le16_to_cpu(ob_mac_tso_iocb->net_trans_offset));
|
||||
frame_len = le32_to_cpu(ob_mac_tso_iocb->frame_len);
|
||||
} else {
|
||||
pr_err("frame_len = %d\n",
|
||||
le16_to_cpu(ob_mac_iocb->frame_len));
|
||||
netdev_err(qdev->ndev, "frame_len = %d\n",
|
||||
le16_to_cpu(ob_mac_iocb->frame_len));
|
||||
frame_len = le16_to_cpu(ob_mac_iocb->frame_len);
|
||||
}
|
||||
tbd = &ob_mac_iocb->tbd[0];
|
||||
|
|
@ -1882,98 +1892,98 @@ void ql_dump_ob_mac_iocb(struct ob_mac_iocb_req *ob_mac_iocb)
|
|||
|
||||
void ql_dump_ob_mac_rsp(struct ob_mac_iocb_rsp *ob_mac_rsp)
|
||||
{
|
||||
pr_err("%s\n", __func__);
|
||||
pr_err("opcode = %d\n", ob_mac_rsp->opcode);
|
||||
pr_err("flags = %s %s %s %s %s %s %s\n",
|
||||
ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_OI ? "OI" : ".",
|
||||
ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_I ? "I" : ".",
|
||||
ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_E ? "E" : ".",
|
||||
ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_S ? "S" : ".",
|
||||
ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_L ? "L" : ".",
|
||||
ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_P ? "P" : ".",
|
||||
ob_mac_rsp->flags2 & OB_MAC_IOCB_RSP_B ? "B" : ".");
|
||||
pr_err("tid = %x\n", ob_mac_rsp->tid);
|
||||
netdev_err(qdev->ndev, "%s\n", __func__);
|
||||
netdev_err(qdev->ndev, "opcode = %d\n", ob_mac_rsp->opcode);
|
||||
netdev_err(qdev->ndev, "flags = %s %s %s %s %s %s %s\n",
|
||||
ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_OI ?
|
||||
"OI" : ".", ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_I ? "I" : ".",
|
||||
ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_E ? "E" : ".",
|
||||
ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_S ? "S" : ".",
|
||||
ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_L ? "L" : ".",
|
||||
ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_P ? "P" : ".",
|
||||
ob_mac_rsp->flags2 & OB_MAC_IOCB_RSP_B ? "B" : ".");
|
||||
netdev_err(qdev->ndev, "tid = %x\n", ob_mac_rsp->tid);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef QL_IB_DUMP
|
||||
void ql_dump_ib_mac_rsp(struct ib_mac_iocb_rsp *ib_mac_rsp)
|
||||
{
|
||||
pr_err("%s\n", __func__);
|
||||
pr_err("opcode = 0x%x\n", ib_mac_rsp->opcode);
|
||||
pr_err("flags1 = %s%s%s%s%s%s\n",
|
||||
ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_OI ? "OI " : "",
|
||||
ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_I ? "I " : "",
|
||||
ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_TE ? "TE " : "",
|
||||
ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_NU ? "NU " : "",
|
||||
ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_IE ? "IE " : "",
|
||||
ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_B ? "B " : "");
|
||||
netdev_err(qdev->ndev, "%s\n", __func__);
|
||||
netdev_err(qdev->ndev, "opcode = 0x%x\n", ib_mac_rsp->opcode);
|
||||
netdev_err(qdev->ndev, "flags1 = %s%s%s%s%s%s\n",
|
||||
ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_OI ? "OI " : "",
|
||||
ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_I ? "I " : "",
|
||||
ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_TE ? "TE " : "",
|
||||
ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_NU ? "NU " : "",
|
||||
ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_IE ? "IE " : "",
|
||||
ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_B ? "B " : "");
|
||||
|
||||
if (ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK)
|
||||
pr_err("%s%s%s Multicast\n",
|
||||
(ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_HASH ? "Hash" : "",
|
||||
(ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_REG ? "Registered" : "",
|
||||
(ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_PROM ? "Promiscuous" : "");
|
||||
netdev_err(qdev->ndev, "%s%s%s Multicast\n",
|
||||
(ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_HASH ? "Hash" : "",
|
||||
(ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_REG ? "Registered" : "",
|
||||
(ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_PROM ? "Promiscuous" : "");
|
||||
|
||||
pr_err("flags2 = %s%s%s%s%s\n",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_P) ? "P " : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_V) ? "V " : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) ? "U " : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) ? "T " : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_FO) ? "FO " : "");
|
||||
netdev_err(qdev->ndev, "flags2 = %s%s%s%s%s\n",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_P) ? "P " : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_V) ? "V " : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) ? "U " : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) ? "T " : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_FO) ? "FO " : "");
|
||||
|
||||
if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK)
|
||||
pr_err("%s%s%s%s%s error\n",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) ==
|
||||
IB_MAC_IOCB_RSP_ERR_OVERSIZE ? "oversize" : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) ==
|
||||
IB_MAC_IOCB_RSP_ERR_UNDERSIZE ? "undersize" : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) ==
|
||||
IB_MAC_IOCB_RSP_ERR_PREAMBLE ? "preamble" : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) ==
|
||||
IB_MAC_IOCB_RSP_ERR_FRAME_LEN ? "frame length" : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) ==
|
||||
IB_MAC_IOCB_RSP_ERR_CRC ? "CRC" : "");
|
||||
netdev_err(qdev->ndev, "%s%s%s%s%s error\n",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) ==
|
||||
IB_MAC_IOCB_RSP_ERR_OVERSIZE ? "oversize" : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) ==
|
||||
IB_MAC_IOCB_RSP_ERR_UNDERSIZE ? "undersize" : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) ==
|
||||
IB_MAC_IOCB_RSP_ERR_PREAMBLE ? "preamble" : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) ==
|
||||
IB_MAC_IOCB_RSP_ERR_FRAME_LEN ? "frame length" : "",
|
||||
(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) ==
|
||||
IB_MAC_IOCB_RSP_ERR_CRC ? "CRC" : "");
|
||||
|
||||
pr_err("flags3 = %s%s\n",
|
||||
ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_DS ? "DS " : "",
|
||||
ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_DL ? "DL " : "");
|
||||
netdev_err(qdev->ndev, "flags3 = %s%s\n",
|
||||
ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_DS ? "DS " : "",
|
||||
ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_DL ? "DL " : "");
|
||||
|
||||
if (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK)
|
||||
pr_err("RSS flags = %s%s%s%s\n",
|
||||
((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_IPV4) ? "IPv4 RSS" : "",
|
||||
((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_IPV6) ? "IPv6 RSS " : "",
|
||||
((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_TCP_V4) ? "TCP/IPv4 RSS" : "",
|
||||
((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_TCP_V6) ? "TCP/IPv6 RSS" : "");
|
||||
netdev_err(qdev->ndev, "RSS flags = %s%s%s%s\n",
|
||||
((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_IPV4) ? "IPv4 RSS" : "",
|
||||
((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_IPV6) ? "IPv6 RSS " : "",
|
||||
((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_TCP_V4) ? "TCP/IPv4 RSS" : "",
|
||||
((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) ==
|
||||
IB_MAC_IOCB_RSP_M_TCP_V6) ? "TCP/IPv6 RSS" : "");
|
||||
|
||||
pr_err("data_len = %d\n",
|
||||
le32_to_cpu(ib_mac_rsp->data_len));
|
||||
pr_err("data_addr = 0x%llx\n",
|
||||
(unsigned long long)le64_to_cpu(ib_mac_rsp->data_addr));
|
||||
netdev_err(qdev->ndev, "data_len = %d\n",
|
||||
le32_to_cpu(ib_mac_rsp->data_len));
|
||||
netdev_err(qdev->ndev, "data_addr = 0x%llx\n",
|
||||
(unsigned long long)le64_to_cpu(ib_mac_rsp->data_addr));
|
||||
if (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK)
|
||||
pr_err("rss = %x\n",
|
||||
le32_to_cpu(ib_mac_rsp->rss));
|
||||
netdev_err(qdev->ndev, "rss = %x\n",
|
||||
le32_to_cpu(ib_mac_rsp->rss));
|
||||
if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_V)
|
||||
pr_err("vlan_id = %x\n",
|
||||
le16_to_cpu(ib_mac_rsp->vlan_id));
|
||||
netdev_err(qdev->ndev, "vlan_id = %x\n",
|
||||
le16_to_cpu(ib_mac_rsp->vlan_id));
|
||||
|
||||
pr_err("flags4 = %s%s%s\n",
|
||||
ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV ? "HV " : "",
|
||||
ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HS ? "HS " : "",
|
||||
ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HL ? "HL " : "");
|
||||
netdev_err(qdev->ndev, "flags4 = %s%s%s\n",
|
||||
ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV ? "HV " : "",
|
||||
ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HS ? "HS " : "",
|
||||
ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HL ? "HL " : "");
|
||||
|
||||
if (ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV) {
|
||||
pr_err("hdr length = %d\n",
|
||||
le32_to_cpu(ib_mac_rsp->hdr_len));
|
||||
pr_err("hdr addr = 0x%llx\n",
|
||||
(unsigned long long)le64_to_cpu(ib_mac_rsp->hdr_addr));
|
||||
netdev_err(qdev->ndev, "hdr length = %d\n",
|
||||
le32_to_cpu(ib_mac_rsp->hdr_len));
|
||||
netdev_err(qdev->ndev, "hdr addr = 0x%llx\n",
|
||||
(unsigned long long)le64_to_cpu(ib_mac_rsp->hdr_addr));
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue