Staging: iio: meter: Prefer using the BIT macro
This patch replaces bit shifting on 1 with the BIT(x) macro This was done with coccinelle: @@ int g; @@ -(1 << g) +BIT(g) Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
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@ -219,7 +219,7 @@ static int ade7753_reset(struct device *dev)
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u16 val;
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u16 val;
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ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
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ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
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val |= 1 << 6; /* Software Chip Reset */
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val |= BIT(6); /* Software Chip Reset */
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return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
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return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
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}
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}
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@ -328,10 +328,10 @@ static int ade7753_set_irq(struct device *dev, bool enable)
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goto error_ret;
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goto error_ret;
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if (enable)
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if (enable)
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irqen |= 1 << 3; /* Enables an interrupt when a data is
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irqen |= BIT(3); /* Enables an interrupt when a data is
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present in the waveform register */
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present in the waveform register */
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else
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else
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irqen &= ~(1 << 3);
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irqen &= ~BIT(3);
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ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen);
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ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen);
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@ -345,7 +345,7 @@ static int ade7753_stop_device(struct device *dev)
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u16 val;
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u16 val;
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ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
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ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
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val |= 1 << 4; /* AD converters can be turned off */
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val |= BIT(4); /* AD converters can be turned off */
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return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
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return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
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}
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}
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@ -223,7 +223,7 @@ static int ade7754_reset(struct device *dev)
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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val |= 1 << 6; /* Software Chip Reset */
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val |= BIT(6); /* Software Chip Reset */
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return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
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return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
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}
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}
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@ -350,10 +350,10 @@ static int ade7754_set_irq(struct device *dev, bool enable)
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goto error_ret;
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goto error_ret;
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if (enable)
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if (enable)
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irqen |= 1 << 14; /* Enables an interrupt when a data is
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irqen |= BIT(14); /* Enables an interrupt when a data is
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present in the waveform register */
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present in the waveform register */
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else
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else
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irqen &= ~(1 << 14);
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irqen &= ~BIT(14);
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ret = ade7754_spi_write_reg_16(dev, ADE7754_IRQEN, irqen);
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ret = ade7754_spi_write_reg_16(dev, ADE7754_IRQEN, irqen);
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if (ret)
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if (ret)
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@ -308,7 +308,7 @@ static int ade7758_reset(struct device *dev)
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dev_err(dev, "Failed to read opmode reg\n");
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dev_err(dev, "Failed to read opmode reg\n");
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return ret;
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return ret;
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}
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}
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val |= 1 << 6; /* Software Chip Reset */
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val |= BIT(6); /* Software Chip Reset */
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ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
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ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
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if (ret < 0)
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if (ret < 0)
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dev_err(dev, "Failed to write opmode reg\n");
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dev_err(dev, "Failed to write opmode reg\n");
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@ -426,10 +426,10 @@ int ade7758_set_irq(struct device *dev, bool enable)
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goto error_ret;
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goto error_ret;
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if (enable)
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if (enable)
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irqen |= 1 << 16; /* Enables an interrupt when a data is
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irqen |= BIT(16); /* Enables an interrupt when a data is
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present in the waveform register */
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present in the waveform register */
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else
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else
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irqen &= ~(1 << 16);
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irqen &= ~BIT(16);
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ret = ade7758_spi_write_reg_24(dev, ADE7758_MASK, irqen);
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ret = ade7758_spi_write_reg_24(dev, ADE7758_MASK, irqen);
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if (ret)
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if (ret)
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@ -224,7 +224,7 @@ static int ade7759_reset(struct device *dev)
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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val |= 1 << 6; /* Software Chip Reset */
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val |= BIT(6); /* Software Chip Reset */
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return ade7759_spi_write_reg_16(dev,
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return ade7759_spi_write_reg_16(dev,
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ADE7759_MODE,
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ADE7759_MODE,
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val);
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val);
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@ -288,10 +288,10 @@ static int ade7759_set_irq(struct device *dev, bool enable)
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goto error_ret;
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goto error_ret;
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if (enable)
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if (enable)
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irqen |= 1 << 3; /* Enables an interrupt when a data is
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irqen |= BIT(3); /* Enables an interrupt when a data is
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present in the waveform register */
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present in the waveform register */
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else
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else
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irqen &= ~(1 << 3);
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irqen &= ~BIT(3);
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ret = ade7759_spi_write_reg_8(dev, ADE7759_IRQEN, irqen);
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ret = ade7759_spi_write_reg_8(dev, ADE7759_IRQEN, irqen);
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@ -314,7 +314,7 @@ static int ade7759_stop_device(struct device *dev)
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return ret;
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return ret;
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}
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}
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val |= 1 << 4; /* AD converters can be turned off */
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val |= BIT(4); /* AD converters can be turned off */
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return ade7759_spi_write_reg_16(dev, ADE7759_MODE, val);
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return ade7759_spi_write_reg_16(dev, ADE7759_MODE, val);
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}
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}
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@ -181,7 +181,7 @@ static int ade7854_reset(struct device *dev)
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u16 val;
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u16 val;
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st->read_reg_16(dev, ADE7854_CONFIG, &val);
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st->read_reg_16(dev, ADE7854_CONFIG, &val);
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val |= 1 << 7; /* Software Chip Reset */
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val |= BIT(7); /* Software Chip Reset */
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return st->write_reg_16(dev, ADE7854_CONFIG, val);
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return st->write_reg_16(dev, ADE7854_CONFIG, val);
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}
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}
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@ -420,10 +420,10 @@ static int ade7854_set_irq(struct device *dev, bool enable)
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goto error_ret;
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goto error_ret;
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if (enable)
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if (enable)
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irqen |= 1 << 17; /* 1: interrupt enabled when all periodical
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irqen |= BIT(17); /* 1: interrupt enabled when all periodical
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(at 8 kHz rate) DSP computations finish. */
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(at 8 kHz rate) DSP computations finish. */
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else
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else
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irqen &= ~(1 << 17);
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irqen &= ~BIT(17);
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ret = st->write_reg_32(dev, ADE7854_MASK0, irqen);
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ret = st->write_reg_32(dev, ADE7854_MASK0, irqen);
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if (ret)
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if (ret)
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