powerpc: Merge spinlock.h
The result is mostly similar to the original ppc64 version but with some adaptations for 32-bit compilation. include/asm-ppc64 is now empty! Signed-off-by: Paul Mackerras <paulus@samba.org>
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21a6290220
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@ -18,31 +18,41 @@
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*
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*
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* (the type definitions are in asm/spinlock_types.h)
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* (the type definitions are in asm/spinlock_types.h)
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*/
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*/
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#include <linux/config.h>
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#ifdef CONFIG_PPC64
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#include <asm/paca.h>
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#include <asm/paca.h>
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#include <asm/hvcall.h>
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#include <asm/hvcall.h>
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#include <asm/iseries/hv_call.h>
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#include <asm/iseries/hv_call.h>
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#endif
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#include <asm/asm-compat.h>
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#include <asm/synch.h>
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#define __raw_spin_is_locked(x) ((x)->slock != 0)
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#define __raw_spin_is_locked(x) ((x)->slock != 0)
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#ifdef CONFIG_PPC64
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/* use 0x800000yy when locked, where yy == CPU number */
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#define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token))
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#else
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#define LOCK_TOKEN 1
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#endif
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/*
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/*
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* This returns the old value in the lock, so we succeeded
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* This returns the old value in the lock, so we succeeded
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* in getting the lock if the return value is 0.
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* in getting the lock if the return value is 0.
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*/
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*/
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static __inline__ unsigned long __spin_trylock(raw_spinlock_t *lock)
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static __inline__ unsigned long __spin_trylock(raw_spinlock_t *lock)
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{
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{
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unsigned long tmp, tmp2;
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unsigned long tmp, token;
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token = LOCK_TOKEN;
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__asm__ __volatile__(
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__asm__ __volatile__(
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" lwz %1,%3(13) # __spin_trylock\n\
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"1: lwarx %0,0,%2 # __spin_trylock\n\
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1: lwarx %0,0,%2\n\
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cmpwi 0,%0,0\n\
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cmpwi 0,%0,0\n\
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bne- 2f\n\
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bne- 2f\n\
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stwcx. %1,0,%2\n\
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stwcx. %1,0,%2\n\
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bne- 1b\n\
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bne- 1b\n\
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isync\n\
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isync\n\
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2:" : "=&r" (tmp), "=&r" (tmp2)
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2:" : "=&r" (tmp)
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: "r" (&lock->slock), "i" (offsetof(struct paca_struct, lock_token))
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: "r" (token), "r" (&lock->slock)
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: "cr0", "memory");
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: "cr0", "memory");
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return tmp;
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return tmp;
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@ -113,11 +123,17 @@ static void __inline__ __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long
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static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock)
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static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock)
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{
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{
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__asm__ __volatile__("lwsync # __raw_spin_unlock": : :"memory");
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__asm__ __volatile__(SYNC_ON_SMP" # __raw_spin_unlock"
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: : :"memory");
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lock->slock = 0;
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lock->slock = 0;
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}
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}
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#ifdef CONFIG_PPC64
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extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
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extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
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#else
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#define __raw_spin_unlock_wait(lock) \
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do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
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#endif
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/*
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/*
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* Read-write spinlocks, allowing multiple readers
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* Read-write spinlocks, allowing multiple readers
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@ -133,6 +149,14 @@ extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
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#define __raw_read_can_lock(rw) ((rw)->lock >= 0)
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#define __raw_read_can_lock(rw) ((rw)->lock >= 0)
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#define __raw_write_can_lock(rw) (!(rw)->lock)
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#define __raw_write_can_lock(rw) (!(rw)->lock)
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#ifdef CONFIG_PPC64
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#define __DO_SIGN_EXTEND "extsw %0,%0\n"
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#define WRLOCK_TOKEN LOCK_TOKEN /* it's negative */
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#else
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#define __DO_SIGN_EXTEND
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#define WRLOCK_TOKEN (-1)
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#endif
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/*
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/*
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* This returns the old value in the lock + 1,
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* This returns the old value in the lock + 1,
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* so we got a read lock if the return value is > 0.
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* so we got a read lock if the return value is > 0.
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@ -142,11 +166,12 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw)
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long tmp;
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long tmp;
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__asm__ __volatile__(
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__asm__ __volatile__(
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"1: lwarx %0,0,%1 # read_trylock\n\
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"1: lwarx %0,0,%1 # read_trylock\n"
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extsw %0,%0\n\
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__DO_SIGN_EXTEND
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addic. %0,%0,1\n\
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" addic. %0,%0,1\n\
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ble- 2f\n\
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ble- 2f\n"
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stwcx. %0,0,%1\n\
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PPC405_ERR77(0,%1)
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" stwcx. %0,0,%1\n\
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bne- 1b\n\
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bne- 1b\n\
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isync\n\
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isync\n\
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2:" : "=&r" (tmp)
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2:" : "=&r" (tmp)
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@ -162,18 +187,19 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw)
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*/
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*/
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static __inline__ long __write_trylock(raw_rwlock_t *rw)
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static __inline__ long __write_trylock(raw_rwlock_t *rw)
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{
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{
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long tmp, tmp2;
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long tmp, token;
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token = WRLOCK_TOKEN;
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__asm__ __volatile__(
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__asm__ __volatile__(
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" lwz %1,%3(13) # write_trylock\n\
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"1: lwarx %0,0,%2 # write_trylock\n\
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1: lwarx %0,0,%2\n\
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cmpwi 0,%0,0\n\
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cmpwi 0,%0,0\n\
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bne- 2f\n\
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bne- 2f\n"
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stwcx. %1,0,%2\n\
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PPC405_ERR77(0,%1)
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" stwcx. %1,0,%2\n\
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bne- 1b\n\
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bne- 1b\n\
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isync\n\
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isync\n\
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2:" : "=&r" (tmp), "=&r" (tmp2)
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2:" : "=&r" (tmp)
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: "r" (&rw->lock), "i" (offsetof(struct paca_struct, lock_token))
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: "r" (token), "r" (&rw->lock)
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: "cr0", "memory");
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: "cr0", "memory");
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return tmp;
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return tmp;
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@ -224,8 +250,9 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
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__asm__ __volatile__(
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__asm__ __volatile__(
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"eieio # read_unlock\n\
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"eieio # read_unlock\n\
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1: lwarx %0,0,%1\n\
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1: lwarx %0,0,%1\n\
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addic %0,%0,-1\n\
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addic %0,%0,-1\n"
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stwcx. %0,0,%1\n\
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PPC405_ERR77(0,%1)
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" stwcx. %0,0,%1\n\
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bne- 1b"
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bne- 1b"
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: "=&r"(tmp)
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: "=&r"(tmp)
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: "r"(&rw->lock)
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: "r"(&rw->lock)
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@ -234,7 +261,8 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
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static __inline__ void __raw_write_unlock(raw_rwlock_t *rw)
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static __inline__ void __raw_write_unlock(raw_rwlock_t *rw)
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{
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{
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__asm__ __volatile__("lwsync # write_unlock": : :"memory");
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__asm__ __volatile__(SYNC_ON_SMP" # write_unlock"
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: : :"memory");
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rw->lock = 0;
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rw->lock = 0;
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}
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}
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