GPIO fix for the v4.15 series, this fixes the bit fiddling in the

MMIO GPIO driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJaYFB3AAoJEEEQszewGV1z+5EP/in6wDsqTAOnjim6VZs2o72G
 XcHbVaDpWvBBW3WWVnL6A5HcHBuP5D3YEzfSTnVBM+ClHK82DsgnwT/FlIJ1VdOo
 36jQaPtdKZ5CkpQ8zG/84T8BI7wYD15PxvXGNZLQmt0b38tPVDamf+YRqfmmyd2z
 ilwy/xmj6zKikdc3SJUN+SBquZ2Vsceh574SWOnP36A7PSNQpirCJ4aR+iH0PxPn
 T6c50LbuvnWwZh1ehdnSh3K7zOBPUTFkVodpiX7jHu1Ahqe55Ld/71ywWBjF76wH
 rkLWGmYb5PKcGd8rtZslS+YqXstdWMAmYSFU7zRQ4ozlC07l46hd4srhl3oaElG2
 fV3w3jyBNAad5Vl0ateKQhwRbbMvkfrXwmDoxU0hpoI8CdZ6COvIP9mFNcPHB1ao
 lJR6S0+sVhMELfrtnyD46HMt1cx5ija63W8d/yQA8bWF5NZS+jXPdGXKmddr9OPl
 1RWOALBd5XmIuzNMg7ojtcKCFJxmIb3rV5s3IOR2okhoOj8+E2YddX0tdiXAX2he
 54iQiYOco0TidDpLjHxzOqF/hBt9Z3M7rZsOsKi/qcfY0BmCQoE3i6aNjaVlzLJR
 6+wcrBN4g5xtrEsV+jr/U2Tw6GCfM0s0vwsSFMfpbvzjxY4wKbe2si8f8r8UIvrU
 ln7PLQOYCCh7cvicpXn2
 =7onn
 -----END PGP SIGNATURE-----

Merge tag 'gpio-v4.15-5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO fix from Linus Walleij:
 "This is the (hopefully) last GPIO fix for v4.15, fixing the bit
  fiddling in the MMIO GPIO driver.

  Again the especially endowed screwer-upper who has been open coding
  bit fiddling is yours truly"

* tag 'gpio-v4.15-5' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio:
  gpio: mmio: Also read bits that are zero
This commit is contained in:
Linus Torvalds 2018-01-18 09:50:24 -08:00
commit 023080317d

View file

@ -152,14 +152,13 @@ static int bgpio_get_set_multiple(struct gpio_chip *gc, unsigned long *mask,
{
unsigned long get_mask = 0;
unsigned long set_mask = 0;
int bit = 0;
while ((bit = find_next_bit(mask, gc->ngpio, bit)) != gc->ngpio) {
if (gc->bgpio_dir & BIT(bit))
set_mask |= BIT(bit);
else
get_mask |= BIT(bit);
}
/* Make sure we first clear any bits that are zero when we read the register */
*bits &= ~*mask;
/* Exploit the fact that we know which directions are set */
set_mask = *mask & gc->bgpio_dir;
get_mask = *mask & ~gc->bgpio_dir;
if (set_mask)
*bits |= gc->read_reg(gc->reg_set) & set_mask;
@ -176,13 +175,13 @@ static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)
/*
* This only works if the bits in the GPIO register are in native endianness.
* It is dirt simple and fast in this case. (Also the most common case.)
*/
static int bgpio_get_multiple(struct gpio_chip *gc, unsigned long *mask,
unsigned long *bits)
{
*bits = gc->read_reg(gc->reg_dat) & *mask;
/* Make sure we first clear any bits that are zero when we read the register */
*bits &= ~*mask;
*bits |= gc->read_reg(gc->reg_dat) & *mask;
return 0;
}
@ -196,9 +195,12 @@ static int bgpio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask,
unsigned long val;
int bit;
/* Make sure we first clear any bits that are zero when we read the register */
*bits &= ~*mask;
/* Create a mirrored mask */
bit = 0;
while ((bit = find_next_bit(mask, gc->ngpio, bit)) != gc->ngpio)
bit = -1;
while ((bit = find_next_bit(mask, gc->ngpio, bit + 1)) < gc->ngpio)
readmask |= bgpio_line2mask(gc, bit);
/* Read the register */
@ -208,8 +210,8 @@ static int bgpio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask,
* Mirror the result into the "bits" result, this will give line 0
* in bit 0 ... line 31 in bit 31 for a 32bit register.
*/
bit = 0;
while ((bit = find_next_bit(&val, gc->ngpio, bit)) != gc->ngpio)
bit = -1;
while ((bit = find_next_bit(&val, gc->ngpio, bit + 1)) < gc->ngpio)
*bits |= bgpio_line2mask(gc, bit);
return 0;