crypto: aesni_intel - improve lrw and xts performance by utilizing parallel AES-NI hardware pipelines
Use parallel LRW and XTS encryption facilities to better utilize AES-NI
hardware pipelines and gain extra performance.
Tcrypt benchmark results (async), old vs new ratios:
Intel Core i5-2450M CPU (fam: 6, model: 42, step: 7)
aes:128bit
lrw:256bit xts:256bit
size lrw-enc lrw-dec xts-dec xts-dec
16B 0.99x 1.00x 1.22x 1.19x
64B 1.38x 1.50x 1.58x 1.61x
256B 2.04x 2.02x 2.27x 2.29x
1024B 2.56x 2.54x 2.89x 2.92x
8192B 2.85x 2.99x 3.40x 3.23x
aes:192bit
lrw:320bit xts:384bit
size lrw-enc lrw-dec xts-dec xts-dec
16B 1.08x 1.08x 1.16x 1.17x
64B 1.48x 1.54x 1.59x 1.65x
256B 2.18x 2.17x 2.29x 2.28x
1024B 2.67x 2.67x 2.87x 3.05x
8192B 2.93x 2.84x 3.28x 3.33x
aes:256bit
lrw:348bit xts:512bit
size lrw-enc lrw-dec xts-dec xts-dec
16B 1.07x 1.07x 1.18x 1.19x
64B 1.56x 1.56x 1.70x 1.71x
256B 2.22x 2.24x 2.46x 2.46x
1024B 2.76x 2.77x 3.13x 3.05x
8192B 2.99x 3.05x 3.40x 3.30x
Cc: Huang Ying <ying.huang@intel.com>
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
hifive-unleashed-5.1
Jussi Kivilinna
Herbert Xu
parent
35a1fc1873
commit
023af60825
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@ -28,6 +28,9 @@
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#include <crypto/aes.h>
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#include <crypto/cryptd.h>
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#include <crypto/ctr.h>
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#include <crypto/b128ops.h>
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#include <crypto/lrw.h>
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#include <crypto/xts.h>
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#include <asm/cpu_device_id.h>
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#include <asm/i387.h>
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#include <asm/crypto/aes.h>
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@ -41,18 +44,10 @@
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#define HAS_CTR
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#endif
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#if defined(CONFIG_CRYPTO_LRW) || defined(CONFIG_CRYPTO_LRW_MODULE)
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#define HAS_LRW
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#endif
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#if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
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#define HAS_PCBC
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#endif
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#if defined(CONFIG_CRYPTO_XTS) || defined(CONFIG_CRYPTO_XTS_MODULE)
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#define HAS_XTS
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#endif
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/* This data is stored at the end of the crypto_tfm struct.
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* It's a type of per "session" data storage location.
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* This needs to be 16 byte aligned.
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@ -79,6 +74,16 @@ struct aesni_hash_subkey_req_data {
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#define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
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#define RFC4106_HASH_SUBKEY_SIZE 16
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struct aesni_lrw_ctx {
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struct lrw_table_ctx lrw_table;
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u8 raw_aes_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
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};
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struct aesni_xts_ctx {
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u8 raw_tweak_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
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u8 raw_crypt_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
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};
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asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
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unsigned int key_len);
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asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
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@ -398,13 +403,6 @@ static int ablk_rfc3686_ctr_init(struct crypto_tfm *tfm)
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#endif
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#endif
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#ifdef HAS_LRW
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static int ablk_lrw_init(struct crypto_tfm *tfm)
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{
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return ablk_init_common(tfm, "fpu(lrw(__driver-aes-aesni))");
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}
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#endif
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#ifdef HAS_PCBC
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static int ablk_pcbc_init(struct crypto_tfm *tfm)
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{
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@ -412,12 +410,160 @@ static int ablk_pcbc_init(struct crypto_tfm *tfm)
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}
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#endif
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#ifdef HAS_XTS
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static int ablk_xts_init(struct crypto_tfm *tfm)
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static void lrw_xts_encrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
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{
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return ablk_init_common(tfm, "fpu(xts(__driver-aes-aesni))");
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aesni_ecb_enc(ctx, blks, blks, nbytes);
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}
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static void lrw_xts_decrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
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{
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aesni_ecb_dec(ctx, blks, blks, nbytes);
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}
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static int lrw_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
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unsigned int keylen)
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{
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struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
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int err;
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err = aes_set_key_common(tfm, ctx->raw_aes_ctx, key,
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keylen - AES_BLOCK_SIZE);
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if (err)
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return err;
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return lrw_init_table(&ctx->lrw_table, key + keylen - AES_BLOCK_SIZE);
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}
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static void lrw_aesni_exit_tfm(struct crypto_tfm *tfm)
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{
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struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
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lrw_free_table(&ctx->lrw_table);
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}
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static int lrw_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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be128 buf[8];
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struct lrw_crypt_req req = {
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.tbuf = buf,
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.tbuflen = sizeof(buf),
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.table_ctx = &ctx->lrw_table,
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.crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
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.crypt_fn = lrw_xts_encrypt_callback,
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};
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int ret;
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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kernel_fpu_begin();
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ret = lrw_crypt(desc, dst, src, nbytes, &req);
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kernel_fpu_end();
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return ret;
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}
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static int lrw_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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be128 buf[8];
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struct lrw_crypt_req req = {
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.tbuf = buf,
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.tbuflen = sizeof(buf),
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.table_ctx = &ctx->lrw_table,
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.crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
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.crypt_fn = lrw_xts_decrypt_callback,
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};
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int ret;
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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kernel_fpu_begin();
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ret = lrw_crypt(desc, dst, src, nbytes, &req);
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kernel_fpu_end();
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return ret;
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}
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static int xts_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
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unsigned int keylen)
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{
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struct aesni_xts_ctx *ctx = crypto_tfm_ctx(tfm);
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u32 *flags = &tfm->crt_flags;
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int err;
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/* key consists of keys of equal size concatenated, therefore
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* the length must be even
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*/
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if (keylen % 2) {
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*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
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return -EINVAL;
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}
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/* first half of xts-key is for crypt */
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err = aes_set_key_common(tfm, ctx->raw_crypt_ctx, key, keylen / 2);
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if (err)
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return err;
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/* second half of xts-key is for tweak */
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return aes_set_key_common(tfm, ctx->raw_tweak_ctx, key + keylen / 2,
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keylen / 2);
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}
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static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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be128 buf[8];
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struct xts_crypt_req req = {
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.tbuf = buf,
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.tbuflen = sizeof(buf),
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.tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
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.tweak_fn = XTS_TWEAK_CAST(aesni_enc),
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.crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
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.crypt_fn = lrw_xts_encrypt_callback,
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};
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int ret;
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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kernel_fpu_begin();
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ret = xts_crypt(desc, dst, src, nbytes, &req);
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kernel_fpu_end();
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return ret;
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}
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static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
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struct scatterlist *src, unsigned int nbytes)
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{
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struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
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be128 buf[8];
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struct xts_crypt_req req = {
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.tbuf = buf,
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.tbuflen = sizeof(buf),
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.tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
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.tweak_fn = XTS_TWEAK_CAST(aesni_enc),
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.crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
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.crypt_fn = lrw_xts_decrypt_callback,
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};
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int ret;
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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kernel_fpu_begin();
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ret = xts_crypt(desc, dst, src, nbytes, &req);
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kernel_fpu_end();
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return ret;
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}
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#endif
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#ifdef CONFIG_X86_64
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static int rfc4106_init(struct crypto_tfm *tfm)
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@ -1035,30 +1181,6 @@ static struct crypto_alg aesni_algs[] = { {
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},
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#endif
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#endif
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#ifdef HAS_LRW
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}, {
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.cra_name = "lrw(aes)",
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.cra_driver_name = "lrw-aes-aesni",
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.cra_priority = 400,
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct async_helper_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_ablkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_init = ablk_lrw_init,
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.cra_exit = ablk_exit,
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.cra_u = {
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.ablkcipher = {
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.min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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.setkey = ablk_set_key,
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.encrypt = ablk_encrypt,
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.decrypt = ablk_decrypt,
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},
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},
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#endif
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#ifdef HAS_PCBC
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}, {
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.cra_name = "pcbc(aes)",
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@ -1083,7 +1205,69 @@ static struct crypto_alg aesni_algs[] = { {
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},
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},
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#endif
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#ifdef HAS_XTS
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}, {
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.cra_name = "__lrw-aes-aesni",
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.cra_driver_name = "__driver-lrw-aes-aesni",
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.cra_priority = 0,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct aesni_lrw_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_exit = lrw_aesni_exit_tfm,
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.cra_u = {
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.blkcipher = {
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.min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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.setkey = lrw_aesni_setkey,
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.encrypt = lrw_encrypt,
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.decrypt = lrw_decrypt,
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},
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},
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}, {
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.cra_name = "__xts-aes-aesni",
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.cra_driver_name = "__driver-xts-aes-aesni",
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.cra_priority = 0,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct aesni_xts_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_u = {
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.blkcipher = {
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.min_keysize = 2 * AES_MIN_KEY_SIZE,
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.max_keysize = 2 * AES_MAX_KEY_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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.setkey = xts_aesni_setkey,
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.encrypt = xts_encrypt,
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.decrypt = xts_decrypt,
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},
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},
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}, {
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.cra_name = "lrw(aes)",
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.cra_driver_name = "lrw-aes-aesni",
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.cra_priority = 400,
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct async_helper_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_ablkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_init = ablk_init,
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.cra_exit = ablk_exit,
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.cra_u = {
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.ablkcipher = {
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.min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
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.ivsize = AES_BLOCK_SIZE,
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.setkey = ablk_set_key,
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.encrypt = ablk_encrypt,
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.decrypt = ablk_decrypt,
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},
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},
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}, {
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.cra_name = "xts(aes)",
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.cra_driver_name = "xts-aes-aesni",
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@ -1094,7 +1278,7 @@ static struct crypto_alg aesni_algs[] = { {
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.cra_alignmask = 0,
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.cra_type = &crypto_ablkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_init = ablk_xts_init,
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.cra_init = ablk_init,
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.cra_exit = ablk_exit,
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.cra_u = {
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.ablkcipher = {
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@ -1106,7 +1290,6 @@ static struct crypto_alg aesni_algs[] = { {
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.decrypt = ablk_decrypt,
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},
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},
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#endif
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} };
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@ -564,6 +564,8 @@ config CRYPTO_AES_NI_INTEL
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select CRYPTO_CRYPTD
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select CRYPTO_ABLK_HELPER_X86
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select CRYPTO_ALGAPI
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select CRYPTO_LRW
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select CRYPTO_XTS
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help
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Use Intel AES-NI instructions for AES algorithm.
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Loading…
Reference in New Issue