video: Runtime PM for SuperH Mobile LCDC
This patch modifies the SuperH Mobile LCDC framebuffer driver to support Runtime PM. The driver is using the functions - pm_runtime_get_sync() - pm_runtime_put_sync() to inform the bus code if the hardware is idle or not. If the hardware is idle then the bus code may call the runtime dev_pm_ops callbacks to save and restore state. pm_runtime_resume() is used to allow the driver to access the hardware from probe(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>hifive-unleashed-5.1
Magnus Damm
Paul Mundt
parent
f1a3b994f9
commit
0246c4712c
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@ -14,6 +14,7 @@
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#include <linux/mm.h>
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#include <linux/fb.h>
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#include <linux/clk.h>
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#include <linux/pm_runtime.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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@ -23,33 +24,6 @@
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#define PALETTE_NR 16
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struct sh_mobile_lcdc_priv;
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struct sh_mobile_lcdc_chan {
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struct sh_mobile_lcdc_priv *lcdc;
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unsigned long *reg_offs;
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unsigned long ldmt1r_value;
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unsigned long enabled; /* ME and SE in LDCNT2R */
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struct sh_mobile_lcdc_chan_cfg cfg;
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u32 pseudo_palette[PALETTE_NR];
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struct fb_info *info;
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dma_addr_t dma_handle;
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struct fb_deferred_io defio;
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struct scatterlist *sglist;
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unsigned long frame_end;
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wait_queue_head_t frame_end_wait;
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};
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struct sh_mobile_lcdc_priv {
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void __iomem *base;
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int irq;
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atomic_t clk_usecnt;
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struct clk *dot_clk;
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struct clk *clk;
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unsigned long lddckr;
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struct sh_mobile_lcdc_chan ch[2];
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int started;
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};
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/* shared registers */
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#define _LDDCKR 0x410
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#define _LDDCKSTPR 0x414
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@ -63,11 +37,23 @@ struct sh_mobile_lcdc_priv {
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#define _LDDWAR 0x900
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#define _LDDRAR 0x904
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/* shared registers and their order for context save/restore */
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static int lcdc_shared_regs[] = {
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_LDDCKR,
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_LDDCKSTPR,
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_LDINTR,
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_LDDDSR,
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_LDCNT1R,
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_LDCNT2R,
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};
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#define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs)
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/* per-channel registers */
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enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R,
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LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR };
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LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR,
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NR_CH_REGS };
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static unsigned long lcdc_offs_mainlcd[] = {
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static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
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[LDDCKPAT1R] = 0x400,
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[LDDCKPAT2R] = 0x404,
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[LDMT1R] = 0x418,
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@ -85,7 +71,7 @@ static unsigned long lcdc_offs_mainlcd[] = {
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[LDPMR] = 0x460,
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};
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static unsigned long lcdc_offs_sublcd[] = {
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static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
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[LDDCKPAT1R] = 0x408,
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[LDDCKPAT2R] = 0x40c,
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[LDMT1R] = 0x600,
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@ -110,6 +96,35 @@ static unsigned long lcdc_offs_sublcd[] = {
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#define LDINTR_FE 0x00000400
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#define LDINTR_FS 0x00000004
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struct sh_mobile_lcdc_priv;
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struct sh_mobile_lcdc_chan {
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struct sh_mobile_lcdc_priv *lcdc;
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unsigned long *reg_offs;
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unsigned long ldmt1r_value;
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unsigned long enabled; /* ME and SE in LDCNT2R */
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struct sh_mobile_lcdc_chan_cfg cfg;
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u32 pseudo_palette[PALETTE_NR];
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unsigned long saved_ch_regs[NR_CH_REGS];
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struct fb_info *info;
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dma_addr_t dma_handle;
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struct fb_deferred_io defio;
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struct scatterlist *sglist;
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unsigned long frame_end;
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wait_queue_head_t frame_end_wait;
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};
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struct sh_mobile_lcdc_priv {
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void __iomem *base;
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int irq;
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atomic_t hw_usecnt;
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struct device *dev;
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struct clk *dot_clk;
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unsigned long lddckr;
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struct sh_mobile_lcdc_chan ch[2];
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unsigned long saved_shared_regs[NR_SHARED_REGS];
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int started;
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};
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static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
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int reg_nr, unsigned long data)
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{
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@ -188,8 +203,8 @@ struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
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static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
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{
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if (atomic_inc_and_test(&priv->clk_usecnt)) {
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clk_enable(priv->clk);
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if (atomic_inc_and_test(&priv->hw_usecnt)) {
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pm_runtime_get_sync(priv->dev);
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if (priv->dot_clk)
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clk_enable(priv->dot_clk);
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}
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@ -197,10 +212,10 @@ static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
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static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
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{
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if (atomic_sub_return(1, &priv->clk_usecnt) == -1) {
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if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
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if (priv->dot_clk)
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clk_disable(priv->dot_clk);
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clk_disable(priv->clk);
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pm_runtime_put(priv->dev);
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}
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}
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@ -574,7 +589,6 @@ static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
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int clock_source,
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struct sh_mobile_lcdc_priv *priv)
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{
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char clk_name[8];
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char *str;
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int icksel;
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@ -588,23 +602,21 @@ static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
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priv->lddckr = icksel << 16;
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atomic_set(&priv->clk_usecnt, -1);
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snprintf(clk_name, sizeof(clk_name), "lcdc%d", pdev->id);
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priv->clk = clk_get(&pdev->dev, clk_name);
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if (IS_ERR(priv->clk)) {
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dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
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return PTR_ERR(priv->clk);
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}
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if (str) {
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priv->dot_clk = clk_get(&pdev->dev, str);
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if (IS_ERR(priv->dot_clk)) {
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dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
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clk_put(priv->clk);
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return PTR_ERR(priv->dot_clk);
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}
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}
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atomic_set(&priv->hw_usecnt, -1);
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/* Runtime PM support involves two step for this driver:
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* 1) Enable Runtime PM
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* 2) Force Runtime PM Resume since hardware is accessed from probe()
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*/
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pm_runtime_enable(priv->dev);
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pm_runtime_resume(priv->dev);
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return 0;
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}
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@ -722,9 +734,59 @@ static int sh_mobile_lcdc_resume(struct device *dev)
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return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
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}
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static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
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struct sh_mobile_lcdc_chan *ch;
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int k, n;
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/* save per-channel registers */
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for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
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ch = &p->ch[k];
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if (!ch->enabled)
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continue;
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for (n = 0; n < NR_CH_REGS; n++)
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ch->saved_ch_regs[n] = lcdc_read_chan(ch, n);
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}
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/* save shared registers */
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for (n = 0; n < NR_SHARED_REGS; n++)
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p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]);
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/* turn off LCDC hardware */
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lcdc_write(p, _LDCNT1R, 0);
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return 0;
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}
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static int sh_mobile_lcdc_runtime_resume(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
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struct sh_mobile_lcdc_chan *ch;
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int k, n;
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/* restore per-channel registers */
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for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
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ch = &p->ch[k];
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if (!ch->enabled)
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continue;
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for (n = 0; n < NR_CH_REGS; n++)
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lcdc_write_chan(ch, n, ch->saved_ch_regs[n]);
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}
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/* restore shared registers */
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for (n = 0; n < NR_SHARED_REGS; n++)
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lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]);
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return 0;
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}
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static struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
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.suspend = sh_mobile_lcdc_suspend,
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.resume = sh_mobile_lcdc_resume,
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.runtime_suspend = sh_mobile_lcdc_runtime_suspend,
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.runtime_resume = sh_mobile_lcdc_runtime_resume,
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};
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static int sh_mobile_lcdc_remove(struct platform_device *pdev);
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@ -769,6 +831,7 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
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}
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priv->irq = i;
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priv->dev = &pdev->dev;
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platform_set_drvdata(pdev, priv);
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pdata = pdev->dev.platform_data;
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@ -940,7 +1003,8 @@ static int sh_mobile_lcdc_remove(struct platform_device *pdev)
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if (priv->dot_clk)
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clk_put(priv->dot_clk);
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clk_put(priv->clk);
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pm_runtime_disable(priv->dev);
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if (priv->base)
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iounmap(priv->base);
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