phy: Add SATA3 PHY support for Broadcom NSP SoC
This patch adds support for Broadcom NSP SATA3 PHY in existing Broadcom SATA PHY driver. Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org>hifive-unleashed-5.1
parent
3ee2e6dcaa
commit
024812889a
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@ -45,6 +45,7 @@ enum brcm_sata_phy_version {
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BRCM_SATA_PHY_STB_28NM,
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BRCM_SATA_PHY_STB_28NM,
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BRCM_SATA_PHY_STB_40NM,
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BRCM_SATA_PHY_STB_40NM,
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BRCM_SATA_PHY_IPROC_NS2,
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BRCM_SATA_PHY_IPROC_NS2,
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BRCM_SATA_PHY_IPROC_NSP,
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};
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};
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struct brcm_sata_port {
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struct brcm_sata_port {
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@ -73,6 +74,13 @@ enum sata_phy_regs {
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PLL_REG_BANK_0 = 0x050,
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PLL_REG_BANK_0 = 0x050,
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PLL_REG_BANK_0_PLLCONTROL_0 = 0x81,
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PLL_REG_BANK_0_PLLCONTROL_0 = 0x81,
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PLLCONTROL_0_FREQ_DET_RESTART = BIT(13),
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PLLCONTROL_0_FREQ_MONITOR = BIT(12),
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PLLCONTROL_0_SEQ_START = BIT(15),
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PLL_CAP_CONTROL = 0x85,
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PLL_ACTRL2 = 0x8b,
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PLL_ACTRL2_SELDIV_MASK = 0x1f,
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PLL_ACTRL2_SELDIV_SHIFT = 9,
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PLL1_REG_BANK = 0x060,
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PLL1_REG_BANK = 0x060,
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PLL1_ACTRL2 = 0x82,
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PLL1_ACTRL2 = 0x82,
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@ -80,6 +88,7 @@ enum sata_phy_regs {
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PLL1_ACTRL4 = 0x84,
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PLL1_ACTRL4 = 0x84,
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OOB_REG_BANK = 0x150,
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OOB_REG_BANK = 0x150,
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OOB1_REG_BANK = 0x160,
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OOB_CTRL1 = 0x80,
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OOB_CTRL1 = 0x80,
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OOB_CTRL1_BURST_MAX_MASK = 0xf,
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OOB_CTRL1_BURST_MAX_MASK = 0xf,
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OOB_CTRL1_BURST_MAX_SHIFT = 12,
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OOB_CTRL1_BURST_MAX_SHIFT = 12,
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@ -271,6 +280,73 @@ static int brcm_ns2_sata_init(struct brcm_sata_port *port)
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return 0;
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return 0;
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}
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}
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static int brcm_nsp_sata_init(struct brcm_sata_port *port)
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{
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struct brcm_sata_phy *priv = port->phy_priv;
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struct device *dev = port->phy_priv->dev;
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void __iomem *base = priv->phy_base;
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unsigned int oob_bank;
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unsigned int val, try;
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/* Configure OOB control */
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if (port->portnum == 0)
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oob_bank = OOB_REG_BANK;
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else if (port->portnum == 1)
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oob_bank = OOB1_REG_BANK;
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else
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return -EINVAL;
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val = 0x0;
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val |= (0x0f << OOB_CTRL1_BURST_MAX_SHIFT);
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val |= (0x06 << OOB_CTRL1_BURST_MIN_SHIFT);
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val |= (0x0f << OOB_CTRL1_WAKE_IDLE_MAX_SHIFT);
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val |= (0x06 << OOB_CTRL1_WAKE_IDLE_MIN_SHIFT);
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brcm_sata_phy_wr(base, oob_bank, OOB_CTRL1, 0x0, val);
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val = 0x0;
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val |= (0x2e << OOB_CTRL2_RESET_IDLE_MAX_SHIFT);
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val |= (0x02 << OOB_CTRL2_BURST_CNT_SHIFT);
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val |= (0x16 << OOB_CTRL2_RESET_IDLE_MIN_SHIFT);
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brcm_sata_phy_wr(base, oob_bank, OOB_CTRL2, 0x0, val);
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brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_ACTRL2,
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~(PLL_ACTRL2_SELDIV_MASK << PLL_ACTRL2_SELDIV_SHIFT),
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0x0c << PLL_ACTRL2_SELDIV_SHIFT);
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brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_CAP_CONTROL,
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0xff0, 0x4f0);
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val = PLLCONTROL_0_FREQ_DET_RESTART | PLLCONTROL_0_FREQ_MONITOR;
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brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,
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~val, val);
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val = PLLCONTROL_0_SEQ_START;
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brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,
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~val, 0);
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mdelay(10);
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brcm_sata_phy_wr(base, PLL_REG_BANK_0, PLL_REG_BANK_0_PLLCONTROL_0,
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~val, val);
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/* Wait for pll_seq_done bit */
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try = 50;
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while (try--) {
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val = brcm_sata_phy_rd(base, BLOCK0_REG_BANK,
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BLOCK0_XGXSSTATUS);
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if (val & BLOCK0_XGXSSTATUS_PLL_LOCK)
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break;
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msleep(20);
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}
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if (!try) {
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/* PLL did not lock; give up */
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dev_err(dev, "port%d PLL did not lock\n", port->portnum);
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return -ETIMEDOUT;
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}
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dev_dbg(dev, "port%d initialized\n", port->portnum);
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return 0;
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}
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static int brcm_sata_phy_init(struct phy *phy)
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static int brcm_sata_phy_init(struct phy *phy)
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{
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{
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int rc;
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int rc;
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@ -284,6 +360,9 @@ static int brcm_sata_phy_init(struct phy *phy)
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case BRCM_SATA_PHY_IPROC_NS2:
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case BRCM_SATA_PHY_IPROC_NS2:
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rc = brcm_ns2_sata_init(port);
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rc = brcm_ns2_sata_init(port);
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break;
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break;
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case BRCM_SATA_PHY_IPROC_NSP:
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rc = brcm_nsp_sata_init(port);
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break;
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default:
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default:
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rc = -ENODEV;
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rc = -ENODEV;
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};
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};
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@ -303,6 +382,8 @@ static const struct of_device_id brcm_sata_phy_of_match[] = {
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.data = (void *)BRCM_SATA_PHY_STB_40NM },
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.data = (void *)BRCM_SATA_PHY_STB_40NM },
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{ .compatible = "brcm,iproc-ns2-sata-phy",
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{ .compatible = "brcm,iproc-ns2-sata-phy",
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.data = (void *)BRCM_SATA_PHY_IPROC_NS2 },
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.data = (void *)BRCM_SATA_PHY_IPROC_NS2 },
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{ .compatible = "brcm,iproc-nsp-sata-phy",
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.data = (void *)BRCM_SATA_PHY_IPROC_NSP },
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{},
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{},
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};
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};
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MODULE_DEVICE_TABLE(of, brcm_sata_phy_of_match);
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MODULE_DEVICE_TABLE(of, brcm_sata_phy_of_match);
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