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drm/amdgpu: correct smu rlc handshake enablement bit 

Correct the enablement bit of SMU RLC handshake.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
alistair/sunxi64-5.4-dsi
Jack Xiao 2019-07-15 05:12:21 +08:00 committed by Alex Deucher
parent 87190edcf3
commit 02938eed74
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
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@ -1779,9 +1779,9 @@ static void gfx_v10_0_rlc_smu_handshake_cntl(struct amdgpu_device *adev,
* hence no handshake between SMU & RLC
* GFXOFF will be disabled
*/
rlc_pg_cntl |= 0x80000;
rlc_pg_cntl |= 0x800000;
} else
rlc_pg_cntl &= ~0x80000;
rlc_pg_cntl &= ~0x800000;
WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, rlc_pg_cntl);
}