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drm/amd/display: Prevent master programming in multisync 

Verify that the stream is master - and program only the slave displays

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
hifive-unleashed-5.1
Mikita Lipski 2017-12-18 10:34:56 -05:00 committed by Alex Deucher
parent 3bc4aaa952
commit 03736f4cf8
3 changed files with 5 additions and 3 deletions
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2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
View File

@ -2348,7 +2348,7 @@ static void set_master_stream(struct dc_stream_state *stream_set[],
}
}
for (j = 0; j < stream_count; j++) {
if (stream_set[j] && j != master_stream)
if (stream_set[j])
stream_set[j]->triggered_crtc_reset.event_source = stream_set[master_stream];
}
}

4
drivers/gpu/drm/amd/display/dc/core/dc.c
View File

@ -521,11 +521,13 @@ static void enable_timing_multisync(
if (!ctx->res_ctx.pipe_ctx[i].stream ||
!ctx->res_ctx.pipe_ctx[i].stream->triggered_crtc_reset.enabled)
continue;
if (ctx->res_ctx.pipe_ctx[i].stream == ctx->res_ctx.pipe_ctx[i].stream->triggered_crtc_reset.event_source)
continue;
multisync_pipes[multisync_count] = &ctx->res_ctx.pipe_ctx[i];
multisync_count++;
}
if (multisync_count > 1) {
if (multisync_count > 0) {
dc->hwss.enable_per_frame_crtc_position_reset(
dc, multisync_count, multisync_pipes);
}

2
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
View File

@ -1097,7 +1097,7 @@ static void dcn10_enable_per_frame_crtc_position_reset(
DC_SYNC_INFO("Waiting for trigger\n");
for (i = 1; i < group_size; i++)
for (i = 0; i < group_size; i++)
wait_for_reset_trigger_to_occur(dc_ctx, grouped_pipes[i]->stream_res.tg);
DC_SYNC_INFO("Multi-display sync is complete\n");