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mmc: sdhci-of-esdhc: set the sd clock divisor value above 3 

This patch is to set the sd clock divisor value above 3 in tuning mode

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
alistair/sunxi64-5.4-dsi
Yangbo Lu 2019-06-14 16:29:53 +08:00 committed by Ulf Hansson
parent 5928d8929d
commit 04509d7709
1 changed files with 8 additions and 0 deletions
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8
drivers/mmc/host/sdhci-of-esdhc.c
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@ -830,9 +830,17 @@ static int esdhc_execute_tuning(struct mmc_host *mmc, u32 opcode)
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_esdhc *esdhc = sdhci_pltfm_priv(pltfm_host);
bool hs400_tuning;
unsigned int clk;
u32 val;
int ret;
/* For tuning mode, the sd clock divisor value
* must be larger than 3 according to reference manual.
*/
clk = esdhc->peripheral_clock / 3;
if (host->clock > clk)
esdhc_of_set_clock(host, clk);
if (esdhc->quirk_limited_clk_division &&
host->flags & SDHCI_HS400_TUNING)
esdhc_of_set_clock(host, host->clock);