[PATCH] add synclink_gt crc return feature
Add ability to return HDLC CRC to user application. Signed-off-by: Paul Fulghum <paulkf@microgate.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>hifive-unleashed-5.1
parent
643f3319b9
commit
04b374d0f5
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@ -3077,7 +3077,7 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp,
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static int alloc_tmp_rbuf(struct slgt_info *info)
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static int alloc_tmp_rbuf(struct slgt_info *info)
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{
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{
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info->tmp_rbuf = kmalloc(info->max_frame_size, GFP_KERNEL);
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info->tmp_rbuf = kmalloc(info->max_frame_size + 5, GFP_KERNEL);
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if (info->tmp_rbuf == NULL)
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if (info->tmp_rbuf == NULL)
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return -ENOMEM;
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return -ENOMEM;
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return 0;
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return 0;
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@ -4011,7 +4011,7 @@ static void hdlc_mode(struct slgt_info *info)
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case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break;
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case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break;
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}
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}
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switch (info->params.crc_type)
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switch (info->params.crc_type & HDLC_CRC_MASK)
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{
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{
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case HDLC_CRC_16_CCITT: val |= BIT9; break;
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case HDLC_CRC_16_CCITT: val |= BIT9; break;
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case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break;
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case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break;
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@ -4072,7 +4072,7 @@ static void hdlc_mode(struct slgt_info *info)
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case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break;
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case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break;
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}
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}
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switch (info->params.crc_type)
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switch (info->params.crc_type & HDLC_CRC_MASK)
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{
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{
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case HDLC_CRC_16_CCITT: val |= BIT9; break;
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case HDLC_CRC_16_CCITT: val |= BIT9; break;
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case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break;
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case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break;
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@ -4333,6 +4333,12 @@ static int rx_get_frame(struct slgt_info *info)
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unsigned long flags;
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unsigned long flags;
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struct tty_struct *tty = info->tty;
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struct tty_struct *tty = info->tty;
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unsigned char addr_field = 0xff;
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unsigned char addr_field = 0xff;
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unsigned int crc_size = 0;
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switch (info->params.crc_type & HDLC_CRC_MASK) {
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case HDLC_CRC_16_CCITT: crc_size = 2; break;
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case HDLC_CRC_32_CCITT: crc_size = 4; break;
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}
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check_again:
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check_again:
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@ -4377,7 +4383,7 @@ check_again:
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status = desc_status(info->rbufs[end]);
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status = desc_status(info->rbufs[end]);
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/* ignore CRC bit if not using CRC (bit is undefined) */
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/* ignore CRC bit if not using CRC (bit is undefined) */
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if (info->params.crc_type == HDLC_CRC_NONE)
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if ((info->params.crc_type & HDLC_CRC_MASK) == HDLC_CRC_NONE)
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status &= ~BIT1;
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status &= ~BIT1;
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if (framesize == 0 ||
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if (framesize == 0 ||
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@ -4386,34 +4392,34 @@ check_again:
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goto check_again;
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goto check_again;
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}
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}
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if (framesize < 2 || status & (BIT1+BIT0)) {
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if (framesize < (2 + crc_size) || status & BIT0) {
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if (framesize < 2 || (status & BIT0))
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info->icount.rxshort++;
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info->icount.rxshort++;
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else
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info->icount.rxcrc++;
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framesize = 0;
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framesize = 0;
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} else if (status & BIT1) {
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info->icount.rxcrc++;
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if (!(info->params.crc_type & HDLC_CRC_RETURN_EX))
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framesize = 0;
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}
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#ifdef CONFIG_HDLC
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#ifdef CONFIG_HDLC
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{
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if (framesize == 0) {
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struct net_device_stats *stats = hdlc_stats(info->netdev);
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struct net_device_stats *stats = hdlc_stats(info->netdev);
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stats->rx_errors++;
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stats->rx_errors++;
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stats->rx_frame_errors++;
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stats->rx_frame_errors++;
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}
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#endif
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} else {
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/* adjust frame size for CRC, if any */
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if (info->params.crc_type == HDLC_CRC_16_CCITT)
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framesize -= 2;
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else if (info->params.crc_type == HDLC_CRC_32_CCITT)
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framesize -= 4;
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}
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}
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#endif
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DBGBH(("%s rx frame status=%04X size=%d\n",
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DBGBH(("%s rx frame status=%04X size=%d\n",
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info->device_name, status, framesize));
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info->device_name, status, framesize));
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DBGDATA(info, info->rbufs[start].buf, min_t(int, framesize, DMABUFSIZE), "rx");
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DBGDATA(info, info->rbufs[start].buf, min_t(int, framesize, DMABUFSIZE), "rx");
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if (framesize) {
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if (framesize) {
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if (framesize > info->max_frame_size)
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if (!(info->params.crc_type & HDLC_CRC_RETURN_EX)) {
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framesize -= crc_size;
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crc_size = 0;
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}
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if (framesize > info->max_frame_size + crc_size)
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info->icount.rxlong++;
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info->icount.rxlong++;
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else {
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else {
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/* copy dma buffer(s) to contiguous temp buffer */
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/* copy dma buffer(s) to contiguous temp buffer */
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@ -4433,6 +4439,11 @@ check_again:
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i = 0;
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i = 0;
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}
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}
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if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
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*p = (status & BIT1) ? RX_CRC_ERROR : RX_OK;
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framesize++;
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}
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#ifdef CONFIG_HDLC
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#ifdef CONFIG_HDLC
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if (info->netcount)
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if (info->netcount)
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hdlcdev_rx(info,info->tmp_rbuf, framesize);
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hdlcdev_rx(info,info->tmp_rbuf, framesize);
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