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net: macb: Change interrupt and napi enable order in open 

Current order in open:
-> Enable interrupts (macb_init_hw)
-> Enable NAPI
-> Start PHY

Sequence of RX handling:
-> RX interrupt occurs
-> Interrupt is cleared and interrupt bits disabled in handler
-> NAPI is scheduled
-> In NAPI, RX budget is processed and RX interrupts are re-enabled

With the above, on QEMU or fixed link setups (where PHY state doesn't
matter), there's a chance macb RX interrupt occurs before NAPI is
enabled. This will result in NAPI being scheduled before it is enabled.
Fix this macb open by changing the order.

Fixes: ae1f2a56d2 ("net: macb: Added support for many RX queues")
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
hifive-unleashed-5.2
Harini Katakam 2019-05-07 19:59:10 +05:30 committed by David S. Miller
parent ff6ab32bd4
commit 0504453139
1 changed files with 3 additions and 3 deletions
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6
drivers/net/ethernet/cadence/macb_main.c
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@ -2461,12 +2461,12 @@ static int macb_open(struct net_device *dev)
goto pm_exit;
}
bp->macbgem_ops.mog_init_rings(bp);
macb_init_hw(bp);
for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue)
napi_enable(&queue->napi);
bp->macbgem_ops.mog_init_rings(bp);
macb_init_hw(bp);
/* schedule a link state check */
phy_start(dev->phydev);