staging: rtl8723au: Call usb_read*() functions directly
Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>hifive-unleashed-5.1
Jes Sorensen
Greg Kroah-Hartman
parent
1c1bc5f1dd
commit
050abc4583
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@ -19,6 +19,7 @@
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#include <rtw_efuse.h>
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#include <rtl8723a_hal.h>
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#include <usb_ops_linux.h>
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/*------------------------Define local variable------------------------------*/
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@ -59,13 +60,13 @@ static void Efuse_PowerSwitch(struct rtw_adapter *padapter,
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/* 1.2V Power: From VDDON with Power
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Cut(0x0000h[15]), defualt valid */
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tmpV16 = rtw_read16(padapter, REG_SYS_ISO_CTRL);
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tmpV16 = rtl8723au_read16(padapter, REG_SYS_ISO_CTRL);
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if (!(tmpV16 & PWC_EV12V)) {
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tmpV16 |= PWC_EV12V;
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rtw_write16(padapter, REG_SYS_ISO_CTRL, tmpV16);
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}
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/* Reset: 0x0000h[28], default valid */
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tmpV16 = rtw_read16(padapter, REG_SYS_FUNC_EN);
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tmpV16 = rtl8723au_read16(padapter, REG_SYS_FUNC_EN);
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if (!(tmpV16 & FEN_ELDR)) {
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tmpV16 |= FEN_ELDR;
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rtw_write16(padapter, REG_SYS_FUNC_EN, tmpV16);
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@ -73,7 +74,7 @@ static void Efuse_PowerSwitch(struct rtw_adapter *padapter,
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/* Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock
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from ANA, default valid */
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tmpV16 = rtw_read16(padapter, REG_SYS_CLKR);
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tmpV16 = rtl8723au_read16(padapter, REG_SYS_CLKR);
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if ((!(tmpV16 & LOADER_CLK_EN)) || (!(tmpV16 & ANA8M))) {
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tmpV16 |= (LOADER_CLK_EN | ANA8M);
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rtw_write16(padapter, REG_SYS_CLKR, tmpV16);
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@ -81,7 +82,7 @@ static void Efuse_PowerSwitch(struct rtw_adapter *padapter,
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if (bWrite == true) {
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/* Enable LDO 2.5V before read/write action */
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tempval = rtw_read8(padapter, EFUSE_TEST + 3);
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tempval = rtl8723au_read8(padapter, EFUSE_TEST + 3);
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tempval &= 0x0F;
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tempval |= (VOLTAGE_V25 << 4);
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rtw_write8(padapter, EFUSE_TEST + 3, (tempval | 0x80));
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@ -91,7 +92,7 @@ static void Efuse_PowerSwitch(struct rtw_adapter *padapter,
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if (bWrite == true) {
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/* Disable LDO 2.5V after read/write action */
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tempval = rtw_read8(padapter, EFUSE_TEST + 3);
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tempval = rtl8723au_read8(padapter, EFUSE_TEST + 3);
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rtw_write8(padapter, EFUSE_TEST + 3, (tempval & 0x7F));
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}
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}
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@ -158,20 +159,20 @@ ReadEFuseByte23a(struct rtw_adapter *Adapter, u16 _offset, u8 *pbuf)
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/* Write Address */
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rtw_write8(Adapter, EFUSE_CTRL+1, (_offset & 0xff));
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readbyte = rtw_read8(Adapter, EFUSE_CTRL+2);
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readbyte = rtl8723au_read8(Adapter, EFUSE_CTRL+2);
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rtw_write8(Adapter, EFUSE_CTRL+2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc));
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/* Write bit 32 0 */
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readbyte = rtw_read8(Adapter, EFUSE_CTRL+3);
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readbyte = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
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rtw_write8(Adapter, EFUSE_CTRL+3, (readbyte & 0x7f));
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/* Check bit 32 read-ready */
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retry = 0;
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value32 = rtw_read32(Adapter, EFUSE_CTRL);
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value32 = rtl8723au_read32(Adapter, EFUSE_CTRL);
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/* while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10)) */
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while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10000))
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{
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value32 = rtw_read32(Adapter, EFUSE_CTRL);
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value32 = rtl8723au_read32(Adapter, EFUSE_CTRL);
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retry++;
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}
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@ -180,7 +181,7 @@ ReadEFuseByte23a(struct rtw_adapter *Adapter, u16 _offset, u8 *pbuf)
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/* Designer says that there shall be some delay after ready bit is set, or the */
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/* result will always stay on last data we read. */
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udelay(50);
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value32 = rtw_read32(Adapter, EFUSE_CTRL);
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value32 = rtl8723au_read32(Adapter, EFUSE_CTRL);
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*pbuf = (u8)(value32 & 0xff);
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}
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@ -302,21 +303,21 @@ EFUSE_Read1Byte23a(struct rtw_adapter *Adapter, u16 Address)
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/* Write E-fuse Register address bit0~7 */
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temp = Address & 0xFF;
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rtw_write8(Adapter, EFUSE_CTRL+1, temp);
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Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2);
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Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+2);
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/* Write E-fuse Register address bit8~9 */
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temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);
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rtw_write8(Adapter, EFUSE_CTRL+2, temp);
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/* Write 0x30[31]= 0 */
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Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
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Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
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temp = Bytetemp & 0x7F;
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rtw_write8(Adapter, EFUSE_CTRL+3, temp);
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/* Wait Write-ready (0x30[31]= 1) */
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Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
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Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
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while(!(Bytetemp & 0x80))
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{
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Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
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Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
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k++;
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if (k == 1000)
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{
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@ -324,7 +325,7 @@ EFUSE_Read1Byte23a(struct rtw_adapter *Adapter, u16 Address)
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break;
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}
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}
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data = rtw_read8(Adapter, EFUSE_CTRL);
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data = rtl8723au_read8(Adapter, EFUSE_CTRL);
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return data;
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}
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else
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@ -376,22 +377,22 @@ EFUSE_Write1Byte(
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/* Write E-fuse Register address bit0~7 */
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temp = Address & 0xFF;
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rtw_write8(Adapter, EFUSE_CTRL+1, temp);
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Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2);
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Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+2);
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/* Write E-fuse Register address bit8~9 */
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temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);
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rtw_write8(Adapter, EFUSE_CTRL+2, temp);
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/* Write 0x30[31]= 1 */
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Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
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Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
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temp = Bytetemp | 0x80;
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rtw_write8(Adapter, EFUSE_CTRL+3, temp);
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/* Wait Write-ready (0x30[31]= 0) */
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Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
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Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
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while(Bytetemp & 0x80)
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{
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Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
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Bytetemp = rtl8723au_read8(Adapter, EFUSE_CTRL+3);
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k++;
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if (k == 100)
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{
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@ -413,14 +414,14 @@ efuse_OneByteRead23a(struct rtw_adapter *pAdapter, u16 addr, u8 *data)
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/* address */
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rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff));
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rtw_write8(pAdapter, EFUSE_CTRL+2, ((u8)((addr>>8) &0x03)) |
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(rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC));
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(rtl8723au_read8(pAdapter, EFUSE_CTRL+2)&0xFC));
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rtw_write8(pAdapter, EFUSE_CTRL+3, 0x72);/* read cmd */
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while(!(0x80 &rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100))
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while(!(0x80 &rtl8723au_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100))
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tmpidx++;
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if (tmpidx < 100) {
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*data = rtw_read8(pAdapter, EFUSE_CTRL);
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*data = rtl8723au_read8(pAdapter, EFUSE_CTRL);
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bResult = _SUCCESS;
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} else {
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*data = 0xff;
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@ -444,12 +445,13 @@ efuse_OneByteWrite23a(struct rtw_adapter *pAdapter, u16 addr, u8 data)
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/* address */
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rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff));
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rtw_write8(pAdapter, EFUSE_CTRL+2,
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(rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC)|(u8)((addr>>8)&0x03));
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(rtl8723au_read8(pAdapter, EFUSE_CTRL+2)&0xFC)|(u8)((addr>>8)&0x03));
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rtw_write8(pAdapter, EFUSE_CTRL, data);/* data */
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rtw_write8(pAdapter, EFUSE_CTRL+3, 0xF2);/* write cmd */
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while((0x80 & rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100)) {
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while((0x80 & rtl8723au_read8(pAdapter, EFUSE_CTRL+3)) &&
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(tmpidx<100)) {
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tmpidx++;
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}
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@ -39,30 +39,6 @@ jackson@realtek.com.tw
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#include <usb_ops.h>
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u8 _rtw_read823a(struct rtw_adapter *adapter, u32 addr)
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{
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u8 r_val;
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struct _io_ops *io_ops = &adapter->io_ops;
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r_val = io_ops->_read8(adapter, addr);
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return r_val;
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}
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u16 _rtw_read1623a(struct rtw_adapter *adapter, u32 addr)
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{
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struct _io_ops *io_ops = &adapter->io_ops;
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return io_ops->_read16(adapter, addr);
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}
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u32 _rtw_read3223a(struct rtw_adapter *adapter, u32 addr)
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{
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struct _io_ops *io_ops = &adapter->io_ops;
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return io_ops->_read32(adapter, addr);
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}
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int _rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val)
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{
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struct _io_ops *io_ops = &adapter->io_ops;
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@ -22,6 +22,7 @@
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#ifdef CONFIG_8723AU_BT_COEXIST
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#include <rtl8723a_hal.h>
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#endif
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#include <usb_ops_linux.h>
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void ips_enter23a(struct rtw_adapter * padapter)
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{
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@ -98,7 +99,7 @@ int ips_leave23a(struct rtw_adapter * padapter)
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}
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DBG_8723A("==> ips_leave23a.....LED(0x%08x)...\n",
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rtw_read32(padapter, 0x4c));
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rtl8723au_read32(padapter, 0x4c));
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pwrpriv->bips_processing = false;
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pwrpriv->bkeepfwalive = false;
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@ -14,6 +14,7 @@
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******************************************************************************/
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#include <rtw_sreset.h>
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#include <usb_ops_linux.h>
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void rtw_sreset_init(struct rtw_adapter *padapter)
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{
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@ -47,7 +48,7 @@ u8 rtw_sreset_get_wifi_status(struct rtw_adapter *padapter)
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if (psrtpriv->silent_reset_inprogress)
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return status;
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val32 = rtw_read32(padapter, REG_TXDMA_STATUS);
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val32 = rtl8723au_read32(padapter, REG_TXDMA_STATUS);
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if (val32 == 0xeaeaeaea) {
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psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST;
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} else if (val32 != 0) {
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@ -18,6 +18,7 @@
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/* include files */
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#include "odm_precomp.h"
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#include <usb_ops_linux.h>
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#define DPK_DELTA_MAPPING_NUM 13
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#define index_mapping_HP_NUM 15
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@ -581,9 +582,9 @@ static void _PHY_SaveMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg, u32
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u32 i;
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for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++) {
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MACBackup[i] = rtw_read8(pAdapter, MACReg[i]);
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MACBackup[i] = rtl8723au_read8(pAdapter, MACReg[i]);
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}
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MACBackup[i] = rtw_read32(pAdapter, MACReg[i]);
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MACBackup[i] = rtl8723au_read32(pAdapter, MACReg[i]);
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}
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static void _PHY_ReloadADDARegisters(struct rtw_adapter *pAdapter, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum)
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@ -878,7 +879,7 @@ static void _PHY_LCCalibrate(struct rtw_adapter *pAdapter, bool is2T)
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u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal;
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/* Check continuous TX and Packet TX */
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tmpReg = rtw_read8(pAdapter, 0xd03);
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tmpReg = rtl8723au_read8(pAdapter, 0xd03);
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if ((tmpReg&0x70) != 0) /* Deal with contisuous TX case */
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rtw_write8(pAdapter, 0xd03, tmpReg&0x8F); /* disable all continuous TX */
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@ -30,6 +30,7 @@ Major Change History:
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--*/
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#include <HalPwrSeqCmd.h>
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#include <usb_ops_linux.h>
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/* */
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/* Description: */
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@ -89,7 +90,7 @@ u8 HalPwrSeqCmdParsing23a(struct rtw_adapter *padapter, u8 CutVersion,
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offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
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/* Read the value from system register */
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value = rtw_read8(padapter, offset);
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value = rtl8723au_read8(padapter, offset);
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value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
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value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) &
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@ -107,7 +108,8 @@ u8 HalPwrSeqCmdParsing23a(struct rtw_adapter *padapter, u8 CutVersion,
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bPollingBit = false;
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offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
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do {
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value = rtw_read8(padapter, offset);
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value = rtl8723au_read8(padapter,
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offset);
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value &= GET_PWR_CFG_MASK(PwrCfgCmd);
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if (value ==
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@ -18,6 +18,7 @@
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#include <hal_intf.h>
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#include <hal_com.h>
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#include <rtl8723a_hal.h>
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#include <usb_ops_linux.h>
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#define _HAL_INIT_C_
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@ -225,7 +226,7 @@ void HalSetBrateCfg23a(struct rtw_adapter *padapter, u8 *mBratesOS)
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rtw_write8(padapter, REG_RRSR, brate_cfg & 0xff);
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rtw_write8(padapter, REG_RRSR + 1, (brate_cfg >> 8) & 0xff);
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rtw_write8(padapter, REG_RRSR + 2,
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rtw_read8(padapter, REG_RRSR + 2) & 0xf0);
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rtl8723au_read8(padapter, REG_RRSR + 2) & 0xf0);
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rate_index = 0;
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/* Set RTS initial rate */
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@ -365,7 +366,7 @@ int c2h_evt_read23a(struct rtw_adapter *adapter, u8 *buf)
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if (buf == NULL)
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goto exit;
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trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
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trigger = rtl8723au_read8(adapter, REG_C2HEVT_CLEAR);
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if (trigger == C2H_EVT_HOST_CLOSE)
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goto exit; /* Not ready */
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@ -376,8 +377,8 @@ int c2h_evt_read23a(struct rtw_adapter *adapter, u8 *buf)
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memset(c2h_evt, 0, 16);
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*buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
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*(buf + 1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
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*buf = rtl8723au_read8(adapter, REG_C2HEVT_MSG_NORMAL);
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*(buf + 1) = rtl8723au_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
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RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read23a(): ",
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&c2h_evt, sizeof(c2h_evt));
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@ -390,7 +391,7 @@ int c2h_evt_read23a(struct rtw_adapter *adapter, u8 *buf)
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/* Read the content */
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for (i = 0; i < c2h_evt->plen; i++)
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c2h_evt->payload[i] = rtw_read8(adapter,
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c2h_evt->payload[i] = rtl8723au_read8(adapter,
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REG_C2HEVT_MSG_NORMAL +
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sizeof(*c2h_evt) + i);
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@ -441,7 +442,7 @@ rtl8723a_set_ampdu_min_space(struct rtw_adapter *padapter, u8 MinSpacingToSet)
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("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
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padapter->MgntInfo.MinSpaceCfg)); */
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MinSpacingToSet |=
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rtw_read8(padapter, REG_AMPDU_MIN_SPACE) & 0xf8;
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rtl8723au_read8(padapter, REG_AMPDU_MIN_SPACE) & 0xf8;
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rtw_write8(padapter, REG_AMPDU_MIN_SPACE,
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MinSpacingToSet);
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}
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@ -513,7 +514,7 @@ void rtl8723a_set_media_status(struct rtw_adapter *padapter, u8 status)
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{
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||||
u8 val8;
|
||||
|
||||
val8 = rtw_read8(padapter, MSR) & 0x0c;
|
||||
val8 = rtl8723au_read8(padapter, MSR) & 0x0c;
|
||||
val8 |= status;
|
||||
rtw_write8(padapter, MSR, val8);
|
||||
}
|
||||
|
|
@ -522,7 +523,7 @@ void rtl8723a_set_media_status1(struct rtw_adapter *padapter, u8 status)
|
|||
{
|
||||
u8 val8;
|
||||
|
||||
val8 = rtw_read8(padapter, MSR) & 0x03;
|
||||
val8 = rtl8723au_read8(padapter, MSR) & 0x03;
|
||||
val8 |= status << 2;
|
||||
rtw_write8(padapter, MSR, val8);
|
||||
}
|
||||
|
|
@ -538,7 +539,7 @@ void rtl8723a_set_bcn_func(struct rtw_adapter *padapter, u8 val)
|
|||
void rtl8723a_check_bssid(struct rtw_adapter *padapter, u8 val)
|
||||
{
|
||||
u32 val32;
|
||||
val32 = rtw_read32(padapter, REG_RCR);
|
||||
val32 = rtl8723au_read32(padapter, REG_RCR);
|
||||
if (val)
|
||||
val32 |= RCR_CBSSID_DATA | RCR_CBSSID_BCN;
|
||||
else
|
||||
|
|
@ -553,7 +554,7 @@ void rtl8723a_mlme_sitesurvey(struct rtw_adapter *padapter, u8 flag)
|
|||
|
||||
/* config RCR to receive different BSSID & not
|
||||
to receive data frame */
|
||||
v32 = rtw_read32(padapter, REG_RCR);
|
||||
v32 = rtl8723au_read32(padapter, REG_RCR);
|
||||
v32 &= ~(RCR_CBSSID_BCN);
|
||||
rtw_write32(padapter, REG_RCR, v32);
|
||||
/* reject all data frame */
|
||||
|
|
@ -579,7 +580,7 @@ void rtl8723a_mlme_sitesurvey(struct rtw_adapter *padapter, u8 flag)
|
|||
SetBcnCtrlReg23a(padapter, 0, DIS_TSF_UDT);
|
||||
}
|
||||
|
||||
v32 = rtw_read32(padapter, REG_RCR);
|
||||
v32 = rtl8723au_read32(padapter, REG_RCR);
|
||||
v32 |= RCR_CBSSID_BCN;
|
||||
rtw_write32(padapter, REG_RCR, v32);
|
||||
}
|
||||
|
|
@ -591,17 +592,18 @@ void rtl8723a_mlme_sitesurvey(struct rtw_adapter *padapter, u8 flag)
|
|||
|
||||
void rtl8723a_on_rcr_am(struct rtw_adapter *padapter)
|
||||
{
|
||||
rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR) | RCR_AM);
|
||||
rtw_write32(padapter, REG_RCR,
|
||||
rtl8723au_read32(padapter, REG_RCR) | RCR_AM);
|
||||
DBG_8723A("%s, %d, RCR = %x \n", __FUNCTION__, __LINE__,
|
||||
rtw_read32(padapter, REG_RCR));
|
||||
rtl8723au_read32(padapter, REG_RCR));
|
||||
}
|
||||
|
||||
void rtl8723a_off_rcr_am(struct rtw_adapter *padapter)
|
||||
{
|
||||
rtw_write32(padapter, REG_RCR,
|
||||
rtw_read32(padapter, REG_RCR) & (~RCR_AM));
|
||||
rtl8723au_read32(padapter, REG_RCR) & (~RCR_AM));
|
||||
DBG_8723A("%s, %d, RCR = %x \n", __FUNCTION__, __LINE__,
|
||||
rtw_read32(padapter, REG_RCR));
|
||||
rtl8723au_read32(padapter, REG_RCR));
|
||||
}
|
||||
|
||||
void rtl8723a_set_slot_time(struct rtw_adapter *padapter, u8 slottime)
|
||||
|
|
@ -730,17 +732,18 @@ void rtl8723a_fifo_cleanup(struct rtw_adapter *padapter)
|
|||
rtw_write8(padapter, REG_TXPAUSE, 0xff);
|
||||
|
||||
/* keep sn */
|
||||
padapter->xmitpriv.nqos_ssn = rtw_read16(padapter, REG_NQOS_SEQ);
|
||||
padapter->xmitpriv.nqos_ssn = rtl8723au_read16(padapter, REG_NQOS_SEQ);
|
||||
|
||||
if (pwrpriv->bkeepfwalive != true) {
|
||||
u32 v32;
|
||||
|
||||
/* RX DMA stop */
|
||||
v32 = rtw_read32(padapter, REG_RXPKT_NUM);
|
||||
v32 = rtl8723au_read32(padapter, REG_RXPKT_NUM);
|
||||
v32 |= RW_RELEASE_EN;
|
||||
rtw_write32(padapter, REG_RXPKT_NUM, v32);
|
||||
do {
|
||||
v32 = rtw_read32(padapter, REG_RXPKT_NUM) & RXDMA_IDLE;
|
||||
v32 = rtl8723au_read32(padapter,
|
||||
REG_RXPKT_NUM) & RXDMA_IDLE;
|
||||
if (!v32)
|
||||
break;
|
||||
} while (trycnt--);
|
||||
|
|
@ -760,14 +763,14 @@ void rtl8723a_bcn_valid(struct rtw_adapter *padapter)
|
|||
/* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2,
|
||||
write 1 to clear, Clear by sw */
|
||||
rtw_write8(padapter, REG_TDECTRL + 2,
|
||||
rtw_read8(padapter, REG_TDECTRL + 2) | BIT(0));
|
||||
rtl8723au_read8(padapter, REG_TDECTRL + 2) | BIT(0));
|
||||
}
|
||||
|
||||
bool rtl8723a_get_bcn_valid(struct rtw_adapter *padapter)
|
||||
{
|
||||
bool retval;
|
||||
|
||||
retval = (rtw_read8(padapter, REG_TDECTRL + 2) & BIT(0)) ? true : false;
|
||||
retval = (rtl8723au_read8(padapter, REG_TDECTRL + 2) & BIT(0)) ? true : false;
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
|
@ -910,7 +913,7 @@ bool rtl8723a_get_fwlps_rf_on(struct rtw_adapter *padapter)
|
|||
not check Fw LPS Leave, because Fw is unload. */
|
||||
retval = true;
|
||||
} else {
|
||||
valRCR = rtw_read32(padapter, REG_RCR);
|
||||
valRCR = rtl8723au_read32(padapter, REG_RCR);
|
||||
if (valRCR & 0x00070000)
|
||||
retval = false;
|
||||
else
|
||||
|
|
@ -924,7 +927,7 @@ bool rtl8723a_chk_hi_queue_empty(struct rtw_adapter *padapter)
|
|||
{
|
||||
u32 hgq;
|
||||
|
||||
hgq = rtw_read32(padapter, REG_HGQ_INFORMATION);
|
||||
hgq = rtl8723au_read32(padapter, REG_HGQ_INFORMATION);
|
||||
|
||||
return ((hgq & 0x0000ff00) == 0) ? true : false;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
******************************************************************************/
|
||||
|
||||
#include "odm_precomp.h"
|
||||
#include "usb_ops_linux.h"
|
||||
|
||||
static const u16 dB_Invert_Table[8][12] = {
|
||||
{1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4},
|
||||
|
|
@ -1444,7 +1445,8 @@ void odm_DynamicTxPower23aSavePowerIndex(struct dm_odm_t *pDM_Odm)
|
|||
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
|
||||
struct dm_priv *pdmpriv = &pHalData->dmpriv;
|
||||
for (index = 0; index < 6; index++)
|
||||
pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]);
|
||||
pdmpriv->PowerIndex_backup[index] =
|
||||
rtl8723au_read8(Adapter, Power_Index_REG[index]);
|
||||
}
|
||||
|
||||
void odm_DynamicTxPower23aRestorePowerIndex(struct dm_odm_t *pDM_Odm)
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
/* */
|
||||
/* ODM IO Relative API. */
|
||||
/* */
|
||||
#include <usb_ops_linux.h>
|
||||
|
||||
u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm,
|
||||
u32 RegAddr
|
||||
|
|
@ -28,25 +29,21 @@ u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm,
|
|||
{
|
||||
struct rtw_adapter *Adapter = pDM_Odm->Adapter;
|
||||
|
||||
return rtw_read8(Adapter, RegAddr);
|
||||
return rtl8723au_read8(Adapter, RegAddr);
|
||||
}
|
||||
|
||||
u16 ODM_Read2Byte(struct dm_odm_t *pDM_Odm,
|
||||
u32 RegAddr
|
||||
)
|
||||
u16 ODM_Read2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr)
|
||||
{
|
||||
struct rtw_adapter *Adapter = pDM_Odm->Adapter;
|
||||
|
||||
return rtw_read16(Adapter, RegAddr);
|
||||
return rtl8723au_read16(Adapter, RegAddr);
|
||||
}
|
||||
|
||||
u32 ODM_Read4Byte(struct dm_odm_t *pDM_Odm,
|
||||
u32 RegAddr
|
||||
)
|
||||
u32 ODM_Read4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr)
|
||||
{
|
||||
struct rtw_adapter *Adapter = pDM_Odm->Adapter;
|
||||
|
||||
return rtw_read32(Adapter, RegAddr);
|
||||
return rtl8723au_read32(Adapter, RegAddr);
|
||||
}
|
||||
|
||||
void ODM_Write1Byte(
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
#include <drv_types.h>
|
||||
#include <rtl8723a_hal.h>
|
||||
#include <rtw_ioctl_set.h>
|
||||
#include <usb_ops_linux.h>
|
||||
|
||||
#define DIS_PS_RX_BCN
|
||||
|
||||
|
|
@ -5271,7 +5272,7 @@ static void btdm_1AntTSFSwitch(struct rtw_adapter *padapter, u8 enable)
|
|||
{
|
||||
u8 oldVal, newVal;
|
||||
|
||||
oldVal = rtw_read8(padapter, 0x550);
|
||||
oldVal = rtl8723au_read8(padapter, 0x550);
|
||||
|
||||
if (enable)
|
||||
newVal = oldVal | EN_BCN_FUNCTION;
|
||||
|
|
@ -9031,11 +9032,11 @@ static void btdm_BtHwCountersMonitor(struct rtw_adapter *padapter)
|
|||
regHPTxRx = REG_HIGH_PRIORITY_TXRX;
|
||||
regLPTxRx = REG_LOW_PRIORITY_TXRX;
|
||||
|
||||
u4Tmp = rtw_read32(padapter, regHPTxRx);
|
||||
u4Tmp = rtl8723au_read32(padapter, regHPTxRx);
|
||||
regHPTx = u4Tmp & bMaskLWord;
|
||||
regHPRx = (u4Tmp & bMaskHWord)>>16;
|
||||
|
||||
u4Tmp = rtw_read32(padapter, regLPTxRx);
|
||||
u4Tmp = rtl8723au_read32(padapter, regLPTxRx);
|
||||
regLPTx = u4Tmp & bMaskLWord;
|
||||
regLPRx = (u4Tmp & bMaskHWord)>>16;
|
||||
|
||||
|
|
@ -9061,7 +9062,7 @@ static void btdm_BtEnableDisableCheck8723A(struct rtw_adapter *padapter)
|
|||
u8 val8;
|
||||
|
||||
/* ox68[28]= 1 => BT enable; otherwise disable */
|
||||
val8 = rtw_read8(padapter, 0x6B);
|
||||
val8 = rtl8723au_read8(padapter, 0x6B);
|
||||
if (!(val8 & BIT(4)))
|
||||
btAlife = false;
|
||||
|
||||
|
|
@ -9345,7 +9346,7 @@ BTDM_SetSwPenaltyTxRateAdaptive(
|
|||
struct hal_data_8723a *pHalData = GET_HAL_DATA(padapter);
|
||||
u8 tmpU1;
|
||||
|
||||
tmpU1 = rtw_read8(padapter, 0x4fd);
|
||||
tmpU1 = rtl8723au_read8(padapter, 0x4fd);
|
||||
tmpU1 |= BIT(0);
|
||||
if (BT_TX_RATE_ADAPTIVE_LOW_PENALTY == raType) {
|
||||
tmpU1 &= ~BIT(2);
|
||||
|
|
@ -9585,9 +9586,9 @@ static void BTDM_Display8723ABtCoexInfo(struct rtw_adapter *padapter)
|
|||
pBtCoex->btdm2Ant.bCurDecBtPwr);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
}
|
||||
u1Tmp = rtw_read8(padapter, 0x778);
|
||||
u1Tmp1 = rtw_read8(padapter, 0x783);
|
||||
u1Tmp2 = rtw_read8(padapter, 0x796);
|
||||
u1Tmp = rtl8723au_read8(padapter, 0x778);
|
||||
u1Tmp1 = rtl8723au_read8(padapter, 0x783);
|
||||
u1Tmp2 = rtl8723au_read8(padapter, 0x796);
|
||||
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x778/ 0x783/ 0x796", \
|
||||
u1Tmp, u1Tmp1, u1Tmp2);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
|
|
@ -9597,7 +9598,7 @@ static void BTDM_Display8723ABtCoexInfo(struct rtw_adapter *padapter)
|
|||
pBtCoex->btdm2Ant.bCurDacSwingOn, pBtCoex->btdm2Ant.curDacSwingLvl);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
}
|
||||
u4Tmp[0] = rtw_read32(padapter, 0x880);
|
||||
u4Tmp[0] = rtl8723au_read32(padapter, 0x880);
|
||||
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x880", \
|
||||
u4Tmp[0]);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
|
|
@ -9608,56 +9609,56 @@ static void BTDM_Display8723ABtCoexInfo(struct rtw_adapter *padapter)
|
|||
DCMD_Printf(btCoexDbgBuf);
|
||||
}
|
||||
|
||||
u1Tmp = rtw_read8(padapter, 0x40);
|
||||
u1Tmp = rtl8723au_read8(padapter, 0x40);
|
||||
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x40", \
|
||||
u1Tmp);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
|
||||
u4Tmp[0] = rtw_read32(padapter, 0x550);
|
||||
u1Tmp = rtw_read8(padapter, 0x522);
|
||||
u4Tmp[0] = rtl8723au_read32(padapter, 0x550);
|
||||
u1Tmp = rtl8723au_read8(padapter, 0x522);
|
||||
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x", "0x550(bcn contrl)/0x522", \
|
||||
u4Tmp[0], u1Tmp);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
|
||||
u4Tmp[0] = rtw_read32(padapter, 0x484);
|
||||
u4Tmp[0] = rtl8723au_read32(padapter, 0x484);
|
||||
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x484(rate adaptive)", \
|
||||
u4Tmp[0]);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
|
||||
u4Tmp[0] = rtw_read32(padapter, 0x50);
|
||||
u4Tmp[0] = rtl8723au_read32(padapter, 0x50);
|
||||
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \
|
||||
u4Tmp[0]);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
|
||||
u4Tmp[0] = rtw_read32(padapter, 0xda0);
|
||||
u4Tmp[1] = rtw_read32(padapter, 0xda4);
|
||||
u4Tmp[2] = rtw_read32(padapter, 0xda8);
|
||||
u4Tmp[3] = rtw_read32(padapter, 0xdac);
|
||||
u4Tmp[0] = rtl8723au_read32(padapter, 0xda0);
|
||||
u4Tmp[1] = rtl8723au_read32(padapter, 0xda4);
|
||||
u4Tmp[2] = rtl8723au_read32(padapter, 0xda8);
|
||||
u4Tmp[3] = rtl8723au_read32(padapter, 0xdac);
|
||||
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0xda0/0xda4/0xda8/0xdac(FA cnt)", \
|
||||
u4Tmp[0], u4Tmp[1], u4Tmp[2], u4Tmp[3]);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
|
||||
u4Tmp[0] = rtw_read32(padapter, 0x6c0);
|
||||
u4Tmp[1] = rtw_read32(padapter, 0x6c4);
|
||||
u4Tmp[2] = rtw_read32(padapter, 0x6c8);
|
||||
u1Tmp = rtw_read8(padapter, 0x6cc);
|
||||
u4Tmp[0] = rtl8723au_read32(padapter, 0x6c0);
|
||||
u4Tmp[1] = rtl8723au_read32(padapter, 0x6c4);
|
||||
u4Tmp[2] = rtl8723au_read32(padapter, 0x6c8);
|
||||
u1Tmp = rtl8723au_read8(padapter, 0x6cc);
|
||||
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \
|
||||
u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
|
||||
/* u4Tmp = rtw_read32(padapter, 0x770); */
|
||||
/* u4Tmp = rtl8723au_read32(padapter, 0x770); */
|
||||
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "0x770(Hi pri Rx[31:16]/Tx[15:0])", \
|
||||
pHalData->bt_coexist.halCoex8723.highPriorityRx,
|
||||
pHalData->bt_coexist.halCoex8723.highPriorityTx);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
/* u4Tmp = rtw_read32(padapter, 0x774); */
|
||||
/* u4Tmp = rtl8723au_read32(padapter, 0x774); */
|
||||
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "0x774(Lo pri Rx[31:16]/Tx[15:0])", \
|
||||
pHalData->bt_coexist.halCoex8723.lowPriorityRx,
|
||||
pHalData->bt_coexist.halCoex8723.lowPriorityTx);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
|
||||
/* Tx mgnt queue hang or not, 0x41b should = 0xf, ex: 0xd ==>hang */
|
||||
u1Tmp = rtw_read8(padapter, 0x41b);
|
||||
u1Tmp = rtl8723au_read8(padapter, 0x41b);
|
||||
rsprintf(btCoexDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x41b (hang chk == 0xf)", \
|
||||
u1Tmp);
|
||||
DCMD_Printf(btCoexDbgBuf);
|
||||
|
|
@ -9941,15 +9942,15 @@ void BTDM_CheckBTIdleChange1Ant(struct rtw_adapter *padapter)
|
|||
else
|
||||
regBTPolling = REG_BT_POLLING;
|
||||
|
||||
BT_Active = rtw_read32(padapter, regBTActive);
|
||||
BT_Active = rtl8723au_read32(padapter, regBTActive);
|
||||
RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_Active(0x%x) =%x\n", regBTActive, BT_Active));
|
||||
BT_Active = BT_Active & 0x00ffffff;
|
||||
|
||||
BT_State = rtw_read32(padapter, regBTState);
|
||||
BT_State = rtl8723au_read32(padapter, regBTState);
|
||||
RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_State(0x%x) =%x\n", regBTState, BT_State));
|
||||
BT_State = BT_State & 0x00ffffff;
|
||||
|
||||
BT_Polling = rtw_read32(padapter, regBTPolling);
|
||||
BT_Polling = rtl8723au_read32(padapter, regBTPolling);
|
||||
RTPRINT(FBT, BT_TRACE, ("[DM][BT], BT_Polling(0x%x) =%x\n", regBTPolling, BT_Polling));
|
||||
|
||||
if (BT_Active == 0xffffffff && BT_State == 0xffffffff && BT_Polling == 0xffffffff)
|
||||
|
|
@ -10585,7 +10586,7 @@ u8 BTDM_DisableEDCATurbo(struct rtw_adapter *padapter)
|
|||
pHalData->odmpriv.DM_EDCA_Table.bCurrentTurboEDCA = false;
|
||||
pHalData->dmpriv.prv_traffic_idx = 3;
|
||||
}
|
||||
cur_EDCA_reg = rtw_read32(padapter, REG_EDCA_BE_PARAM);
|
||||
cur_EDCA_reg = rtl8723au_read32(padapter, REG_EDCA_BE_PARAM);
|
||||
|
||||
if (cur_EDCA_reg != EDCA_BT_BE)
|
||||
bBtChangeEDCA = true;
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@
|
|||
#include <mlme_osdep.h>
|
||||
#include <rtw_ioctl_set.h>
|
||||
#include <rtl8723a_hal.h>
|
||||
#include <usb_ops_linux.h>
|
||||
|
||||
#define RTL92C_MAX_H2C_BOX_NUMS 4
|
||||
#define RTL92C_MAX_CMD_LEN 5
|
||||
|
|
@ -33,7 +34,7 @@ static u8 _is_fw_read_cmd_down(struct rtw_adapter *padapter, u8 msgbox_num)
|
|||
u8 valid;
|
||||
|
||||
do {
|
||||
valid = rtw_read8(padapter, REG_HMETFR) & BIT(msgbox_num);
|
||||
valid = rtl8723au_read8(padapter, REG_HMETFR) & BIT(msgbox_num);
|
||||
if (0 == valid)
|
||||
read_down = true;
|
||||
} while ((!read_down) && (retry_cnts--));
|
||||
|
|
@ -610,7 +611,7 @@ void rtl8723a_set_FwJoinBssReport_cmd(struct rtw_adapter *padapter, u8 mstatus)
|
|||
/* rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); */
|
||||
|
||||
/* set REG_CR bit 8 */
|
||||
v8 = rtw_read8(padapter, REG_CR+1);
|
||||
v8 = rtl8723au_read8(padapter, REG_CR+1);
|
||||
v8 |= BIT(0); /* ENSWBCN */
|
||||
rtw_write8(padapter, REG_CR+1, v8);
|
||||
|
||||
|
|
@ -626,7 +627,7 @@ void rtl8723a_set_FwJoinBssReport_cmd(struct rtw_adapter *padapter, u8 mstatus)
|
|||
bRecover = true;
|
||||
|
||||
/* To tell Hw the packet is not a real beacon frame. */
|
||||
/* U1bTmp = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2); */
|
||||
/* U1bTmp = rtl8723au_read8(padapter, REG_FWHW_TXQ_CTRL+2); */
|
||||
rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl & ~BIT(6));
|
||||
pHalData->RegFwHwTxQCtrl &= ~BIT(6);
|
||||
SetFwRsvdPagePkt(padapter, 0);
|
||||
|
|
@ -645,7 +646,7 @@ void rtl8723a_set_FwJoinBssReport_cmd(struct rtw_adapter *padapter, u8 mstatus)
|
|||
}
|
||||
|
||||
/* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
|
||||
v8 = rtw_read8(padapter, REG_CR+1);
|
||||
v8 = rtl8723au_read8(padapter, REG_CR+1);
|
||||
v8 &= ~BIT(0); /* ~ENSWBCN */
|
||||
rtw_write8(padapter, REG_CR+1, v8);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@
|
|||
#include <drv_types.h>
|
||||
|
||||
#include <rtl8723a_hal.h>
|
||||
#include <usb_ops_linux.h>
|
||||
|
||||
/* */
|
||||
/* Global var */
|
||||
|
|
@ -45,18 +46,18 @@ static void dm_CheckPbcGPIO(struct rtw_adapter *padapter)
|
|||
if (!padapter->registrypriv.hw_wps_pbc)
|
||||
return;
|
||||
|
||||
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
|
||||
tmp1byte = rtl8723au_read8(padapter, GPIO_IO_SEL);
|
||||
tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT);
|
||||
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */
|
||||
|
||||
tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
|
||||
rtw_write8(padapter, GPIO_IN, tmp1byte); /* reset the floating voltage level */
|
||||
|
||||
tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
|
||||
tmp1byte = rtl8723au_read8(padapter, GPIO_IO_SEL);
|
||||
tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
|
||||
rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as input mode */
|
||||
|
||||
tmp1byte = rtw_read8(padapter, GPIO_IN);
|
||||
tmp1byte = rtl8723au_read8(padapter, GPIO_IN);
|
||||
|
||||
if (tmp1byte == 0xff)
|
||||
return;
|
||||
|
|
@ -197,7 +198,7 @@ void rtl8723a_InitHalDm(struct rtw_adapter *Adapter)
|
|||
ODM23a_DMInit(pDM_Odm);
|
||||
/* Save REG_INIDATA_RATE_SEL value for TXDESC. */
|
||||
for (i = 0; i < 32; i++)
|
||||
pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f;
|
||||
pdmpriv->INIDATA_RATE[i] = rtl8723au_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f;
|
||||
}
|
||||
|
||||
void
|
||||
|
|
@ -225,11 +226,11 @@ rtl8723a_HalDmWatchDog(
|
|||
|
||||
/* Read REG_INIDATA_RATE_SEL value for TXDESC. */
|
||||
if (check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE)) {
|
||||
pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f;
|
||||
pdmpriv->INIDATA_RATE[0] = rtl8723au_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f;
|
||||
} else {
|
||||
u8 i;
|
||||
for (i = 1 ; i < (Adapter->stapriv.asoc_sta_count + 1); i++)
|
||||
pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f;
|
||||
pdmpriv->INIDATA_RATE[i] = rtl8723au_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@
|
|||
#include <rtw_efuse.h>
|
||||
|
||||
#include <rtl8723a_hal.h>
|
||||
#include <usb_ops_linux.h>
|
||||
|
||||
static void _FWDownloadEnable(struct rtw_adapter *padapter, bool enable)
|
||||
{
|
||||
|
|
@ -26,19 +27,19 @@ static void _FWDownloadEnable(struct rtw_adapter *padapter, bool enable)
|
|||
|
||||
if (enable) {
|
||||
/* 8051 enable */
|
||||
tmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
|
||||
tmp = rtl8723au_read8(padapter, REG_SYS_FUNC_EN + 1);
|
||||
rtw_write8(padapter, REG_SYS_FUNC_EN + 1, tmp | 0x04);
|
||||
|
||||
/* MCU firmware download enable. */
|
||||
tmp = rtw_read8(padapter, REG_MCUFWDL);
|
||||
tmp = rtl8723au_read8(padapter, REG_MCUFWDL);
|
||||
rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01);
|
||||
|
||||
/* 8051 reset */
|
||||
tmp = rtw_read8(padapter, REG_MCUFWDL + 2);
|
||||
tmp = rtl8723au_read8(padapter, REG_MCUFWDL + 2);
|
||||
rtw_write8(padapter, REG_MCUFWDL + 2, tmp & 0xf7);
|
||||
} else {
|
||||
/* MCU firmware download disable. */
|
||||
tmp = rtw_read8(padapter, REG_MCUFWDL);
|
||||
tmp = rtl8723au_read8(padapter, REG_MCUFWDL);
|
||||
rtw_write8(padapter, REG_MCUFWDL, tmp & 0xfe);
|
||||
|
||||
/* Reserved for fw extension. */
|
||||
|
|
@ -142,7 +143,7 @@ _PageWrite(struct rtw_adapter *padapter, u32 page, void *buffer, u32 size)
|
|||
u8 value8;
|
||||
u8 u8Page = (u8) (page & 0x07);
|
||||
|
||||
value8 = (rtw_read8(padapter, REG_MCUFWDL + 2) & 0xF8) | u8Page;
|
||||
value8 = (rtl8723au_read8(padapter, REG_MCUFWDL + 2) & 0xF8) | u8Page;
|
||||
rtw_write8(padapter, REG_MCUFWDL + 2, value8);
|
||||
|
||||
return _BlockWrite(padapter, buffer, size);
|
||||
|
|
@ -194,7 +195,7 @@ static int _FWFreeToGo(struct rtw_adapter *padapter)
|
|||
|
||||
/* polling CheckSum report */
|
||||
do {
|
||||
value32 = rtw_read32(padapter, REG_MCUFWDL);
|
||||
value32 = rtl8723au_read32(padapter, REG_MCUFWDL);
|
||||
if (value32 & FWDL_ChkSum_rpt)
|
||||
break;
|
||||
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
|
||||
|
|
@ -209,7 +210,7 @@ static int _FWFreeToGo(struct rtw_adapter *padapter)
|
|||
("%s: Checksum report OK! REG_MCUFWDL:0x%08x\n", __func__,
|
||||
value32));
|
||||
|
||||
value32 = rtw_read32(padapter, REG_MCUFWDL);
|
||||
value32 = rtl8723au_read32(padapter, REG_MCUFWDL);
|
||||
value32 |= MCUFWDL_RDY;
|
||||
value32 &= ~WINTINI_RDY;
|
||||
rtw_write32(padapter, REG_MCUFWDL, value32);
|
||||
|
|
@ -217,7 +218,7 @@ static int _FWFreeToGo(struct rtw_adapter *padapter)
|
|||
/* polling for FW ready */
|
||||
counter = 0;
|
||||
do {
|
||||
value32 = rtw_read32(padapter, REG_MCUFWDL);
|
||||
value32 = rtl8723au_read32(padapter, REG_MCUFWDL);
|
||||
if (value32 & WINTINI_RDY) {
|
||||
RT_TRACE(_module_hal_init_c_, _drv_info_,
|
||||
("%s: Polling FW ready success!! "
|
||||
|
|
@ -250,13 +251,13 @@ void rtl8723a_FirmwareSelfReset(struct rtw_adapter *padapter)
|
|||
/* 0x1cf = 0x20. Inform 8051 to reset. 2009.12.25. tynli_test */
|
||||
rtw_write8(padapter, REG_HMETFR + 3, 0x20);
|
||||
|
||||
u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
|
||||
u1bTmp = rtl8723au_read8(padapter, REG_SYS_FUNC_EN + 1);
|
||||
while (u1bTmp & BIT(2)) {
|
||||
Delay--;
|
||||
if (Delay == 0)
|
||||
break;
|
||||
udelay(50);
|
||||
u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
|
||||
u1bTmp = rtl8723au_read8(padapter, REG_SYS_FUNC_EN + 1);
|
||||
}
|
||||
RT_TRACE(_module_hal_init_c_, _drv_info_,
|
||||
("-%s: 8051 reset success (%d)\n", __func__,
|
||||
|
|
@ -264,7 +265,7 @@ void rtl8723a_FirmwareSelfReset(struct rtw_adapter *padapter)
|
|||
|
||||
if ((Delay == 0)) {
|
||||
/* force firmware reset */
|
||||
u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
|
||||
u1bTmp = rtl8723au_read8(padapter, REG_SYS_FUNC_EN + 1);
|
||||
rtw_write8(padapter, REG_SYS_FUNC_EN + 1,
|
||||
u1bTmp & ~BIT(2));
|
||||
}
|
||||
|
|
@ -372,7 +373,7 @@ int rtl8723a_FirmwareDownload(struct rtw_adapter *padapter)
|
|||
/* Suggested by Filen. If 8051 is running in RAM code, driver should
|
||||
inform Fw to reset by itself, */
|
||||
/* or it will cause download Fw fail. 2010.02.01. by tynli. */
|
||||
if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) {
|
||||
if (rtl8723au_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) {
|
||||
/* 8051 RAM code */
|
||||
rtl8723a_FirmwareSelfReset(padapter);
|
||||
rtw_write8(padapter, REG_MCUFWDL, 0x00);
|
||||
|
|
@ -383,7 +384,7 @@ int rtl8723a_FirmwareDownload(struct rtw_adapter *padapter)
|
|||
while (1) {
|
||||
/* reset the FWDL chksum */
|
||||
rtw_write8(padapter, REG_MCUFWDL,
|
||||
rtw_read8(padapter, REG_MCUFWDL) | FWDL_ChkSum_rpt);
|
||||
rtl8723au_read8(padapter, REG_MCUFWDL) | FWDL_ChkSum_rpt);
|
||||
|
||||
rtStatus = _WriteFW(padapter, buf, fw_size);
|
||||
|
||||
|
|
@ -437,7 +438,7 @@ hal_EfuseSwitchToBank(struct rtw_adapter *padapter, u8 bank)
|
|||
u32 value32 = 0;
|
||||
|
||||
DBG_8723A("%s: Efuse switch bank to %d\n", __func__, bank);
|
||||
value32 = rtw_read32(padapter, EFUSE_TEST);
|
||||
value32 = rtl8723au_read32(padapter, EFUSE_TEST);
|
||||
bRet = true;
|
||||
switch (bank) {
|
||||
case 0:
|
||||
|
|
@ -905,7 +906,7 @@ void rtl8723a_read_chip_version(struct rtw_adapter *padapter)
|
|||
|
||||
pHalData = GET_HAL_DATA(padapter);
|
||||
|
||||
value32 = rtw_read32(padapter, REG_SYS_CFG);
|
||||
value32 = rtl8723au_read32(padapter, REG_SYS_CFG);
|
||||
ChipVersion.ICType = CHIP_8723A;
|
||||
ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
|
||||
ChipVersion.RFType = RF_TYPE_1T1R;
|
||||
|
|
@ -917,13 +918,13 @@ void rtl8723a_read_chip_version(struct rtw_adapter *padapter)
|
|||
pHalData->RegulatorMode = ((value32 & SPS_SEL) ?
|
||||
RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
|
||||
|
||||
value32 = rtw_read32(padapter, REG_GPIO_OUTSTS);
|
||||
value32 = rtl8723au_read32(padapter, REG_GPIO_OUTSTS);
|
||||
/* ROM code version. */
|
||||
ChipVersion.ROMVer = ((value32 & RF_RL_ID) >> 20);
|
||||
|
||||
/* For multi-function consideration. Added by Roger, 2010.10.06. */
|
||||
pHalData->MultiFunc = RT_MULTI_FUNC_NONE;
|
||||
value32 = rtw_read32(padapter, REG_MULTI_FUNC_CTRL);
|
||||
value32 = rtl8723au_read32(padapter, REG_MULTI_FUNC_CTRL);
|
||||
pHalData->MultiFunc |=
|
||||
((value32 & WL_FUNC_EN) ? RT_MULTI_FUNC_WIFI : 0);
|
||||
pHalData->MultiFunc |= ((value32 & BT_FUNC_EN) ? RT_MULTI_FUNC_BT : 0);
|
||||
|
|
@ -967,7 +968,7 @@ void SetBcnCtrlReg23a(struct rtw_adapter *padapter, u8 SetBits, u8 ClearBits)
|
|||
|
||||
addr = REG_BCN_CTRL;
|
||||
|
||||
*pRegBcnCtrlVal = rtw_read8(padapter, addr);
|
||||
*pRegBcnCtrlVal = rtl8723au_read8(padapter, addr);
|
||||
*pRegBcnCtrlVal |= SetBits;
|
||||
*pRegBcnCtrlVal &= ~ClearBits;
|
||||
|
||||
|
|
@ -1075,7 +1076,7 @@ void rtl8723a_SetBeaconRelatedRegisters(struct rtw_adapter *padapter)
|
|||
/* */
|
||||
/* Reset TSF Timer to zero, added by Roger. 2008.06.24 */
|
||||
/* */
|
||||
value32 = rtw_read32(padapter, REG_TCR);
|
||||
value32 = rtl8723au_read32(padapter, REG_TCR);
|
||||
value32 &= ~TSFRST;
|
||||
rtw_write32(padapter, REG_TCR, value32);
|
||||
|
||||
|
|
@ -1135,11 +1136,11 @@ void rtl8723a_notch_filter(struct rtw_adapter *adapter, bool enable)
|
|||
if (enable) {
|
||||
DBG_8723A("Enable notch filter\n");
|
||||
rtw_write8(adapter, rOFDM0_RxDSP + 1,
|
||||
rtw_read8(adapter, rOFDM0_RxDSP + 1) | BIT(1));
|
||||
rtl8723au_read8(adapter, rOFDM0_RxDSP + 1) | BIT(1));
|
||||
} else {
|
||||
DBG_8723A("Disable notch filter\n");
|
||||
rtw_write8(adapter, rOFDM0_RxDSP + 1,
|
||||
rtw_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT(1));
|
||||
rtl8723au_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT(1));
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1214,7 +1215,7 @@ void rtl8723a_InitAntenna_Selection(struct rtw_adapter *padapter)
|
|||
{
|
||||
u8 val;
|
||||
|
||||
val = rtw_read8(padapter, REG_LEDCFG2);
|
||||
val = rtl8723au_read8(padapter, REG_LEDCFG2);
|
||||
/* Let 8051 take control antenna settting */
|
||||
val |= BIT(7); /* DPDT_SEL_EN, 0x4C[23] */
|
||||
rtw_write8(padapter, REG_LEDCFG2, val);
|
||||
|
|
@ -1224,7 +1225,7 @@ void rtl8723a_CheckAntenna_Selection(struct rtw_adapter *padapter)
|
|||
{
|
||||
u8 val;
|
||||
|
||||
val = rtw_read8(padapter, REG_LEDCFG2);
|
||||
val = rtl8723au_read8(padapter, REG_LEDCFG2);
|
||||
/* Let 8051 take control antenna settting */
|
||||
if (!(val & BIT(7))) {
|
||||
val |= BIT(7); /* DPDT_SEL_EN, 0x4C[23] */
|
||||
|
|
@ -1236,7 +1237,7 @@ void rtl8723a_DeinitAntenna_Selection(struct rtw_adapter *padapter)
|
|||
{
|
||||
u8 val;
|
||||
|
||||
val = rtw_read8(padapter, REG_LEDCFG2);
|
||||
val = rtl8723au_read8(padapter, REG_LEDCFG2);
|
||||
/* Let 8051 take control antenna settting */
|
||||
val &= ~BIT(7); /* DPDT_SEL_EN, clear 0x4C[23] */
|
||||
rtw_write8(padapter, REG_LEDCFG2, val);
|
||||
|
|
@ -1279,7 +1280,7 @@ u8 GetEEPROMSize8723A(struct rtw_adapter *padapter)
|
|||
u8 size = 0;
|
||||
u32 cr;
|
||||
|
||||
cr = rtw_read16(padapter, REG_9346CR);
|
||||
cr = rtl8723au_read16(padapter, REG_9346CR);
|
||||
/* 6: EEPROM used is 93C46, 4: boot from E-Fuse. */
|
||||
size = (cr & BOOT_FROM_EEPROM) ? 6 : 4;
|
||||
|
||||
|
|
@ -1305,7 +1306,7 @@ static int _LLTWrite(struct rtw_adapter *padapter, u32 address, u32 data)
|
|||
|
||||
/* polling */
|
||||
do {
|
||||
value = rtw_read32(padapter, LLTReg);
|
||||
value = rtl8723au_read32(padapter, LLTReg);
|
||||
if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) {
|
||||
break;
|
||||
}
|
||||
|
|
@ -1376,7 +1377,7 @@ n. LEDCFG 0x4C[15:0] = 0x8080
|
|||
|
||||
/* 1. Disable GPIO[7:0] */
|
||||
rtw_write16(padapter, REG_GPIO_PIN_CTRL + 2, 0x0000);
|
||||
value32 = rtw_read32(padapter, REG_GPIO_PIN_CTRL) & 0xFFFF00FF;
|
||||
value32 = rtl8723au_read32(padapter, REG_GPIO_PIN_CTRL) & 0xFFFF00FF;
|
||||
u4bTmp = value32 & 0x000000FF;
|
||||
value32 |= ((u4bTmp << 8) | 0x00FF0000);
|
||||
rtw_write32(padapter, REG_GPIO_PIN_CTRL, value32);
|
||||
|
|
@ -1391,7 +1392,7 @@ n. LEDCFG 0x4C[15:0] = 0x8080
|
|||
|
||||
/* Configure all pins as input mode. */
|
||||
rtw_write16(padapter, REG_GPIO_IO_SEL_2, 0x0000);
|
||||
value32 = rtw_read32(padapter, REG_GPIO_PIN_CTRL_2) & 0xFFFF001F;
|
||||
value32 = rtl8723au_read32(padapter, REG_GPIO_PIN_CTRL_2) & 0xFFFF001F;
|
||||
u4bTmp = value32 & 0x0000001F;
|
||||
/* Set pin 8, 10, 11 and pin 12 to output mode. */
|
||||
value32 |= ((u4bTmp << 8) | 0x001D0000);
|
||||
|
|
@ -1455,15 +1456,15 @@ static void _ResetDigitalProcedure1_92C(struct rtw_adapter *padapter,
|
|||
u16 valu16 = 0;
|
||||
rtw_write8(padapter, REG_MCUFWDL, 0);
|
||||
|
||||
valu16 = rtw_read16(padapter, REG_SYS_FUNC_EN);
|
||||
valu16 = rtl8723au_read16(padapter, REG_SYS_FUNC_EN);
|
||||
/* reset MCU , 8051 */
|
||||
rtw_write16(padapter, REG_SYS_FUNC_EN, (valu16 & (~FEN_CPUEN)));
|
||||
|
||||
valu16 = rtw_read16(padapter, REG_SYS_FUNC_EN) & 0x0FFF;
|
||||
valu16 = rtl8723au_read16(padapter, REG_SYS_FUNC_EN) & 0x0FFF;
|
||||
rtw_write16(padapter, REG_SYS_FUNC_EN,
|
||||
(valu16 | (FEN_HWPDN | FEN_ELDR))); /* reset MAC */
|
||||
|
||||
valu16 = rtw_read16(padapter, REG_SYS_FUNC_EN);
|
||||
valu16 = rtl8723au_read16(padapter, REG_SYS_FUNC_EN);
|
||||
/* enable MCU , 8051 */
|
||||
rtw_write16(padapter, REG_SYS_FUNC_EN, (valu16 | FEN_CPUEN));
|
||||
} else {
|
||||
|
|
@ -1474,7 +1475,7 @@ static void _ResetDigitalProcedure1_92C(struct rtw_adapter *padapter,
|
|||
S3/S4/S5/Disable, we can stop 8051 because */
|
||||
/* we will init FW when power on again. */
|
||||
/* If we want to SS mode, we can not reset 8051. */
|
||||
if (rtw_read8(padapter, REG_MCUFWDL) & BIT(1)) {
|
||||
if (rtl8723au_read8(padapter, REG_MCUFWDL) & BIT(1)) {
|
||||
/* IF fw in RAM code, do reset */
|
||||
if (padapter->bFWReady) {
|
||||
/* 2010/08/25 MH Accordign to RD alfred's
|
||||
|
|
@ -1492,7 +1493,8 @@ static void _ResetDigitalProcedure1_92C(struct rtw_adapter *padapter,
|
|||
|
||||
while ((retry_cnts++ < 100) &&
|
||||
(FEN_CPUEN &
|
||||
rtw_read16(padapter, REG_SYS_FUNC_EN))) {
|
||||
rtl8723au_read16(padapter,
|
||||
REG_SYS_FUNC_EN))) {
|
||||
udelay(50); /* us */
|
||||
}
|
||||
|
||||
|
|
@ -1564,7 +1566,7 @@ static void _DisableAnalog(struct rtw_adapter *padapter, bool bWithoutHWSM)
|
|||
rtw_write8(padapter, REG_LDOA15_CTRL, 0x04);
|
||||
/* rtw_write8(padapter, REG_LDOV12D_CTRL, 0x54); */
|
||||
|
||||
value8 = rtw_read8(padapter, REG_LDOV12D_CTRL);
|
||||
value8 = rtl8723au_read8(padapter, REG_LDOV12D_CTRL);
|
||||
value8 &= (~LDV12_EN);
|
||||
rtw_write8(padapter, REG_LDOV12D_CTRL, value8);
|
||||
/* RT_TRACE(COMP_INIT, DBG_LOUD,
|
||||
|
|
@ -1909,7 +1911,7 @@ Hal_EfuseParseBTCoexistInfo_8723A(struct rtw_adapter *padapter,
|
|||
u32 tmpu4;
|
||||
|
||||
if (!AutoLoadFail) {
|
||||
tmpu4 = rtw_read32(padapter, REG_MULTI_FUNC_CTRL);
|
||||
tmpu4 = rtl8723au_read32(padapter, REG_MULTI_FUNC_CTRL);
|
||||
if (tmpu4 & BT_FUNC_EN)
|
||||
pHalData->EEPROMBluetoothCoexist = 1;
|
||||
else
|
||||
|
|
@ -2422,7 +2424,7 @@ void hw_var_set_opmode(struct rtw_adapter *padapter, u8 mode)
|
|||
SetBcnCtrlReg23a(padapter, val8, ~val8);
|
||||
}
|
||||
|
||||
val8 = rtw_read8(padapter, MSR);
|
||||
val8 = rtl8723au_read8(padapter, MSR);
|
||||
val8 = (val8 & 0xC) | mode;
|
||||
rtw_write8(padapter, MSR, val8);
|
||||
}
|
||||
|
|
@ -2466,7 +2468,7 @@ void hw_var_set_correct_tsf(struct rtw_adapter *padapter)
|
|||
((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) {
|
||||
/* pHalData->RegTxPause |= STOP_BCNQ;BIT(6) */
|
||||
/* rtw_write8(padapter, REG_TXPAUSE,
|
||||
(rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); */
|
||||
(rtl8723au_read8(Adapter, REG_TXPAUSE)|BIT(6))); */
|
||||
StopTxBeacon(padapter);
|
||||
}
|
||||
|
||||
|
|
@ -2510,10 +2512,10 @@ void hw_var_set_mlme_join(struct rtw_adapter *padapter, u8 type)
|
|||
|
||||
/* enable to rx data frame.Accept all data frame */
|
||||
/* rtw_write32(padapter, REG_RCR,
|
||||
rtw_read32(padapter, REG_RCR)|RCR_ADF); */
|
||||
rtl8723au_read32(padapter, REG_RCR)|RCR_ADF); */
|
||||
rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF);
|
||||
|
||||
v32 = rtw_read32(padapter, REG_RCR);
|
||||
v32 = rtl8723au_read32(padapter, REG_RCR);
|
||||
v32 |= RCR_CBSSID_DATA | RCR_CBSSID_BCN;
|
||||
rtw_write32(padapter, REG_RCR, v32);
|
||||
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
#include <drv_types.h>
|
||||
|
||||
#include <rtl8723a_hal.h>
|
||||
#include <usb_ops_linux.h>
|
||||
|
||||
/*---------------------------Define Local Constant---------------------------*/
|
||||
/* Channel switch:The size of command tables for switch channel*/
|
||||
|
|
@ -87,7 +88,7 @@ PHY_QueryBBReg(struct rtw_adapter *Adapter, u32 RegAddr, u32 BitMask)
|
|||
{
|
||||
u32 ReturnValue = 0, OriginalValue, BitShift;
|
||||
|
||||
OriginalValue = rtw_read32(Adapter, RegAddr);
|
||||
OriginalValue = rtl8723au_read32(Adapter, RegAddr);
|
||||
BitShift = phy_CalculateBitShift(BitMask);
|
||||
ReturnValue = (OriginalValue & BitMask) >> BitShift;
|
||||
return ReturnValue;
|
||||
|
|
@ -123,7 +124,7 @@ PHY_SetBBReg(struct rtw_adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data)
|
|||
/* RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); */
|
||||
|
||||
if (BitMask != bMaskDWord) {/* if not "double word" write */
|
||||
OriginalValue = rtw_read32(Adapter, RegAddr);
|
||||
OriginalValue = rtl8723au_read32(Adapter, RegAddr);
|
||||
BitShift = phy_CalculateBitShift(BitMask);
|
||||
Data = ((OriginalValue & (~BitMask)) | (Data << BitShift));
|
||||
}
|
||||
|
|
@ -804,7 +805,7 @@ PHY_BBConfig8723A(struct rtw_adapter *Adapter)
|
|||
|
||||
/* Suggested by Scott. tynli_test. 2010.12.30. */
|
||||
/* 1. 0x28[1] = 1 */
|
||||
TmpU1B = rtw_read8(Adapter, REG_AFE_PLL_CTRL);
|
||||
TmpU1B = rtl8723au_read8(Adapter, REG_AFE_PLL_CTRL);
|
||||
udelay(2);
|
||||
rtw_write8(Adapter, REG_AFE_PLL_CTRL, TmpU1B | BIT(1));
|
||||
udelay(2);
|
||||
|
|
@ -814,16 +815,16 @@ PHY_BBConfig8723A(struct rtw_adapter *Adapter)
|
|||
udelay(2);
|
||||
|
||||
/* 3. 0x02[1:0] = 2b'11 */
|
||||
TmpU1B = rtw_read8(Adapter, REG_SYS_FUNC_EN);
|
||||
TmpU1B = rtl8723au_read8(Adapter, REG_SYS_FUNC_EN);
|
||||
rtw_write8(Adapter, REG_SYS_FUNC_EN,
|
||||
(TmpU1B | FEN_BB_GLB_RSTn | FEN_BBRSTB));
|
||||
|
||||
/* 4. 0x25[6] = 0 */
|
||||
TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL + 1);
|
||||
TmpU1B = rtl8723au_read8(Adapter, REG_AFE_XTAL_CTRL + 1);
|
||||
rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, TmpU1B & ~BIT(6));
|
||||
|
||||
/* 5. 0x24[20] = 0 Advised by SD3 Alex Wang. 2011.02.09. */
|
||||
TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+2);
|
||||
TmpU1B = rtl8723au_read8(Adapter, REG_AFE_XTAL_CTRL+2);
|
||||
rtw_write8(Adapter, REG_AFE_XTAL_CTRL+2, TmpU1B & ~BIT(4));
|
||||
|
||||
/* 6. 0x1f[7:0] = 0x07 */
|
||||
|
|
@ -956,8 +957,8 @@ _PHY_SetBWMode23a92C(struct rtw_adapter *Adapter)
|
|||
/* 3<1>Set MAC register */
|
||||
/* 3 */
|
||||
|
||||
regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE);
|
||||
regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2);
|
||||
regBwOpMode = rtl8723au_read8(Adapter, REG_BWOPMODE);
|
||||
regRRSR_RSC = rtl8723au_read8(Adapter, REG_RRSR+2);
|
||||
|
||||
switch (pHalData->CurrentChannelBW) {
|
||||
case HT_CHANNEL_WIDTH_20:
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@
|
|||
|
||||
#include <rtl8723a_sreset.h>
|
||||
#include <rtl8723a_hal.h>
|
||||
#include <usb_ops_linux.h>
|
||||
|
||||
void rtl8723a_sreset_xmit_status_check(struct rtw_adapter *padapter)
|
||||
{
|
||||
|
|
@ -27,7 +28,7 @@ void rtl8723a_sreset_xmit_status_check(struct rtw_adapter *padapter)
|
|||
unsigned int diff_time;
|
||||
u32 txdma_status;
|
||||
|
||||
txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS);
|
||||
txdma_status = rtl8723au_read32(padapter, REG_TXDMA_STATUS);
|
||||
if (txdma_status != 0) {
|
||||
DBG_8723A("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status);
|
||||
rtw_sreset_reset(padapter);
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@
|
|||
#include "drv_types.h"
|
||||
#include "rtl8723a_hal.h"
|
||||
#include "rtl8723a_led.h"
|
||||
#include "usb_ops_linux.h"
|
||||
|
||||
/* */
|
||||
/* LED object. */
|
||||
|
|
@ -49,7 +50,7 @@ void SwLedOn23a(struct rtw_adapter *padapter, struct led_8723a *pLed)
|
|||
rtw_write8(padapter, REG_LEDCFG1, (LedCfg&0x00)|BIT(6));
|
||||
break;
|
||||
case LED_PIN_LED2:
|
||||
LedCfg = rtw_read8(padapter, REG_LEDCFG2);
|
||||
LedCfg = rtl8723au_read8(padapter, REG_LEDCFG2);
|
||||
/* SW control led1 on. */
|
||||
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x80)|BIT(5));
|
||||
break;
|
||||
|
|
@ -81,7 +82,7 @@ void SwLedOff23a(struct rtw_adapter *padapter, struct led_8723a *pLed)
|
|||
rtw_write8(padapter, REG_LEDCFG1, (LedCfg&0x00)|BIT(5)|BIT(6));
|
||||
break;
|
||||
case LED_PIN_LED2:
|
||||
LedCfg = rtw_read8(padapter, REG_LEDCFG2);
|
||||
LedCfg = rtl8723au_read8(padapter, REG_LEDCFG2);
|
||||
/* SW control led1 on. */
|
||||
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x80)|BIT(3)|BIT(5));
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ _ConfigChipOutEP(struct rtw_adapter *pAdapter, u8 NumOutPipe)
|
|||
pHalData->OutEpNumber = 0;
|
||||
|
||||
/* Normal and High queue */
|
||||
value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 1));
|
||||
value8 = rtl8723au_read8(pAdapter, (REG_NORMAL_SIE_EP + 1));
|
||||
|
||||
if (value8 & USB_NORMAL_SIE_EP_MASK) {
|
||||
pHalData->OutEpQueueSel |= TX_SELE_HQ;
|
||||
|
|
@ -49,7 +49,7 @@ _ConfigChipOutEP(struct rtw_adapter *pAdapter, u8 NumOutPipe)
|
|||
}
|
||||
|
||||
/* Low queue */
|
||||
value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 2));
|
||||
value8 = rtl8723au_read8(pAdapter, (REG_NORMAL_SIE_EP + 2));
|
||||
if (value8 & USB_NORMAL_SIE_EP_MASK) {
|
||||
pHalData->OutEpQueueSel |= TX_SELE_LQ;
|
||||
pHalData->OutEpNumber++;
|
||||
|
|
@ -108,13 +108,13 @@ static int _InitPowerOn(struct rtw_adapter *padapter)
|
|||
return _FAIL;
|
||||
|
||||
/* 0x04[19] = 1, suggest by Jackie 2011.05.09, reset 8051 */
|
||||
value8 = rtw_read8(padapter, REG_APS_FSMCO+2);
|
||||
value8 = rtl8723au_read8(padapter, REG_APS_FSMCO+2);
|
||||
rtw_write8(padapter, REG_APS_FSMCO + 2, value8 | BIT(3));
|
||||
|
||||
/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
|
||||
/* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy.
|
||||
Added by tynli. 2011.08.31. */
|
||||
value16 = rtw_read16(padapter, REG_CR);
|
||||
value16 = rtl8723au_read16(padapter, REG_CR);
|
||||
value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN |
|
||||
PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN |
|
||||
ENSEC | CALTMR_EN);
|
||||
|
|
@ -216,7 +216,7 @@ static void
|
|||
_InitNormalChipRegPriority(struct rtw_adapter *Adapter, u16 beQ, u16 bkQ,
|
||||
u16 viQ, u16 voQ, u16 mgtQ, u16 hiQ)
|
||||
{
|
||||
u16 value16 = rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7;
|
||||
u16 value16 = rtl8723au_read16(Adapter, REG_TRXDMA_CTRL) & 0x7;
|
||||
|
||||
value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
|
||||
_TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
|
||||
|
|
@ -346,7 +346,7 @@ static void _InitNetworkType(struct rtw_adapter *Adapter)
|
|||
{
|
||||
u32 value32;
|
||||
|
||||
value32 = rtw_read32(Adapter, REG_CR);
|
||||
value32 = rtl8723au_read32(Adapter, REG_CR);
|
||||
|
||||
/* TODO: use the other function to set network type */
|
||||
value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
|
||||
|
|
@ -402,7 +402,7 @@ static void _InitWMACSetting(struct rtw_adapter *Adapter)
|
|||
/* rtw_write16(Adapter, REG_RXFLTMAP0, value16); */
|
||||
|
||||
/* enable RX_SHIFT bits */
|
||||
/* rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter,
|
||||
/* rtw_write8(Adapter, REG_TRXDMA_CTRL, rtl8723au_read8(Adapter,
|
||||
REG_TRXDMA_CTRL)|BIT(1)); */
|
||||
}
|
||||
|
||||
|
|
@ -412,7 +412,7 @@ static void _InitAdaptiveCtrl(struct rtw_adapter *Adapter)
|
|||
u32 value32;
|
||||
|
||||
/* Response Rate Set */
|
||||
value32 = rtw_read32(Adapter, REG_RRSR);
|
||||
value32 = rtl8723au_read32(Adapter, REG_RRSR);
|
||||
value32 &= ~RATE_BITMAP_ALL;
|
||||
value32 |= RATE_RRSR_CCK_ONLY_1M;
|
||||
rtw_write32(Adapter, REG_RRSR, value32);
|
||||
|
|
@ -480,7 +480,7 @@ static void _InitRetryFunction(struct rtw_adapter *Adapter)
|
|||
{
|
||||
u8 value8;
|
||||
|
||||
value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL);
|
||||
value8 = rtl8723au_read8(Adapter, REG_FWHW_TXQ_CTRL);
|
||||
value8 |= EN_AMPDU_RTY_NEW;
|
||||
rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
|
||||
|
||||
|
|
@ -589,13 +589,14 @@ enum rt_rf_power_state RfOnOffDetect23a(struct rtw_adapter *pAdapter)
|
|||
enum rt_rf_power_state rfpowerstate = rf_off;
|
||||
|
||||
if (pAdapter->pwrctrlpriv.bHWPowerdown) {
|
||||
val8 = rtw_read8(pAdapter, REG_HSISR);
|
||||
val8 = rtl8723au_read8(pAdapter, REG_HSISR);
|
||||
DBG_8723A("pwrdown, 0x5c(BIT7) =%02x\n", val8);
|
||||
rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on;
|
||||
} else { /* rf on/off */
|
||||
rtw_write8(pAdapter, REG_MAC_PINMUX_CFG,
|
||||
rtw_read8(pAdapter, REG_MAC_PINMUX_CFG) & ~BIT(3));
|
||||
val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL);
|
||||
rtl8723au_read8(pAdapter, REG_MAC_PINMUX_CFG) &
|
||||
~BIT(3));
|
||||
val8 = rtl8723au_read8(pAdapter, REG_GPIO_IO_SEL);
|
||||
DBG_8723A("GPIO_IN =%02x\n", val8);
|
||||
rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off;
|
||||
}
|
||||
|
|
@ -634,7 +635,7 @@ static int rtl8723au_hal_init(struct rtw_adapter *Adapter)
|
|||
}
|
||||
|
||||
/* Check if MAC has already power on. by tynli. 2011.05.27. */
|
||||
val8 = rtw_read8(Adapter, REG_CR);
|
||||
val8 = rtl8723au_read8(Adapter, REG_CR);
|
||||
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
|
||||
("%s: REG_CR 0x100 = 0x%02x\n", __func__, val8));
|
||||
/* Fix 92DU-VC S3 hang with the reason is that secondary mac is not
|
||||
|
|
@ -881,13 +882,15 @@ static int rtl8723au_hal_init(struct rtw_adapter *Adapter)
|
|||
rtl8723a_set_nav_upper(Adapter, WiFiNavUpperUs);
|
||||
|
||||
/* 2011/03/09 MH debug only, UMC-B cut pass 2500 S5 test, but we need to fin root cause. */
|
||||
if (((rtw_read32(Adapter, rFPGA0_RFMOD) & 0xFF000000) != 0x83000000)) {
|
||||
if (((rtl8723au_read32(Adapter, rFPGA0_RFMOD) & 0xFF000000) !=
|
||||
0x83000000)) {
|
||||
PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT(24), 1);
|
||||
RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("%s: IQK fail recorver\n", __func__));
|
||||
}
|
||||
|
||||
/* ack for xmit mgmt frames. */
|
||||
rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12));
|
||||
rtw_write32(Adapter, REG_FWHW_TXQ_CTRL,
|
||||
rtl8723au_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12));
|
||||
|
||||
exit:
|
||||
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
|
||||
|
|
@ -914,7 +917,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter,
|
|||
|
||||
/* 2. Force PWM, Enable SPS18_LDO_Marco_Block */
|
||||
rtw_write8(Adapter, REG_SPS0_CTRL,
|
||||
rtw_read8(Adapter, REG_SPS0_CTRL) |
|
||||
rtl8723au_read8(Adapter, REG_SPS0_CTRL) |
|
||||
BIT(0) | BIT(3));
|
||||
|
||||
/* 3. restore BB, AFE control register. */
|
||||
|
|
@ -958,7 +961,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter,
|
|||
|
||||
/* 2. Force PWM, Enable SPS18_LDO_Marco_Block */
|
||||
rtw_write8(Adapter, REG_SPS0_CTRL,
|
||||
rtw_read8(Adapter, REG_SPS0_CTRL) |
|
||||
rtl8723au_read8(Adapter, REG_SPS0_CTRL) |
|
||||
BIT(0) | BIT(3));
|
||||
|
||||
/* 3. restore BB, AFE control register. */
|
||||
|
|
@ -992,7 +995,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter,
|
|||
}
|
||||
|
||||
/* 5. gated MAC Clock */
|
||||
bytetmp = rtw_read8(Adapter, REG_APSD_CTRL);
|
||||
bytetmp = rtl8723au_read8(Adapter, REG_APSD_CTRL);
|
||||
rtw_write8(Adapter, REG_APSD_CTRL, bytetmp & ~BIT(6));
|
||||
|
||||
mdelay(10);
|
||||
|
|
@ -1006,7 +1009,7 @@ static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter,
|
|||
break;
|
||||
case rf_sleep:
|
||||
case rf_off:
|
||||
value8 = rtw_read8(Adapter, REG_SPS0_CTRL) ;
|
||||
value8 = rtl8723au_read8(Adapter, REG_SPS0_CTRL) ;
|
||||
if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
|
||||
value8 &= ~BIT(0);
|
||||
else
|
||||
|
|
@ -1170,12 +1173,12 @@ static void CardDisableRTL8723U(struct rtw_adapter *Adapter)
|
|||
rtw_write8(Adapter, REG_RF_CTRL, 0x00);
|
||||
|
||||
/* ==== Reset digital sequence ====== */
|
||||
if ((rtw_read8(Adapter, REG_MCUFWDL) & BIT(7)) &&
|
||||
if ((rtl8723au_read8(Adapter, REG_MCUFWDL) & BIT(7)) &&
|
||||
Adapter->bFWReady) /* 8051 RAM code */
|
||||
rtl8723a_FirmwareSelfReset(Adapter);
|
||||
|
||||
/* Reset MCU. Suggested by Filen. 2011.01.26. by tynli. */
|
||||
u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1);
|
||||
u1bTmp = rtl8723au_read8(Adapter, REG_SYS_FUNC_EN+1);
|
||||
rtw_write8(Adapter, REG_SYS_FUNC_EN+1, u1bTmp & ~BIT(2));
|
||||
|
||||
/* g. MCUFWDL 0x80[1:0]= 0 reset MCU ready status */
|
||||
|
|
@ -1188,9 +1191,9 @@ static void CardDisableRTL8723U(struct rtw_adapter *Adapter)
|
|||
rtl8723AU_card_disable_flow);
|
||||
|
||||
/* Reset MCU IO Wrapper, added by Roger, 2011.08.30. */
|
||||
u1bTmp = rtw_read8(Adapter, REG_RSV_CTRL + 1);
|
||||
u1bTmp = rtl8723au_read8(Adapter, REG_RSV_CTRL + 1);
|
||||
rtw_write8(Adapter, REG_RSV_CTRL+1, u1bTmp & ~BIT(0));
|
||||
u1bTmp = rtw_read8(Adapter, REG_RSV_CTRL + 1);
|
||||
u1bTmp = rtl8723au_read8(Adapter, REG_RSV_CTRL + 1);
|
||||
rtw_write8(Adapter, REG_RSV_CTRL+1, u1bTmp | BIT(0));
|
||||
|
||||
/* 7. RSV_CTRL 0x1C[7:0] = 0x0E lock ISO/CLK/Power control register */
|
||||
|
|
@ -1242,7 +1245,7 @@ int rtl8723au_inirp_init(struct rtw_adapter *Adapter)
|
|||
("usb_rx_init: usb_read_interrupt error\n"));
|
||||
status = _FAIL;
|
||||
}
|
||||
pHalData->IntrMask[0] = rtw_read32(Adapter, REG_USB_HIMR);
|
||||
pHalData->IntrMask[0] = rtl8723au_read32(Adapter, REG_USB_HIMR);
|
||||
MSG_8723A("pHalData->IntrMask = 0x%04x\n", pHalData->IntrMask[0]);
|
||||
pHalData->IntrMask[0] |= UHIMR_C2HCMD|UHIMR_CPWM;
|
||||
rtw_write32(Adapter, REG_USB_HIMR, pHalData->IntrMask[0]);
|
||||
|
|
@ -1259,7 +1262,7 @@ int rtl8723au_inirp_deinit(struct rtw_adapter *Adapter)
|
|||
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
|
||||
("\n ===> usb_rx_deinit\n"));
|
||||
rtl8723a_usb_read_port_cancel(Adapter);
|
||||
pHalData->IntrMask[0] = rtw_read32(Adapter, REG_USB_HIMR);
|
||||
pHalData->IntrMask[0] = rtl8723au_read32(Adapter, REG_USB_HIMR);
|
||||
MSG_8723A("%s pHalData->IntrMask = 0x%04x\n", __func__,
|
||||
pHalData->IntrMask[0]);
|
||||
pHalData->IntrMask[0] = 0x0;
|
||||
|
|
@ -1400,7 +1403,7 @@ static void _ReadPROMContent(struct rtw_adapter *Adapter)
|
|||
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
|
||||
u8 eeValue;
|
||||
|
||||
eeValue = rtw_read8(Adapter, REG_9346CR);
|
||||
eeValue = rtl8723au_read8(Adapter, REG_9346CR);
|
||||
/* To check system boot selection. */
|
||||
pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false;
|
||||
pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true;
|
||||
|
|
@ -1439,7 +1442,7 @@ static void hal_EfuseCellSel(struct rtw_adapter *Adapter)
|
|||
{
|
||||
u32 value32;
|
||||
|
||||
value32 = rtw_read32(Adapter, EFUSE_TEST);
|
||||
value32 = rtl8723au_read32(Adapter, EFUSE_TEST);
|
||||
value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
|
||||
rtw_write32(Adapter, EFUSE_TEST, value32);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -132,7 +132,7 @@ exit:
|
|||
return status;
|
||||
}
|
||||
|
||||
static u8 usb_read8(struct rtw_adapter *padapter, u32 addr)
|
||||
u8 rtl8723au_read8(struct rtw_adapter *padapter, u32 addr)
|
||||
{
|
||||
u8 request;
|
||||
u8 requesttype;
|
||||
|
|
@ -154,7 +154,7 @@ static u8 usb_read8(struct rtw_adapter *padapter, u32 addr)
|
|||
return data;
|
||||
}
|
||||
|
||||
static u16 usb_read16(struct rtw_adapter *padapter, u32 addr)
|
||||
u16 rtl8723au_read16(struct rtw_adapter *padapter, u32 addr)
|
||||
{
|
||||
u8 request;
|
||||
u8 requesttype;
|
||||
|
|
@ -176,7 +176,7 @@ static u16 usb_read16(struct rtw_adapter *padapter, u32 addr)
|
|||
return le16_to_cpu(data);
|
||||
}
|
||||
|
||||
static u32 usb_read32(struct rtw_adapter *padapter, u32 addr)
|
||||
u32 rtl8723au_read32(struct rtw_adapter *padapter, u32 addr)
|
||||
{
|
||||
u8 request;
|
||||
u8 requesttype;
|
||||
|
|
@ -839,10 +839,6 @@ void rtl8723au_set_intf_ops(struct rtw_adapter *padapter)
|
|||
|
||||
memset((u8 *)pops, 0, sizeof(struct _io_ops));
|
||||
|
||||
pops->_read8 = &usb_read8;
|
||||
pops->_read16 = &usb_read16;
|
||||
pops->_read32 = &usb_read32;
|
||||
|
||||
pops->_write8 = &usb_write8;
|
||||
pops->_write16 = &usb_write16;
|
||||
pops->_write32 = &usb_write32;
|
||||
|
|
|
|||
|
|
@ -100,10 +100,6 @@ struct intf_priv;
|
|||
|
||||
struct _io_ops
|
||||
{
|
||||
u8 (*_read8)(struct rtw_adapter *adapter, u32 addr);
|
||||
u16 (*_read16)(struct rtw_adapter *adapter, u32 addr);
|
||||
u32 (*_read32)(struct rtw_adapter *adapter, u32 addr);
|
||||
|
||||
int (*_write8)(struct rtw_adapter *adapter, u32 addr, u8 val);
|
||||
int (*_write16)(struct rtw_adapter *adapter, u32 addr, u16 val);
|
||||
int (*_write32)(struct rtw_adapter *adapter, u32 addr, u32 val);
|
||||
|
|
@ -240,9 +236,6 @@ struct reg_protocol_wt {
|
|||
void _rtw_attrib_read(struct rtw_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
|
||||
void _rtw_attrib_write(struct rtw_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
|
||||
|
||||
u8 _rtw_read823a(struct rtw_adapter *adapter, u32 addr);
|
||||
u16 _rtw_read1623a(struct rtw_adapter *adapter, u32 addr);
|
||||
u32 _rtw_read3223a(struct rtw_adapter *adapter, u32 addr);
|
||||
void _rtw_read_port23a_cancel(struct rtw_adapter *adapter);
|
||||
|
||||
int _rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val);
|
||||
|
|
@ -256,28 +249,16 @@ void _rtw_write_port23a_cancel(struct rtw_adapter *adapter);
|
|||
bool match_read_sniff_ranges(u16 addr, u16 len);
|
||||
bool match_write_sniff_ranges(u16 addr, u16 len);
|
||||
|
||||
u8 dbg_rtw_read823a(struct rtw_adapter *adapter, u32 addr, const char *caller, const int line);
|
||||
u16 dbg_rtw_read1623a(struct rtw_adapter *adapter, u32 addr, const char *caller, const int line);
|
||||
u32 dbg_rtw_read3223a(struct rtw_adapter *adapter, u32 addr, const char *caller, const int line);
|
||||
|
||||
int dbg_rtw_write823a(struct rtw_adapter *adapter, u32 addr, u8 val, const char *caller, const int line);
|
||||
int dbg_rtw_write1623a(struct rtw_adapter *adapter, u32 addr, u16 val, const char *caller, const int line);
|
||||
int dbg_rtw_write3223a(struct rtw_adapter *adapter, u32 addr, u32 val, const char *caller, const int line);
|
||||
int dbg_rtw_writeN23a(struct rtw_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line);
|
||||
|
||||
#define rtw_read8(adapter, addr) dbg_rtw_read823a((adapter), (addr), __FUNCTION__, __LINE__)
|
||||
#define rtw_read16(adapter, addr) dbg_rtw_read1623a((adapter), (addr), __FUNCTION__, __LINE__)
|
||||
#define rtw_read32(adapter, addr) dbg_rtw_read3223a((adapter), (addr), __FUNCTION__, __LINE__)
|
||||
|
||||
#define rtw_write8(adapter, addr, val) dbg_rtw_write823a((adapter), (addr), (val), __FUNCTION__, __LINE__)
|
||||
#define rtw_write16(adapter, addr, val) dbg_rtw_write1623a((adapter), (addr), (val), __FUNCTION__, __LINE__)
|
||||
#define rtw_write32(adapter, addr, val) dbg_rtw_write3223a((adapter), (addr), (val), __FUNCTION__, __LINE__)
|
||||
#define rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN23a((adapter), (addr), (length), (data), __FUNCTION__, __LINE__)
|
||||
#else /* DBG_IO */
|
||||
#define rtw_read8(adapter, addr) _rtw_read823a((adapter), (addr))
|
||||
#define rtw_read16(adapter, addr) _rtw_read1623a((adapter), (addr))
|
||||
#define rtw_read32(adapter, addr) _rtw_read3223a((adapter), (addr))
|
||||
|
||||
#define rtw_write8(adapter, addr, val) _rtw_write823a((adapter), (addr), (val))
|
||||
#define rtw_write16(adapter, addr, val) _rtw_write1623a((adapter), (addr), (val))
|
||||
#define rtw_write32(adapter, addr, val) _rtw_write3223a((adapter), (addr), (val))
|
||||
|
|
@ -291,11 +272,8 @@ int dbg_rtw_writeN23a(struct rtw_adapter *adapter, u32 addr ,u32 length , u8 *da
|
|||
#define PlatformEFIOWrite4Byte(_a,_b,_c) \
|
||||
rtw_write32(_a,_b,_c)
|
||||
|
||||
#define PlatformEFIORead1Byte(_a,_b) \
|
||||
rtw_read8(_a,_b)
|
||||
#define PlatformEFIORead2Byte(_a,_b) \
|
||||
rtw_read16(_a,_b)
|
||||
#define PlatformEFIORead4Byte(_a,_b) \
|
||||
rtw_read32(_a,_b)
|
||||
#define PlatformEFIORead1Byte(_a,_b) rtl8723au_read8(_a,_b)
|
||||
#define PlatformEFIORead2Byte(_a,_b) rtl8723au_read16(_a,_b)
|
||||
#define PlatformEFIORead4Byte(_a,_b) rtl8723au_read32(_a,_b)
|
||||
|
||||
#endif /* _RTL8711_IO_H_ */
|
||||
|
|
|
|||
|
|
@ -29,4 +29,8 @@ int rtl8723a_usb_write_port(struct rtw_adapter *padapter, u32 addr, u32 cnt,
|
|||
void rtl8723a_usb_write_port_cancel(struct rtw_adapter *padapter);
|
||||
int rtl8723a_usb_read_interrupt(struct rtw_adapter *adapter, u32 addr);
|
||||
|
||||
u8 rtl8723au_read8(struct rtw_adapter *padapter, u32 addr);
|
||||
u16 rtl8723au_read16(struct rtw_adapter *padapter, u32 addr);
|
||||
u32 rtl8723au_read32(struct rtw_adapter *padapter, u32 addr);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue