drm/i915: Implement display w/a #1143
Apparently SKL/KBL/CFL need some manual help to get the programmed HDMI vswing to stick. Implement the relevant workaround (display w/a #1143). Note that the relevant chicken bits live in a transcoder register even though the bits affect a specific DDI port rather than a specific transcoder. Hence we must pick the correct transcoder register instance based on the port rather than based on the cpu_transcoder. Also note that for completeness I included support for DDI A/E in the code even though we never have HDMI on those ports. v2: CFL needs the w/a as well (Rodrigo and Art) Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Art Runyan <arthur.j.runyan@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180122174131.28046-1-ville.syrjala@linux.intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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@ -7079,8 +7079,12 @@ enum {
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#define CHICKEN_TRANS_A 0x420c0
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#define CHICKEN_TRANS_A 0x420c0
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#define CHICKEN_TRANS_B 0x420c4
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#define CHICKEN_TRANS_B 0x420c4
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#define CHICKEN_TRANS(trans) _MMIO_TRANS(trans, CHICKEN_TRANS_A, CHICKEN_TRANS_B)
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#define CHICKEN_TRANS(trans) _MMIO_TRANS(trans, CHICKEN_TRANS_A, CHICKEN_TRANS_B)
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#define PSR2_VSC_ENABLE_PROG_HEADER (1<<12)
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#define DDI_TRAINING_OVERRIDE_ENABLE (1<<19)
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#define PSR2_ADD_VERTICAL_LINE_COUNT (1<<15)
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#define DDI_TRAINING_OVERRIDE_VALUE (1<<18)
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#define DDIE_TRAINING_OVERRIDE_ENABLE (1<<17) /* CHICKEN_TRANS_A only */
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#define DDIE_TRAINING_OVERRIDE_VALUE (1<<16) /* CHICKEN_TRANS_A only */
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#define PSR2_ADD_VERTICAL_LINE_COUNT (1<<15)
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#define PSR2_VSC_ENABLE_PROG_HEADER (1<<12)
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#define DISP_ARB_CTL _MMIO(0x45000)
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#define DISP_ARB_CTL _MMIO(0x45000)
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#define DISP_FBC_MEMORY_WAKE (1<<31)
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#define DISP_FBC_MEMORY_WAKE (1<<31)
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@ -2404,6 +2404,48 @@ static void intel_enable_ddi_hdmi(struct intel_encoder *encoder,
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crtc_state->hdmi_high_tmds_clock_ratio,
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crtc_state->hdmi_high_tmds_clock_ratio,
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crtc_state->hdmi_scrambling);
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crtc_state->hdmi_scrambling);
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/* Display WA #1143: skl,kbl,cfl */
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if (IS_GEN9_BC(dev_priv)) {
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/*
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* For some reason these chicken bits have been
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* stuffed into a transcoder register, event though
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* the bits affect a specific DDI port rather than
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* a specific transcoder.
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*/
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static const enum transcoder port_to_transcoder[] = {
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[PORT_A] = TRANSCODER_EDP,
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[PORT_B] = TRANSCODER_A,
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[PORT_C] = TRANSCODER_B,
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[PORT_D] = TRANSCODER_C,
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[PORT_E] = TRANSCODER_A,
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};
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enum transcoder transcoder = port_to_transcoder[port];
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u32 val;
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val = I915_READ(CHICKEN_TRANS(transcoder));
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if (port == PORT_E)
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val |= DDIE_TRAINING_OVERRIDE_ENABLE |
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DDIE_TRAINING_OVERRIDE_VALUE;
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else
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val |= DDI_TRAINING_OVERRIDE_ENABLE |
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DDI_TRAINING_OVERRIDE_VALUE;
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I915_WRITE(CHICKEN_TRANS(transcoder), val);
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POSTING_READ(CHICKEN_TRANS(transcoder));
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udelay(1);
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if (port == PORT_E)
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val &= ~(DDIE_TRAINING_OVERRIDE_ENABLE |
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DDIE_TRAINING_OVERRIDE_VALUE);
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else
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val &= ~(DDI_TRAINING_OVERRIDE_ENABLE |
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DDI_TRAINING_OVERRIDE_VALUE);
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I915_WRITE(CHICKEN_TRANS(transcoder), val);
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}
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/* In HDMI/DVI mode, the port width, and swing/emphasis values
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/* In HDMI/DVI mode, the port width, and swing/emphasis values
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* are ignored so nothing special needs to be done besides
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* are ignored so nothing special needs to be done besides
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* enabling the port.
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* enabling the port.
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