Merge remote-tracking branch 'asoc/topic/cs42l52' into asoc-next
This commit is contained in:
commit
05e48b5064
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@ -31,6 +31,8 @@ struct cs42l52_platform_data {
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/* Charge Pump Freq. Check datasheet Pg73 */
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unsigned int chgfreq;
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/* Reset GPIO */
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unsigned int reset_gpio;
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};
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#endif /* __CS42L52_H */
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@ -17,6 +17,7 @@
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/input.h>
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@ -1116,40 +1117,6 @@ static int cs42l52_probe(struct snd_soc_codec *codec)
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cs42l52->sysclk = CS42L52_DEFAULT_CLK;
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cs42l52->config.format = CS42L52_DEFAULT_FORMAT;
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/* Set Platform MICx CFG */
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snd_soc_update_bits(codec, CS42L52_MICA_CTL,
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CS42L52_MIC_CTL_TYPE_MASK,
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cs42l52->pdata.mica_cfg <<
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CS42L52_MIC_CTL_TYPE_SHIFT);
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snd_soc_update_bits(codec, CS42L52_MICB_CTL,
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CS42L52_MIC_CTL_TYPE_MASK,
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cs42l52->pdata.micb_cfg <<
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CS42L52_MIC_CTL_TYPE_SHIFT);
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/* if Single Ended, Get Mic_Select */
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if (cs42l52->pdata.mica_cfg)
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snd_soc_update_bits(codec, CS42L52_MICA_CTL,
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CS42L52_MIC_CTL_MIC_SEL_MASK,
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cs42l52->pdata.mica_sel <<
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CS42L52_MIC_CTL_MIC_SEL_SHIFT);
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if (cs42l52->pdata.micb_cfg)
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snd_soc_update_bits(codec, CS42L52_MICB_CTL,
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CS42L52_MIC_CTL_MIC_SEL_MASK,
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cs42l52->pdata.micb_sel <<
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CS42L52_MIC_CTL_MIC_SEL_SHIFT);
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/* Set Platform Charge Pump Freq */
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snd_soc_update_bits(codec, CS42L52_CHARGE_PUMP,
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CS42L52_CHARGE_PUMP_MASK,
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cs42l52->pdata.chgfreq <<
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CS42L52_CHARGE_PUMP_SHIFT);
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/* Set Platform Bias Level */
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snd_soc_update_bits(codec, CS42L52_IFACE_CTL2,
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CS42L52_IFACE_CTL2_BIAS_LVL,
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cs42l52->pdata.micbias_lvl);
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return ret;
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}
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@ -1205,6 +1172,7 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client,
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const struct i2c_device_id *id)
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{
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struct cs42l52_private *cs42l52;
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struct cs42l52_platform_data *pdata = dev_get_platdata(&i2c_client->dev);
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int ret;
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unsigned int devid = 0;
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unsigned int reg;
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@ -1222,11 +1190,22 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client,
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return ret;
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}
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i2c_set_clientdata(i2c_client, cs42l52);
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if (pdata)
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cs42l52->pdata = *pdata;
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if (dev_get_platdata(&i2c_client->dev))
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memcpy(&cs42l52->pdata, dev_get_platdata(&i2c_client->dev),
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sizeof(cs42l52->pdata));
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if (cs42l52->pdata.reset_gpio) {
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ret = gpio_request_one(cs42l52->pdata.reset_gpio,
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GPIOF_OUT_INIT_HIGH, "CS42L52 /RST");
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if (ret < 0) {
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dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n",
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cs42l52->pdata.reset_gpio, ret);
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return ret;
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}
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gpio_set_value_cansleep(cs42l52->pdata.reset_gpio, 0);
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gpio_set_value_cansleep(cs42l52->pdata.reset_gpio, 1);
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}
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i2c_set_clientdata(i2c_client, cs42l52);
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ret = regmap_register_patch(cs42l52->regmap, cs42l52_threshold_patch,
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ARRAY_SIZE(cs42l52_threshold_patch));
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@ -1244,7 +1223,43 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client,
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return ret;
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}
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regcache_cache_only(cs42l52->regmap, true);
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dev_info(&i2c_client->dev, "Cirrus Logic CS42L52, Revision: %02X\n",
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reg & 0xFF);
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/* Set Platform Data */
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if (cs42l52->pdata.mica_cfg)
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regmap_update_bits(cs42l52->regmap, CS42L52_MICA_CTL,
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CS42L52_MIC_CTL_TYPE_MASK,
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cs42l52->pdata.mica_cfg <<
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CS42L52_MIC_CTL_TYPE_SHIFT);
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if (cs42l52->pdata.micb_cfg)
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regmap_update_bits(cs42l52->regmap, CS42L52_MICB_CTL,
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CS42L52_MIC_CTL_TYPE_MASK,
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cs42l52->pdata.micb_cfg <<
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CS42L52_MIC_CTL_TYPE_SHIFT);
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if (cs42l52->pdata.mica_sel)
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regmap_update_bits(cs42l52->regmap, CS42L52_MICA_CTL,
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CS42L52_MIC_CTL_MIC_SEL_MASK,
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cs42l52->pdata.mica_sel <<
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CS42L52_MIC_CTL_MIC_SEL_SHIFT);
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if (cs42l52->pdata.micb_sel)
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regmap_update_bits(cs42l52->regmap, CS42L52_MICB_CTL,
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CS42L52_MIC_CTL_MIC_SEL_MASK,
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cs42l52->pdata.micb_sel <<
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CS42L52_MIC_CTL_MIC_SEL_SHIFT);
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if (cs42l52->pdata.chgfreq)
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regmap_update_bits(cs42l52->regmap, CS42L52_CHARGE_PUMP,
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CS42L52_CHARGE_PUMP_MASK,
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cs42l52->pdata.chgfreq <<
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CS42L52_CHARGE_PUMP_SHIFT);
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if (cs42l52->pdata.micbias_lvl)
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regmap_update_bits(cs42l52->regmap, CS42L52_IFACE_CTL2,
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CS42L52_IFACE_CTL2_BIAS_LVL,
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cs42l52->pdata.micbias_lvl);
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ret = snd_soc_register_codec(&i2c_client->dev,
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&soc_codec_dev_cs42l52, &cs42l52_dai, 1);
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@ -269,6 +269,6 @@
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#define CS42L52_FIX_BITS1 0x3E
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#define CS42L52_FIX_BITS2 0x47
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#define CS42L52_MAX_REGISTER 0x34
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#define CS42L52_MAX_REGISTER 0x47
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#endif
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