arm64 fixes:
- Ensure we don't access PMU registers of the PMU is not implemented (fixes booting under QEMU) - Fix BUG_ON triggered during module loading with DEBUG_SET_MODULE_RONX - Ensure the kasan zero page is read-only - Hide __efistub_ symbol aliases from kallsyms, since they otherwise confuse the backtrace code - Ensure !PTE_WRITE kernel ptes are marked as read-only - defconfig updates based on requests and patches on the list - Other minor fixes (typos, build system) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCgAGBQJWp7gyAAoJELescNyEwWM0At0H/2o0GeFS2mEQILShWv7SHaPG Fvon25UTHPwfS5zhejtBYpuISJZTFql4KBKtoT6dHxf4U+gb+zicSZJHlkoxJfRV 8JBD5DmS2OcO9+JtgAey5O1w0yZ9prVr45QQrLmDGZBDKV9AivT31I/BNnnq3LWJ dg9pbHrvLanR54qpYjWoW0S0Sop93XCHc8y2Q66hDFrG3zkXkQfy6VCsJq/LdnAp wlCY/5QbbKufm+LP0jpmefq6brCGh0v7bCpOO3nwSPtD1iMrT6odAKjiBmPeE59r XvOd5g760tZnVLSeLR0Iqq9PLdsdBvd5gHQlMfyBAIt7xhfEEH7b8Tthh1bSRPU= =ldNV -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "The main thing here is to get us booting under qemu again after it turned out that not all of the PMU registers are emulated there, causing us to die early in boot. - Ensure we don't access PMU registers of the PMU is not implemented (fixes booting under QEMU) - Fix BUG_ON triggered during module loading with DEBUG_SET_MODULE_RONX - Ensure the kasan zero page is read-only - Hide __efistub_ symbol aliases from kallsyms, since they otherwise confuse the backtrace code - Ensure !PTE_WRITE kernel ptes are marked as read-only - defconfig updates based on requests and patches on the list - Other minor fixes (typos, build system)" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: mm: avoid calling apply_to_page_range on empty range arm64: defconfig: updates for 4.5 arm64: errata: Add -mpc-relative-literal-loads to build flags Eliminate the .eh_frame sections from the aarch64 vmlinux and kernel modules arm64: Fix an enum typo in mm/dump.c arm64: Honour !PTE_WRITE in set_pte_at() for kernel mappings arm64: kernel: fix architected PMU registers unconditional access arm64: kasan: ensure that the KASAN zero page is mapped read-only arm64: hide __efistub_ aliases from kallsyms
This commit is contained in:
commit
075356c1cf
|
@ -27,6 +27,8 @@ $(warning LSE atomics not supported by binutils)
|
|||
endif
|
||||
|
||||
KBUILD_CFLAGS += -mgeneral-regs-only $(lseinstr)
|
||||
KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
|
||||
KBUILD_CFLAGS += $(call cc-option, -mpc-relative-literal-loads)
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||||
KBUILD_AFLAGS += $(lseinstr)
|
||||
|
||||
ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
|
||||
|
|
|
@ -16,7 +16,6 @@ CONFIG_IKCONFIG_PROC=y
|
|||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_MEMCG=y
|
||||
CONFIG_MEMCG_SWAP=y
|
||||
CONFIG_MEMCG_KMEM=y
|
||||
CONFIG_CGROUP_HUGETLB=y
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_IPC_NS is not set
|
||||
|
@ -37,15 +36,13 @@ CONFIG_ARCH_EXYNOS7=y
|
|||
CONFIG_ARCH_LAYERSCAPE=y
|
||||
CONFIG_ARCH_HISI=y
|
||||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_ARCH_QCOM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_ARCH_SEATTLE=y
|
||||
CONFIG_ARCH_RENESAS=y
|
||||
CONFIG_ARCH_R8A7795=y
|
||||
CONFIG_ARCH_STRATIX10=y
|
||||
CONFIG_ARCH_TEGRA=y
|
||||
CONFIG_ARCH_TEGRA_132_SOC=y
|
||||
CONFIG_ARCH_TEGRA_210_SOC=y
|
||||
CONFIG_ARCH_QCOM=y
|
||||
CONFIG_ARCH_SPRD=y
|
||||
CONFIG_ARCH_THUNDER=y
|
||||
CONFIG_ARCH_UNIPHIER=y
|
||||
|
@ -54,14 +51,19 @@ CONFIG_ARCH_XGENE=y
|
|||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_IOV=y
|
||||
CONFIG_PCI_RCAR_GEN2_PCIE=y
|
||||
CONFIG_PCI_HOST_GENERIC=y
|
||||
CONFIG_PCI_XGENE=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_PCI_LAYERSCAPE=y
|
||||
CONFIG_PCI_HISI=y
|
||||
CONFIG_PCIE_QCOM=y
|
||||
CONFIG_SCHED_MC=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_KSM=y
|
||||
CONFIG_TRANSPARENT_HUGEPAGE=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_XEN=y
|
||||
CONFIG_CMDLINE="console=ttyAMA0"
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
CONFIG_COMPAT=y
|
||||
|
@ -100,7 +102,11 @@ CONFIG_PATA_OF_PLATFORM=y
|
|||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=y
|
||||
CONFIG_VIRTIO_NET=y
|
||||
CONFIG_AMD_XGBE=y
|
||||
CONFIG_NET_XGENE=y
|
||||
CONFIG_E1000E=y
|
||||
CONFIG_IGB=y
|
||||
CONFIG_IGBVF=y
|
||||
CONFIG_SKY2=y
|
||||
CONFIG_RAVB=y
|
||||
CONFIG_SMC91X=y
|
||||
|
@ -117,25 +123,23 @@ CONFIG_SERIAL_8250_CONSOLE=y
|
|||
CONFIG_SERIAL_8250_DW=y
|
||||
CONFIG_SERIAL_8250_MT6577=y
|
||||
CONFIG_SERIAL_8250_UNIPHIER=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
CONFIG_SERIAL_SAMSUNG=y
|
||||
CONFIG_SERIAL_SAMSUNG_UARTS_4=y
|
||||
CONFIG_SERIAL_SAMSUNG_UARTS=4
|
||||
CONFIG_SERIAL_SAMSUNG_CONSOLE=y
|
||||
CONFIG_SERIAL_TEGRA=y
|
||||
CONFIG_SERIAL_SH_SCI=y
|
||||
CONFIG_SERIAL_SH_SCI_NR_UARTS=11
|
||||
CONFIG_SERIAL_SH_SCI_CONSOLE=y
|
||||
CONFIG_SERIAL_TEGRA=y
|
||||
CONFIG_SERIAL_MSM=y
|
||||
CONFIG_SERIAL_MSM_CONSOLE=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SERIAL_XILINX_PS_UART=y
|
||||
CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
|
||||
CONFIG_VIRTIO_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_QUP=y
|
||||
CONFIG_I2C_UNIPHIER_F=y
|
||||
CONFIG_I2C_RCAR=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_PL022=y
|
||||
|
@ -176,8 +180,6 @@ CONFIG_MMC_SDHCI_PLTFM=y
|
|||
CONFIG_MMC_SDHCI_TEGRA=y
|
||||
CONFIG_MMC_SPI=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_IDMAC=y
|
||||
CONFIG_MMC_DW_PLTFM=y
|
||||
CONFIG_MMC_DW_EXYNOS=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
|
@ -187,28 +189,33 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
|||
CONFIG_LEDS_TRIGGER_CPU=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_EFI=y
|
||||
CONFIG_RTC_DRV_PL031=y
|
||||
CONFIG_RTC_DRV_XGENE=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_RCAR_DMAC=y
|
||||
CONFIG_QCOM_BAM_DMA=y
|
||||
CONFIG_TEGRA20_APB_DMA=y
|
||||
CONFIG_RCAR_DMAC=y
|
||||
CONFIG_VFIO=y
|
||||
CONFIG_VFIO_PCI=y
|
||||
CONFIG_VIRTIO_PCI=y
|
||||
CONFIG_VIRTIO_BALLOON=y
|
||||
CONFIG_VIRTIO_MMIO=y
|
||||
CONFIG_XEN_GNTDEV=y
|
||||
CONFIG_XEN_GRANT_DEV_ALLOC=y
|
||||
CONFIG_COMMON_CLK_CS2000_CP=y
|
||||
CONFIG_COMMON_CLK_QCOM=y
|
||||
CONFIG_MSM_GCC_8916=y
|
||||
CONFIG_HWSPINLOCK_QCOM=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_ARM_SMMU=y
|
||||
CONFIG_QCOM_SMEM=y
|
||||
CONFIG_QCOM_SMD=y
|
||||
CONFIG_QCOM_SMD_RPM=y
|
||||
CONFIG_ARCH_TEGRA_132_SOC=y
|
||||
CONFIG_ARCH_TEGRA_210_SOC=y
|
||||
CONFIG_HISILICON_IRQ_MBIGEN=y
|
||||
CONFIG_PHY_XGENE=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_FANOTIFY=y
|
||||
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
|
||||
CONFIG_QUOTA=y
|
||||
|
@ -239,6 +246,7 @@ CONFIG_LOCKUP_DETECTOR=y
|
|||
# CONFIG_FTRACE is not set
|
||||
CONFIG_MEMTEST=y
|
||||
CONFIG_SECURITY=y
|
||||
CONFIG_CRYPTO_ECHAINIV=y
|
||||
CONFIG_CRYPTO_ANSI_CPRNG=y
|
||||
CONFIG_ARM64_CRYPTO=y
|
||||
CONFIG_CRYPTO_SHA1_ARM64_CE=y
|
||||
|
|
|
@ -67,11 +67,11 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
|
|||
#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
|
||||
#define PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
|
||||
|
||||
#define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
|
||||
#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
|
||||
#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL_NC))
|
||||
#define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL_WT))
|
||||
#define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL))
|
||||
#define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
|
||||
#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
|
||||
#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
|
||||
#define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_WT))
|
||||
#define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
|
||||
|
||||
#define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
|
||||
#define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
|
||||
|
@ -81,7 +81,7 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
|
|||
|
||||
#define PAGE_KERNEL __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE)
|
||||
#define PAGE_KERNEL_RO __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
|
||||
#define PAGE_KERNEL_ROX __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
|
||||
#define PAGE_KERNEL_ROX __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
|
||||
#define PAGE_KERNEL_EXEC __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE)
|
||||
#define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_CONT)
|
||||
|
||||
|
@ -153,6 +153,7 @@ extern struct page *empty_zero_page;
|
|||
#define pte_write(pte) (!!(pte_val(pte) & PTE_WRITE))
|
||||
#define pte_exec(pte) (!(pte_val(pte) & PTE_UXN))
|
||||
#define pte_cont(pte) (!!(pte_val(pte) & PTE_CONT))
|
||||
#define pte_user(pte) (!!(pte_val(pte) & PTE_USER))
|
||||
|
||||
#ifdef CONFIG_ARM64_HW_AFDBM
|
||||
#define pte_hw_dirty(pte) (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
|
||||
|
@ -163,8 +164,6 @@ extern struct page *empty_zero_page;
|
|||
#define pte_dirty(pte) (pte_sw_dirty(pte) || pte_hw_dirty(pte))
|
||||
|
||||
#define pte_valid(pte) (!!(pte_val(pte) & PTE_VALID))
|
||||
#define pte_valid_user(pte) \
|
||||
((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
|
||||
#define pte_valid_not_user(pte) \
|
||||
((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID)
|
||||
#define pte_valid_young(pte) \
|
||||
|
@ -278,13 +277,13 @@ extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
|
|||
static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
||||
pte_t *ptep, pte_t pte)
|
||||
{
|
||||
if (pte_valid_user(pte)) {
|
||||
if (!pte_special(pte) && pte_exec(pte))
|
||||
__sync_icache_dcache(pte, addr);
|
||||
if (pte_valid(pte)) {
|
||||
if (pte_sw_dirty(pte) && pte_write(pte))
|
||||
pte_val(pte) &= ~PTE_RDONLY;
|
||||
else
|
||||
pte_val(pte) |= PTE_RDONLY;
|
||||
if (pte_user(pte) && pte_exec(pte) && !pte_special(pte))
|
||||
__sync_icache_dcache(pte, addr);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -514,9 +514,14 @@ CPU_LE( movk x0, #0x30d0, lsl #16 ) // Clear EE and E0E on LE systems
|
|||
#endif
|
||||
|
||||
/* EL2 debug */
|
||||
mrs x0, id_aa64dfr0_el1 // Check ID_AA64DFR0_EL1 PMUVer
|
||||
sbfx x0, x0, #8, #4
|
||||
cmp x0, #1
|
||||
b.lt 4f // Skip if no PMU present
|
||||
mrs x0, pmcr_el0 // Disable debug access traps
|
||||
ubfx x0, x0, #11, #5 // to EL2 and allow access to
|
||||
msr mdcr_el2, x0 // all PMU counters from EL1
|
||||
4:
|
||||
|
||||
/* Stage-2 translation */
|
||||
msr vttbr_el2, xzr
|
||||
|
|
|
@ -64,6 +64,16 @@
|
|||
|
||||
#ifdef CONFIG_EFI
|
||||
|
||||
/*
|
||||
* Prevent the symbol aliases below from being emitted into the kallsyms
|
||||
* table, by forcing them to be absolute symbols (which are conveniently
|
||||
* ignored by scripts/kallsyms) rather than section relative symbols.
|
||||
* The distinction is only relevant for partial linking, and only for symbols
|
||||
* that are defined within a section declaration (which is not the case for
|
||||
* the definitions below) so the resulting values will be identical.
|
||||
*/
|
||||
#define KALLSYMS_HIDE(sym) ABSOLUTE(sym)
|
||||
|
||||
/*
|
||||
* The EFI stub has its own symbol namespace prefixed by __efistub_, to
|
||||
* isolate it from the kernel proper. The following symbols are legally
|
||||
|
@ -73,25 +83,25 @@
|
|||
* linked at. The routines below are all implemented in assembler in a
|
||||
* position independent manner
|
||||
*/
|
||||
__efistub_memcmp = __pi_memcmp;
|
||||
__efistub_memchr = __pi_memchr;
|
||||
__efistub_memcpy = __pi_memcpy;
|
||||
__efistub_memmove = __pi_memmove;
|
||||
__efistub_memset = __pi_memset;
|
||||
__efistub_strlen = __pi_strlen;
|
||||
__efistub_strcmp = __pi_strcmp;
|
||||
__efistub_strncmp = __pi_strncmp;
|
||||
__efistub___flush_dcache_area = __pi___flush_dcache_area;
|
||||
__efistub_memcmp = KALLSYMS_HIDE(__pi_memcmp);
|
||||
__efistub_memchr = KALLSYMS_HIDE(__pi_memchr);
|
||||
__efistub_memcpy = KALLSYMS_HIDE(__pi_memcpy);
|
||||
__efistub_memmove = KALLSYMS_HIDE(__pi_memmove);
|
||||
__efistub_memset = KALLSYMS_HIDE(__pi_memset);
|
||||
__efistub_strlen = KALLSYMS_HIDE(__pi_strlen);
|
||||
__efistub_strcmp = KALLSYMS_HIDE(__pi_strcmp);
|
||||
__efistub_strncmp = KALLSYMS_HIDE(__pi_strncmp);
|
||||
__efistub___flush_dcache_area = KALLSYMS_HIDE(__pi___flush_dcache_area);
|
||||
|
||||
#ifdef CONFIG_KASAN
|
||||
__efistub___memcpy = __pi_memcpy;
|
||||
__efistub___memmove = __pi_memmove;
|
||||
__efistub___memset = __pi_memset;
|
||||
__efistub___memcpy = KALLSYMS_HIDE(__pi_memcpy);
|
||||
__efistub___memmove = KALLSYMS_HIDE(__pi_memmove);
|
||||
__efistub___memset = KALLSYMS_HIDE(__pi_memset);
|
||||
#endif
|
||||
|
||||
__efistub__text = _text;
|
||||
__efistub__end = _end;
|
||||
__efistub__edata = _edata;
|
||||
__efistub__text = KALLSYMS_HIDE(_text);
|
||||
__efistub__end = KALLSYMS_HIDE(_end);
|
||||
__efistub__edata = KALLSYMS_HIDE(_edata);
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
@ -46,7 +46,7 @@ enum address_markers_idx {
|
|||
PCI_START_NR,
|
||||
PCI_END_NR,
|
||||
MODULES_START_NR,
|
||||
MODUELS_END_NR,
|
||||
MODULES_END_NR,
|
||||
KERNEL_SPACE_NR,
|
||||
};
|
||||
|
||||
|
|
|
@ -120,6 +120,7 @@ static void __init cpu_set_ttbr1(unsigned long ttbr1)
|
|||
void __init kasan_init(void)
|
||||
{
|
||||
struct memblock_region *reg;
|
||||
int i;
|
||||
|
||||
/*
|
||||
* We are going to perform proper setup of shadow memory.
|
||||
|
@ -155,6 +156,14 @@ void __init kasan_init(void)
|
|||
pfn_to_nid(virt_to_pfn(start)));
|
||||
}
|
||||
|
||||
/*
|
||||
* KAsan may reuse the contents of kasan_zero_pte directly, so we
|
||||
* should make sure that it maps the zero page read-only.
|
||||
*/
|
||||
for (i = 0; i < PTRS_PER_PTE; i++)
|
||||
set_pte(&kasan_zero_pte[i],
|
||||
pfn_pte(virt_to_pfn(kasan_zero_page), PAGE_KERNEL_RO));
|
||||
|
||||
memset(kasan_zero_page, 0, PAGE_SIZE);
|
||||
cpu_set_ttbr1(__pa(swapper_pg_dir));
|
||||
flush_tlb_all();
|
||||
|
|
|
@ -57,6 +57,9 @@ static int change_memory_common(unsigned long addr, int numpages,
|
|||
if (end < MODULES_VADDR || end >= MODULES_END)
|
||||
return -EINVAL;
|
||||
|
||||
if (!numpages)
|
||||
return 0;
|
||||
|
||||
data.set_mask = set_mask;
|
||||
data.clear_mask = clear_mask;
|
||||
|
||||
|
|
|
@ -84,3 +84,15 @@
|
|||
b.lo 9998b
|
||||
dsb \domain
|
||||
.endm
|
||||
|
||||
/*
|
||||
* reset_pmuserenr_el0 - reset PMUSERENR_EL0 if PMUv3 present
|
||||
*/
|
||||
.macro reset_pmuserenr_el0, tmpreg
|
||||
mrs \tmpreg, id_aa64dfr0_el1 // Check ID_AA64DFR0_EL1 PMUVer
|
||||
sbfx \tmpreg, \tmpreg, #8, #4
|
||||
cmp \tmpreg, #1 // Skip if no PMU present
|
||||
b.lt 9000f
|
||||
msr pmuserenr_el0, xzr // Disable PMU access from EL0
|
||||
9000:
|
||||
.endm
|
||||
|
|
|
@ -117,7 +117,7 @@ ENTRY(cpu_do_resume)
|
|||
*/
|
||||
ubfx x11, x11, #1, #1
|
||||
msr oslar_el1, x11
|
||||
msr pmuserenr_el0, xzr // Disable PMU access from EL0
|
||||
reset_pmuserenr_el0 x0 // Disable PMU access from EL0
|
||||
mov x0, x12
|
||||
dsb nsh // Make sure local tlb invalidation completed
|
||||
isb
|
||||
|
@ -154,7 +154,7 @@ ENTRY(__cpu_setup)
|
|||
msr cpacr_el1, x0 // Enable FP/ASIMD
|
||||
mov x0, #1 << 12 // Reset mdscr_el1 and disable
|
||||
msr mdscr_el1, x0 // access to the DCC from EL0
|
||||
msr pmuserenr_el0, xzr // Disable PMU access from EL0
|
||||
reset_pmuserenr_el0 x0 // Disable PMU access from EL0
|
||||
/*
|
||||
* Memory region attributes for LPAE:
|
||||
*
|
||||
|
|
Loading…
Reference in a new issue