ARM: tegra: paz00: fix wrong UART port on mini-pcie plug
UARTC is connected to the mini-pcie port. Signed-off-by: Marc Dietrich <marvin24@gmx.de> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -46,11 +46,11 @@
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};
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serial@70006200 {
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status = "disable";
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clock-frequency = <216000000>;
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};
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serial@70006300 {
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clock-frequency = <216000000>;
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status = "disable";
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};
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serial@70006400 {
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@ -60,9 +60,9 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
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.uartclk = 216000000,
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}, {
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/* serial port on mini-pcie */
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.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
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.mapbase = TEGRA_UARTD_BASE,
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.irq = INT_UARTD,
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.membase = IO_ADDRESS(TEGRA_UARTC_BASE),
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.mapbase = TEGRA_UARTC_BASE,
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.irq = INT_UARTC,
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.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
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.type = PORT_TEGRA,
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.iotype = UPIO_MEM,
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@ -174,7 +174,7 @@ static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline,
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static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
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/* name parent rate enabled */
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{ "uarta", "pll_p", 216000000, true },
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{ "uartd", "pll_p", 216000000, true },
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{ "uartc", "pll_p", 216000000, true },
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{ "pll_p_out4", "pll_p", 24000000, true },
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{ "usbd", "clk_m", 12000000, false },
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