From 07ad1543f0394eb3587492f9a016ecbd66497490 Mon Sep 17 00:00:00 2001 From: Richard Zhu Date: Thu, 22 Aug 2019 02:25:13 -0400 Subject: [PATCH] reset: imx7: add the clkreq reset for imx8m Add the clkreq reset used by the L1ss feature on iMX8M Signed-off-by: Richard Zhu --- drivers/reset/reset-imx7.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c index 1443a55a0c29..57dad8263335 100644 --- a/drivers/reset/reset-imx7.c +++ b/drivers/reset/reset-imx7.c @@ -175,6 +175,7 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = { [IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR, BIT(2) | BIT(1) }, [IMX8MQ_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) }, + [IMX8MQ_RESET_PCIE_CTRL_APPS_CLK_REQ] = { SRC_PCIEPHY_RCR, BIT(4) }, [IMX8MQ_RESET_PCIE_CTRL_APPS_EN] = { SRC_PCIEPHY_RCR, BIT(6) }, [IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF] = { SRC_PCIEPHY_RCR, BIT(11) }, [IMX8MQ_RESET_HDMI_PHY_APB_RESET] = { SRC_HDMI_RCR, BIT(0) }, @@ -184,6 +185,7 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = { [IMX8MQ_RESET_PCIEPHY2] = { SRC_PCIE2_RCR, BIT(2) | BIT(1) }, [IMX8MQ_RESET_PCIEPHY2_PERST] = { SRC_PCIE2_RCR, BIT(3) }, + [IMX8MQ_RESET_PCIE2_CTRL_APPS_CLK_REQ] = { SRC_PCIE2_RCR, BIT(4) }, [IMX8MQ_RESET_PCIE2_CTRL_APPS_EN] = { SRC_PCIE2_RCR, BIT(6) }, [IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF] = { SRC_PCIE2_RCR, BIT(11) }, [IMX8MQ_RESET_MIPI_CSI1_CORE_RESET] = { SRC_MIPIPHY1_RCR, BIT(0) }, @@ -219,7 +221,9 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev, break; case IMX8MQ_RESET_PCIE_CTRL_APPS_EN: + case IMX8MQ_RESET_PCIE_CTRL_APPS_CLK_REQ: case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: /* fallthrough */ + case IMX8MQ_RESET_PCIE2_CTRL_APPS_CLK_REQ: case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N: /* fallthrough */ case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: /* fallthrough */ case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */