sh: Cleanup board header directories.
Now with the ide.h mess sorted out, most of these boards don't need their own directory. Move the headers out, and update the driver paths. Signed-off-by: Paul Mundt <lethal@linux-sh.org>hifive-unleashed-5.1
Paul Mundt
parent
4a58eaca7c
commit
082c44d20e
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@ -14,7 +14,7 @@
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#include <asm/io.h>
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#include <asm/apm.h>
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#include <asm/adc.h>
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#include <asm/hp6xx/hp6xx.h>
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#include <asm/hp6xx.h>
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#define SH7709_PGDR 0xa400012c
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@ -12,7 +12,7 @@
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#include <linux/time.h>
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#include <asm/io.h>
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#include <asm/hd64461.h>
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#include <asm/hp6xx/hp6xx.h>
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#include <asm/hp6xx.h>
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#include <asm/cpu/dac.h>
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#include <asm/pm.h>
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@ -13,7 +13,7 @@
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#include <asm/hd64461.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/hp6xx/hp6xx.h>
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#include <asm/hp6xx.h>
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#include <asm/cpu/dac.h>
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#define SCPCR 0xa4000116
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@ -15,7 +15,7 @@
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <asm/io.h>
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#include <asm/hs7751rvoip/hs7751rvoip.h>
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#include <asm/hs7751rvoip.h>
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#include <asm/addrspace.h>
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extern void *area6_io8_base; /* Area 6 8bit I/O Base address */
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@ -14,7 +14,7 @@
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#include <linux/irq.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/hs7751rvoip/hs7751rvoip.h>
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#include <asm/hs7751rvoip.h>
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static int mask_pos[] = {8, 9, 10, 11, 12, 13, 0, 1, 2, 3, 4, 5, 6, 7};
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@ -10,15 +10,10 @@
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/mm.h>
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#include <linux/vmalloc.h>
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#include <linux/hdreg.h>
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#include <linux/ide.h>
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#include <linux/pm.h>
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#include <asm/hs7751rvoip.h>
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#include <asm/io.h>
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#include <asm/hs7751rvoip/hs7751rvoip.h>
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#include <asm/machvec.h>
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#include <asm/rtc.h>
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#include <asm/irq.h>
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static void __init hs7751rvoip_init_irq(void)
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{
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@ -11,7 +11,7 @@
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <asm/r7780rp/r7780rp.h>
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#include <asm/r7780rp.h>
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#include <asm/addrspace.h>
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#include <asm/io.h>
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@ -10,7 +10,8 @@
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/io.h>
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#include <linux/io.h>
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#include <asm/r7780rp.h>
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#ifdef CONFIG_SH_R7780MP
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static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0};
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@ -13,7 +13,7 @@
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <asm/machvec.h>
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#include <asm/r7780rp/r7780rp.h>
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#include <asm/r7780rp.h>
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#include <asm/clock.h>
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#include <asm/io.h>
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@ -11,8 +11,8 @@
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <asm/rts7751r2d/rts7751r2d.h>
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#include <asm/io.h>
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#include <linux/io.h>
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#include <asm/rts7751r2d.h>
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#include <asm/addrspace.h>
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/*
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@ -8,12 +8,10 @@
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* Modified for RTS7751R2D by
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* Atom Create Engineering Co., Ltd. 2002.
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/rts7751r2d/rts7751r2d.h>
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#include <linux/io.h>
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#include <asm/rts7751r2d.h>
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#if defined(CONFIG_RTS7751R2D_REV11)
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static int mask_pos[] = {11, 9, 8, 12, 10, 6, 5, 4, 7, 14, 13, 0, 0, 0, 0};
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@ -8,13 +8,9 @@
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*
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* This file contains Renesas Technology Sales RTS7751R2D specific LED code.
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*/
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#include <asm/io.h>
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#include <asm/rts7751r2d/rts7751r2d.h>
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#ifdef CONFIG_HEARTBEAT
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#include <linux/io.h>
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#include <linux/sched.h>
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#include <asm/rts7751r2d.h>
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/* Cycle the LED's in the clasic Knightriger/Sun pattern */
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void heartbeat_rts7751r2d(void)
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@ -46,10 +42,3 @@ void heartbeat_rts7751r2d(void)
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else
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bit--;
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}
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#endif /* CONFIG_HEARTBEAT */
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void rts7751r2d_led(unsigned short value)
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{
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ctrl_outw(value, PA_OUTPORT);
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}
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@ -12,9 +12,9 @@
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/pm.h>
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#include <asm/io.h>
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#include <asm/machvec.h>
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#include <asm/mach/rts7751r2d.h>
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#include <asm/io.h>
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#include <asm/voyagergx.h>
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extern void heartbeat_rts7751r2d(void);
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@ -7,7 +7,7 @@
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*/
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#include <linux/init.h>
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#include <asm/machvec.h>
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#include <asm/shmin/shmin.h>
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#include <asm/shmin.h>
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#include <asm/clock.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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@ -17,29 +17,18 @@
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Copyright 2003 (c) Lineo uSolutions,Inc.
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*/
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/* -------------------------------------------------------------------- */
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#undef DEBUG
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#include <linux/sched.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <linux/io.h>
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#include <asm/voyagergx.h>
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#include <asm/rts7751r2d.h>
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static void disable_voyagergx_irq(unsigned int irq)
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{
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unsigned long val;
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unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
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pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
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pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask);
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val = inl(VOYAGER_INT_MASK);
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val &= ~mask;
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outl(val, VOYAGER_INT_MASK);
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@ -50,7 +39,7 @@ static void enable_voyagergx_irq(unsigned int irq)
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unsigned long val;
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unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
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pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask);
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pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask);
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val = inl(VOYAGER_INT_MASK);
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val |= mask;
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outl(val, VOYAGER_INT_MASK);
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@ -137,7 +126,7 @@ int voyagergx_irq_demux(int irq)
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} else {
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printk("Unexpected IRQ irq = %d status = 0x%08lx\n", irq, val);
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}
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pr_debug("voyagergx_irq_demux %d \n", i);
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pr_debug("voyagergx_irq_demux %ld\n", i);
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#else
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for (bit = 1, i = 0 ; i < VOYAGER_IRQ_NUM ; bit <<= 1, i++)
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if (val & bit)
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@ -185,4 +174,3 @@ void __init setup_voyagergx_irq(void)
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setup_irq(IRQ_VOYAGER, &irq0);
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}
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@ -13,7 +13,7 @@
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <asm/r7780rp/r7780rp.h>
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#include <asm/r7780rp.h>
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#include <asm/io.h>
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#include "pci-sh4.h"
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@ -10,28 +10,24 @@
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*
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* PCI initialization for the Renesas SH7751R RTS7751R2D board
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <linux/module.h>
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#include <asm/rts7751r2d/rts7751r2d.h>
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#include <asm/io.h>
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#include <linux/io.h>
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#include <asm/rts7751r2d.h>
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#include "pci-sh4.h"
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static u8 rts7751r2d_irq_tab[] __initdata = {
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IRQ_PCISLOT1,
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IRQ_PCISLOT2,
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IRQ_PCMCIA,
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IRQ_PCIETH,
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};
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int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
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{
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switch (slot) {
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case 0: return IRQ_PCISLOT1; /* PCI Extend slot #1 */
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case 1: return IRQ_PCISLOT2; /* PCI Extend slot #2 */
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case 2: return IRQ_PCMCIA; /* PCI Cardbus Bridge */
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case 3: return IRQ_PCIETH; /* Realtek Ethernet controller */
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default:
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printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
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return -1;
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}
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return rts7751r2d_irq_tab[slot];
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}
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static struct resource sh7751_io_resource = {
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@ -6,7 +6,7 @@
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#include <asm/io.h>
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#include <asm/delay.h>
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#include <asm/adc.h>
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#include <asm/hp6xx/hp6xx.h>
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#include <asm/hp6xx.h>
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#define MODNAME "hp680_ts_input"
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#include <asm/io.h>
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#include <asm/hd64461.h>
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#include <asm/cpu/dac.h>
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#include <asm/hp6xx/hp6xx.h>
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#define WIDTH 640
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@ -1,30 +0,0 @@
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/*
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* include/asm-sh/edosk7705/io.h
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*
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* Modified version of io_se.h for the EDOSK7705 specific functions.
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* IO functions for an Hitachi EDOSK7705 development board
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*/
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#ifndef __ASM_SH_EDOSK7705_IO_H
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#define __ASM_SH_EDOSK7705_IO_H
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#include <asm/io_generic.h>
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extern unsigned char sh_edosk7705_inb(unsigned long port);
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extern unsigned int sh_edosk7705_inl(unsigned long port);
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extern void sh_edosk7705_outb(unsigned char value, unsigned long port);
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extern void sh_edosk7705_outl(unsigned int value, unsigned long port);
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extern void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count);
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extern void sh_edosk7705_insl(unsigned long port, void *addr, unsigned long count);
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extern void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count);
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extern void sh_edosk7705_outsl(unsigned long port, const void *addr, unsigned long count);
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extern unsigned long sh_edosk7705_isa_port2addr(unsigned long offset);
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#endif /* __ASM_SH_EDOSK7705_IO_H */
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#ifndef __ASM_SH_HP6XX_H
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#define __ASM_SH_HP6XX_H
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/*
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* Copyright (C) 2003, 2004, 2005 Andriy Skulysh
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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*/
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#define HP680_BTN_IRQ IRQ0_IRQ
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#define HP680_TS_IRQ IRQ3_IRQ
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#define HP680_HD64461_IRQ IRQ4_IRQ
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#define DAC_LCD_BRIGHTNESS 0
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#define DAC_SPEAKER_VOLUME 1
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#define PGDR_OPENED 0x01
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#define PGDR_MAIN_BATTERY_OUT 0x04
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#define PGDR_PLAY_BUTTON 0x08
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#define PGDR_REWIND_BUTTON 0x10
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#define PGDR_RECORD_BUTTON 0x20
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#define PHDR_TS_PEN_DOWN 0x08
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#define PJDR_LED_BLINK 0x02
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#define PKDR_LED_GREEN 0x10
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#define SCPDR_TS_SCAN_ENABLE 0x20
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#define SCPDR_TS_SCAN_Y 0x02
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#define SCPDR_TS_SCAN_X 0x01
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#define SCPCR_TS_ENABLE 0x405
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#define SCPCR_TS_MASK 0xc0f
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#define ADC_CHANNEL_TS_Y 1
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#define ADC_CHANNEL_TS_X 2
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#define ADC_CHANNEL_BATTERY 3
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#define ADC_CHANNEL_BACKUP 4
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#define ADC_CHANNEL_CHARGE 5
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#define HD64461_GPADR_SPEAKER 0x01
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#define HD64461_GPADR_PCMCIA0 (0x02|0x08)
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#define HD64461_GPBDR_LCDOFF 0x01
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#define HD64461_GPBDR_LCD_CONTRAST_MASK 0x78
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#define HD64461_GPBDR_LED_RED 0x80
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#include <asm/hd64461.h>
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#include <asm/io.h>
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#define PJDR 0xa4000130
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#define PKDR 0xa4000132
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static inline void hp6xx_led_red(int on)
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{
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u16 v16;
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v16 = ctrl_inw(CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000);
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if (on)
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ctrl_outw(v16 & (~HD64461_GPBDR_LED_RED), CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000);
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else
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ctrl_outw(v16 | HD64461_GPBDR_LED_RED, CONFIG_HD64461_IOBASE + HD64461_GPBDR - 0x10000);
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}
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static inline void hp6xx_led_green(int on)
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{
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u8 v8;
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v8 = ctrl_inb(PKDR);
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if (on)
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ctrl_outb(v8 & (~PKDR_LED_GREEN), PKDR);
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else
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ctrl_outb(v8 | PKDR_LED_GREEN, PKDR);
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}
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#endif /* __ASM_SH_HP6XX_H */
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#ifndef __ASM_SH_HP6XX_IO_H
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#define __ASM_SH_HP6XX_IO_H
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/*
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* Nothing special here.. just use the generic cchip io routines.
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*/
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#include <asm/hd64461.h>
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#endif /* __ASM_SH_HP6XX_IO_H */
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#ifndef __ASM_SH_RENESAS_HS7751RVOIP_H
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#define __ASM_SH_RENESAS_HS7751RVOIP_H
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/*
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* linux/include/asm-sh/hs7751rvoip/hs7751rvoip.h
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*
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* Copyright (C) 2000 Atom Create Engineering Co., Ltd.
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*
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* Renesas Technology Sales HS7751RVoIP support
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*/
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|
||||
/* Box specific addresses. */
|
||||
|
||||
#define PA_BCR 0xa4000000 /* FPGA */
|
||||
#define PA_SLICCNTR1 0xa4000006 /* SLIC PIO Control 1 */
|
||||
#define PA_SLICCNTR2 0xa4000008 /* SLIC PIO Control 2 */
|
||||
#define PA_DMACNTR 0xa400000a /* USB DMA Control */
|
||||
#define PA_INPORTR 0xa400000c /* Input Port Register */
|
||||
#define PA_OUTPORTR 0xa400000e /* Output Port Reguster */
|
||||
#define PA_VERREG 0xa4000014 /* FPGA Version Register */
|
||||
|
||||
#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
|
||||
|
||||
#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
|
||||
#define IRLCNTR2 (PA_BCR + 2) /* Interrupt Control Register2 */
|
||||
#define IRLCNTR3 (PA_BCR + 4) /* Interrupt Control Register3 */
|
||||
#define IRLCNTR4 (PA_BCR + 16) /* Interrupt Control Register4 */
|
||||
#define IRLCNTR5 (PA_BCR + 18) /* Interrupt Control Register5 */
|
||||
|
||||
#define IRQ_PCIETH 6 /* PCI Ethernet IRQ */
|
||||
#define IRQ_PCIHUB 7 /* PCI Ethernet Hub IRQ */
|
||||
#define IRQ_USBCOM 8 /* USB Comunication IRQ */
|
||||
#define IRQ_USBCON 9 /* USB Connect IRQ */
|
||||
#define IRQ_USBDMA 10 /* USB DMA IRQ */
|
||||
#define IRQ_CFCARD 11 /* CF Card IRQ */
|
||||
#define IRQ_PCMCIA 12 /* PCMCIA IRQ */
|
||||
#define IRQ_PCISLOT 13 /* PCI Slot #1 IRQ */
|
||||
#define IRQ_ONHOOK1 0 /* ON HOOK1 IRQ */
|
||||
#define IRQ_OFFHOOK1 1 /* OFF HOOK1 IRQ */
|
||||
#define IRQ_ONHOOK2 2 /* ON HOOK2 IRQ */
|
||||
#define IRQ_OFFHOOK2 3 /* OFF HOOK2 IRQ */
|
||||
#define IRQ_RINGING 4 /* Ringing IRQ */
|
||||
#define IRQ_CODEC 5 /* CODEC IRQ */
|
||||
|
||||
#define __IO_PREFIX hs7751rvoip
|
||||
#include <asm/io_generic.h>
|
||||
|
||||
/* arch/sh/boards/renesas/hs7751rvoip/irq.c */
|
||||
void init_hs7751rvoip_IRQ(void);
|
||||
|
||||
/* arch/sh/boards/renesas/hs7751rvoip/io.c */
|
||||
void *hs7751rvoip_ioremap(unsigned long, unsigned long);
|
||||
|
||||
#endif /* __ASM_SH_RENESAS_HS7751RVOIP */
|
||||
|
|
@ -1,177 +0,0 @@
|
|||
#ifndef __ASM_SH_RENESAS_R7780RP_H
|
||||
#define __ASM_SH_RENESAS_R7780RP_H
|
||||
|
||||
/*
|
||||
* linux/include/asm-sh/r7780rp.h
|
||||
*
|
||||
* Copyright (C) 2000 Atom Create Engineering Co., Ltd.
|
||||
*
|
||||
* Renesas Solutions Highlander R7780RP support
|
||||
*/
|
||||
|
||||
/* Box specific addresses. */
|
||||
#if defined(CONFIG_SH_R7780MP)
|
||||
#define PA_BCR 0xa4000000 /* FPGA */
|
||||
#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
|
||||
#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
|
||||
#define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */
|
||||
#define PA_IRLPRI2 (PA_BCR+0x0006) /* Interrupt Priorty 2 */
|
||||
#define PA_IRLPRI3 (PA_BCR+0x0008) /* Interrupt Priorty 3 */
|
||||
#define PA_IRLPRI4 (PA_BCR+0x000a) /* Interrupt Priorty 4 */
|
||||
#define PA_RSTCTL (PA_BCR+0x000c) /* Reset Control */
|
||||
#define PA_PCIBD (PA_BCR+0x000e) /* PCI Board detect control */
|
||||
#define PA_PCICD (PA_BCR+0x0010) /* PCI Conector detect control */
|
||||
#define PA_EXTGIO (PA_BCR+0x0016) /* Extension GPIO Control */
|
||||
#define PA_IVDRMON (PA_BCR+0x0018) /* iVDR Moniter control */
|
||||
#define PA_IVDRCTL (PA_BCR+0x001a) /* iVDR control */
|
||||
#define PA_OBLED (PA_BCR+0x001c) /* On Board LED control */
|
||||
#define PA_OBSW (PA_BCR+0x001e) /* On Board Switch control */
|
||||
#define PA_AUDIOSEL (PA_BCR+0x0020) /* Sound Interface Select control */
|
||||
#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */
|
||||
#define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */
|
||||
#define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */
|
||||
#define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */
|
||||
#define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */
|
||||
#define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */
|
||||
#define PA_DBSW (PA_BCR+0x0200) /* Debug Board Switch control */
|
||||
#define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */
|
||||
#define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */
|
||||
#define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */
|
||||
#define PA_SCSMR0 (PA_BCR+0x0400) /* SCIF0 Serial mode control */
|
||||
#define PA_SCBRR0 (PA_BCR+0x0404) /* SCIF0 Bit rate control */
|
||||
#define PA_SCSCR0 (PA_BCR+0x0408) /* SCIF0 Serial control */
|
||||
#define PA_SCFTDR0 (PA_BCR+0x040c) /* SCIF0 Send FIFO control */
|
||||
#define PA_SCFSR0 (PA_BCR+0x0410) /* SCIF0 Serial status control */
|
||||
#define PA_SCFRDR0 (PA_BCR+0x0414) /* SCIF0 Receive FIFO control */
|
||||
#define PA_SCFCR0 (PA_BCR+0x0418) /* SCIF0 FIFO control */
|
||||
#define PA_SCTFDR0 (PA_BCR+0x041c) /* SCIF0 Send FIFO data control */
|
||||
#define PA_SCRFDR0 (PA_BCR+0x0420) /* SCIF0 Receive FIFO data control */
|
||||
#define PA_SCSPTR0 (PA_BCR+0x0424) /* SCIF0 Serial Port control */
|
||||
#define PA_SCLSR0 (PA_BCR+0x0428) /* SCIF0 Line Status control */
|
||||
#define PA_SCRER0 (PA_BCR+0x042c) /* SCIF0 Serial Error control */
|
||||
#define PA_SCSMR1 (PA_BCR+0x0500) /* SCIF1 Serial mode control */
|
||||
#define PA_SCBRR1 (PA_BCR+0x0504) /* SCIF1 Bit rate control */
|
||||
#define PA_SCSCR1 (PA_BCR+0x0508) /* SCIF1 Serial control */
|
||||
#define PA_SCFTDR1 (PA_BCR+0x050c) /* SCIF1 Send FIFO control */
|
||||
#define PA_SCFSR1 (PA_BCR+0x0510) /* SCIF1 Serial status control */
|
||||
#define PA_SCFRDR1 (PA_BCR+0x0514) /* SCIF1 Receive FIFO control */
|
||||
#define PA_SCFCR1 (PA_BCR+0x0518) /* SCIF1 FIFO control */
|
||||
#define PA_SCTFDR1 (PA_BCR+0x051c) /* SCIF1 Send FIFO data control */
|
||||
#define PA_SCRFDR1 (PA_BCR+0x0520) /* SCIF1 Receive FIFO data control */
|
||||
#define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */
|
||||
#define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */
|
||||
#define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */
|
||||
#define PA_ICCR (PA_BCR+0x0600) /* Serial control */
|
||||
#define PA_SAR (PA_BCR+0x0602) /* Serial Slave control */
|
||||
#define PA_MDR (PA_BCR+0x0604) /* Serial Mode control */
|
||||
#define PA_ADR1 (PA_BCR+0x0606) /* Serial Address1 control */
|
||||
#define PA_DAR1 (PA_BCR+0x0646) /* Serial Data1 control */
|
||||
#define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */
|
||||
#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */
|
||||
#define PA_PMR (PA_BCR+0x0900) /* */
|
||||
|
||||
#define PA_AX88796L 0xa4100400 /* AX88796L Area */
|
||||
#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */
|
||||
#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
|
||||
#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
|
||||
#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
|
||||
#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
|
||||
|
||||
#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
|
||||
|
||||
#define IRQ_PCISLOT1 65 /* PCI Slot #1 IRQ */
|
||||
#define IRQ_PCISLOT2 66 /* PCI Slot #2 IRQ */
|
||||
#define IRQ_PCISLOT3 67 /* PCI Slot #3 IRQ */
|
||||
#define IRQ_PCISLOT4 68 /* PCI Slot #4 IRQ */
|
||||
#define IRQ_CFCARD 1 /* CF Card IRQ */
|
||||
// #define IRQ_CFINST 0 /* CF Card Insert IRQ */
|
||||
#define IRQ_TP 2 /* Touch Panel IRQ */
|
||||
#define IRQ_SCI1 3 /* SCI1 IRQ */
|
||||
#define IRQ_SCI0 4 /* SCI0 IRQ */
|
||||
#define IRQ_2SERIAL 5 /* Serial IRQ */
|
||||
#define IRQ_RTC 6 /* RTC A / B IRQ */
|
||||
#define IRQ_EXTENTION6 7 /* EXT6n IRQ */
|
||||
#define IRQ_EXTENTION5 8 /* EXT5n IRQ */
|
||||
#define IRQ_EXTENTION4 9 /* EXT4n IRQ */
|
||||
#define IRQ_EXTENTION2 10 /* EXT2n IRQ */
|
||||
#define IRQ_EXTENTION1 11 /* EXT1n IRQ */
|
||||
#define IRQ_ONETH 13 /* On board Ethernet IRQ */
|
||||
#define IRQ_PSW 14 /* Push Switch IRQ */
|
||||
|
||||
#else /* R7780RP */
|
||||
|
||||
#define PA_BCR 0xa5000000 /* FPGA */
|
||||
#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
|
||||
#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
|
||||
#define PA_SDPOW (PA_BCR+0x0004) /* SD Power control */
|
||||
#define PA_RSTCTL (PA_BCR+0x0006) /* Device Reset control */
|
||||
#define PA_PCIBD (PA_BCR+0x0008) /* PCI Board detect control */
|
||||
#define PA_PCICD (PA_BCR+0x000a) /* PCI Conector detect control */
|
||||
#define PA_ZIGIO1 (PA_BCR+0x000c) /* Zigbee IO control 1 */
|
||||
#define PA_ZIGIO2 (PA_BCR+0x000e) /* Zigbee IO control 2 */
|
||||
#define PA_ZIGIO3 (PA_BCR+0x0010) /* Zigbee IO control 3 */
|
||||
#define PA_ZIGIO4 (PA_BCR+0x0012) /* Zigbee IO control 4 */
|
||||
#define PA_IVDRMON (PA_BCR+0x0014) /* iVDR Moniter control */
|
||||
#define PA_IVDRCTL (PA_BCR+0x0016) /* iVDR control */
|
||||
#define PA_OBLED (PA_BCR+0x0018) /* On Board LED control */
|
||||
#define PA_OBSW (PA_BCR+0x001a) /* On Board Switch control */
|
||||
#define PA_AUDIOSEL (PA_BCR+0x001c) /* Sound Interface Select control */
|
||||
#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */
|
||||
#define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */
|
||||
#define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */
|
||||
#define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */
|
||||
#define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */
|
||||
#define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */
|
||||
#define PA_DBDET (PA_BCR+0x0200) /* Debug Board detect control */
|
||||
#define PA_DBDISPCTL (PA_BCR+0x0202) /* Debug Board Dot timing control */
|
||||
#define PA_DBSW (PA_BCR+0x0204) /* Debug Board Switch control */
|
||||
#define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */
|
||||
#define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */
|
||||
#define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */
|
||||
#define PA_SCSMR (PA_BCR+0x0400) /* SCIF Serial mode control */
|
||||
#define PA_SCBRR (PA_BCR+0x0402) /* SCIF Bit rate control */
|
||||
#define PA_SCSCR (PA_BCR+0x0404) /* SCIF Serial control */
|
||||
#define PA_SCFDTR (PA_BCR+0x0406) /* SCIF Send FIFO control */
|
||||
#define PA_SCFSR (PA_BCR+0x0408) /* SCIF Serial status control */
|
||||
#define PA_SCFRDR (PA_BCR+0x040a) /* SCIF Receive FIFO control */
|
||||
#define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */
|
||||
#define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */
|
||||
#define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */
|
||||
#define PA_ICCR (PA_BCR+0x0500) /* Serial control */
|
||||
#define PA_SAR (PA_BCR+0x0502) /* Serial Slave control */
|
||||
#define PA_MDR (PA_BCR+0x0504) /* Serial Mode control */
|
||||
#define PA_ADR1 (PA_BCR+0x0506) /* Serial Address1 control */
|
||||
#define PA_DAR1 (PA_BCR+0x0546) /* Serial Data1 control */
|
||||
#define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */
|
||||
|
||||
#define PA_AX88796L 0xa5800400 /* AX88796L Area */
|
||||
#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */
|
||||
#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */
|
||||
#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */
|
||||
#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
|
||||
#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
|
||||
|
||||
#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
|
||||
|
||||
#define IRQ_PCISLOT1 0 /* PCI Slot #1 IRQ */
|
||||
#define IRQ_PCISLOT2 1 /* PCI Slot #2 IRQ */
|
||||
#define IRQ_PCISLOT3 2 /* PCI Slot #3 IRQ */
|
||||
#define IRQ_PCISLOT4 3 /* PCI Slot #4 IRQ */
|
||||
#define IRQ_CFCARD 4 /* CF Card IRQ */
|
||||
#define IRQ_CFINST 5 /* CF Card Insert IRQ */
|
||||
#define IRQ_M66596 6 /* M66596 IRQ */
|
||||
#define IRQ_SDCARD 7 /* SD Card IRQ */
|
||||
#define IRQ_TUCHPANEL 8 /* Touch Panel IRQ */
|
||||
#define IRQ_SCI 9 /* SCI IRQ */
|
||||
#define IRQ_2SERIAL 10 /* Serial IRQ */
|
||||
#define IRQ_EXTENTION 11 /* EXTn IRQ */
|
||||
#define IRQ_ONETH 12 /* On board Ethernet IRQ */
|
||||
#define IRQ_PSW 13 /* Push Switch IRQ */
|
||||
#define IRQ_ZIGBEE 14 /* Ziggbee IO IRQ */
|
||||
|
||||
#endif /* CONFIG_SH_R7780MP */
|
||||
|
||||
#define __IO_PREFIX r7780rp
|
||||
#include <asm/io_generic.h>
|
||||
|
||||
#endif /* __ASM_SH_RENESAS_R7780RP */
|
||||
|
|
@ -1,74 +0,0 @@
|
|||
#ifndef __ASM_SH_RENESAS_RTS7751R2D_H
|
||||
#define __ASM_SH_RENESAS_RTS7751R2D_H
|
||||
|
||||
/*
|
||||
* linux/include/asm-sh/renesas_rts7751r2d.h
|
||||
*
|
||||
* Copyright (C) 2000 Atom Create Engineering Co., Ltd.
|
||||
*
|
||||
* Renesas Technology Sales RTS7751R2D support
|
||||
*/
|
||||
|
||||
/* Box specific addresses. */
|
||||
|
||||
#define PA_BCR 0xa4000000 /* FPGA */
|
||||
#define PA_IRLMON 0xa4000002 /* Interrupt Status control */
|
||||
#define PA_CFCTL 0xa4000004 /* CF Timing control */
|
||||
#define PA_CFPOW 0xa4000006 /* CF Power control */
|
||||
#define PA_DISPCTL 0xa4000008 /* Display Timing control */
|
||||
#define PA_SDMPOW 0xa400000a /* SD Power control */
|
||||
#define PA_RTCCE 0xa400000c /* RTC(9701) Enable control */
|
||||
#define PA_PCICD 0xa400000e /* PCI Extention detect control */
|
||||
#define PA_VOYAGERRTS 0xa4000020 /* VOYAGER Reset control */
|
||||
#if defined(CONFIG_RTS7751R2D_REV11)
|
||||
#define PA_AXRST 0xa4000022 /* AX_LAN Reset control */
|
||||
#define PA_CFRST 0xa4000024 /* CF Reset control */
|
||||
#define PA_ADMRTS 0xa4000026 /* SD Reset control */
|
||||
#define PA_EXTRST 0xa4000028 /* Extention Reset control */
|
||||
#define PA_CFCDINTCLR 0xa400002a /* CF Insert Interrupt clear */
|
||||
#else
|
||||
#define PA_CFRST 0xa4000022 /* CF Reset control */
|
||||
#define PA_ADMRTS 0xa4000024 /* SD Reset control */
|
||||
#define PA_EXTRST 0xa4000026 /* Extention Reset control */
|
||||
#define PA_CFCDINTCLR 0xa4000028 /* CF Insert Interrupt clear */
|
||||
#define PA_KEYCTLCLR 0xa400002a /* Key Interrupt clear */
|
||||
#endif
|
||||
#define PA_POWOFF 0xa4000030 /* Board Power OFF control */
|
||||
#define PA_VERREG 0xa4000032 /* FPGA Version Register */
|
||||
#define PA_INPORT 0xa4000034 /* KEY Input Port control */
|
||||
#define PA_OUTPORT 0xa4000036 /* LED control */
|
||||
#define PA_DMPORT 0xa4000038 /* DM270 Output Port control */
|
||||
|
||||
#define PA_AX88796L 0xaa000400 /* AX88796L Area */
|
||||
#define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */
|
||||
#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
|
||||
#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
|
||||
|
||||
#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
|
||||
|
||||
#if defined(CONFIG_RTS7751R2D_REV11)
|
||||
#define IRQ_PCIETH 0 /* PCI Ethernet IRQ */
|
||||
#define IRQ_CFCARD 1 /* CF Card IRQ */
|
||||
#define IRQ_CFINST 2 /* CF Card Insert IRQ */
|
||||
#define IRQ_PCMCIA 3 /* PCMCIA IRQ */
|
||||
#define IRQ_VOYAGER 4 /* VOYAGER IRQ */
|
||||
#define IRQ_ONETH 5 /* On board Ethernet IRQ */
|
||||
#else
|
||||
#define IRQ_KEYIN 0 /* Key Input IRQ */
|
||||
#define IRQ_PCIETH 1 /* PCI Ethernet IRQ */
|
||||
#define IRQ_CFCARD 2 /* CF Card IRQ */
|
||||
#define IRQ_CFINST 3 /* CF Card Insert IRQ */
|
||||
#define IRQ_PCMCIA 4 /* PCMCIA IRQ */
|
||||
#define IRQ_VOYAGER 5 /* VOYAGER IRQ */
|
||||
#endif
|
||||
#define IRQ_RTCALM 6 /* RTC Alarm IRQ */
|
||||
#define IRQ_RTCTIME 7 /* RTC Timer IRQ */
|
||||
#define IRQ_SDCARD 8 /* SD Card IRQ */
|
||||
#define IRQ_PCISLOT1 9 /* PCI Slot #1 IRQ */
|
||||
#define IRQ_PCISLOT2 10 /* PCI Slot #2 IRQ */
|
||||
#define IRQ_EXTENTION 11 /* EXTn IRQ */
|
||||
|
||||
#define __IO_PREFIX rts7751r2d
|
||||
#include <asm/io_generic.h>
|
||||
|
||||
#endif /* __ASM_SH_RENESAS_RTS7751R2D */
|
||||
|
|
@ -1,9 +0,0 @@
|
|||
#ifndef __ASM_SH_SHMIN_H
|
||||
#define __ASM_SH_SHMIN_H
|
||||
|
||||
#define SHMIN_IO_BASE 0xb0000000UL
|
||||
|
||||
#define SHMIN_NE_IRQ IRQ2_IRQ
|
||||
#define SHMIN_NE_BASE 0x300
|
||||
|
||||
#endif
|
||||
|
|
@ -26,7 +26,7 @@
|
|||
#include <asm/cpu/dac.h>
|
||||
#include <asm/cpu/timer.h>
|
||||
#include <asm/machvec.h>
|
||||
#include <asm/hp6xx/hp6xx.h>
|
||||
#include <asm/hp6xx.h>
|
||||
#include <asm/hd64461.h>
|
||||
|
||||
#define MODNAME "sh_dac_audio"
|
||||
|
|
|
|||
Loading…
Reference in New Issue