Immutable branch between MFD and ARM OMAP due for v3.16 merge-window.
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTV9ADAAoJEFGvii+H/HdhPhkP/1Xoc6APceeJaX8jOmx0rxzQ PhYl3er5b3eYtxgGR8s8FrdVrYNyEytGZtMoQN3EYhVnq/ZvbPkR8zMruDszUHYP PBfcZJi4GBJIAQU30a8Dvla8UtFaph+IoxSd6E4hSIvb+UFjSvi9ZjQYX82gFop4 TLeAPW4byQP2YKSkDUq5WzzMLbjQ+ZanJSrueYXmu4VOVgtA0+nBWVj5B8PD1m+O 2Sp2vhdCPCgIsChQZl3i9h2HroUtomnNWeCdv0YzOwISlvUv+aBg7khK35Jtw7v3 YeAx3YelQ3z2dnFS/ddEvLKthuTV5BfyGq+dJjMwBLrOv81rzHFBYLCRiABB0RgD EUEAv3IJ31SpjrsO0uXnGFp69gMsJgOwLRcjM8TfUi+Wd4YQcbl/tCYX2k7voJ6u fbpqarr1zgZpV7r1cX2ivsm8VY2bzQ7p2Dh681oQtHyM+RC94dVvGS0cAaVlnhYY MtJWEdtpY3hRcx5qVE8+8wf5RYyXjluhme1EGhO8VL13hMw7ofmtfl2OKN4WAsYO KIDMTVJ9RneUQQ6FOx270x17Gp01vxoHIV6pBMi7Uo65l7xrs2YEfgUJhp4eCVXT dD4appF5q090UwD7lYADztQZ8RB5GLELZH6Vkpw3qPtfqM97zSy9IFMzTxn446ic vdktkG6GJab2vg3mLxDf =izRQ -----END PGP SIGNATURE----- Merge tag 'ib-mfd-omap-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into omap-for-v3.16/pm Immutable branch between MFD and ARM OMAP due for v3.16 merge-window.hifive-unleashed-5.1
Tony Lindgren
commit
08eb9a8c8a
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@ -46,15 +46,8 @@
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static bool is_offset_valid;
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static u8 smps_offset;
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/*
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* Flag to ensure Smartreflex bit in TWL
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* being cleared in board file is not overwritten.
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*/
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static bool __initdata twl_sr_enable_autoinit;
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#define TWL4030_DCDC_GLOBAL_CFG 0x06
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#define REG_SMPS_OFFSET 0xE0
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#define SMARTREFLEX_ENABLE BIT(3)
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static unsigned long twl4030_vsel_to_uv(const u8 vsel)
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{
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@ -251,18 +244,6 @@ int __init omap3_twl_init(void)
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if (!cpu_is_omap34xx())
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return -ENODEV;
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/*
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* The smartreflex bit on twl4030 specifies if the setting of voltage
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* is done over the I2C_SR path. Since this setting is independent of
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* the actual usage of smartreflex AVS module, we enable TWL SR bit
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* by default irrespective of whether smartreflex AVS module is enabled
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* on the OMAP side or not. This is because without this bit enabled,
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* the voltage scaling through vp forceupdate/bypass mechanism of
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* voltage scaling will not function on TWL over I2C_SR.
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*/
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if (!twl_sr_enable_autoinit)
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omap3_twl_set_sr_bit(true);
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voltdm = voltdm_lookup("mpu_iva");
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omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic);
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@ -271,44 +252,3 @@ int __init omap3_twl_init(void)
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return 0;
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}
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/**
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* omap3_twl_set_sr_bit() - Set/Clear SR bit on TWL
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* @enable: enable SR mode in twl or not
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*
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* If 'enable' is true, enables Smartreflex bit on TWL 4030 to make sure
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* voltage scaling through OMAP SR works. Else, the smartreflex bit
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* on twl4030 is cleared as there are platforms which use OMAP3 and T2 but
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* use Synchronized Scaling Hardware Strategy (ENABLE_VMODE=1) and Direct
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* Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages,
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* in those scenarios this bit is to be cleared (enable = false).
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*
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* Returns 0 on success, error is returned if I2C read/write fails.
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*/
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int __init omap3_twl_set_sr_bit(bool enable)
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{
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u8 temp;
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int ret;
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if (twl_sr_enable_autoinit)
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pr_warning("%s: unexpected multiple calls\n", __func__);
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ret = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp,
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TWL4030_DCDC_GLOBAL_CFG);
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if (ret)
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goto err;
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if (enable)
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temp |= SMARTREFLEX_ENABLE;
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else
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temp &= ~SMARTREFLEX_ENABLE;
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ret = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp,
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TWL4030_DCDC_GLOBAL_CFG);
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if (!ret) {
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twl_sr_enable_autoinit = true;
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return 0;
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}
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err:
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pr_err("%s: Error access to TWL4030 (%d)\n", __func__, ret);
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return ret;
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}
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@ -98,7 +98,11 @@
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#define TWL4030_BASEADD_BACKUP 0x0014
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#define TWL4030_BASEADD_INT 0x002E
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#define TWL4030_BASEADD_PM_MASTER 0x0036
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#define TWL4030_BASEADD_PM_RECEIVER 0x005B
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#define TWL4030_DCDC_GLOBAL_CFG 0x06
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#define SMARTREFLEX_ENABLE BIT(3)
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#define TWL4030_BASEADD_RTC 0x001C
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#define TWL4030_BASEADD_SECURED_REG 0x0000
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@ -1204,6 +1208,11 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
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* Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
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* Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
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* SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
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*
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* Also, always enable SmartReflex bit as that's needed for omaps to
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* to do anything over I2C4 for voltage scaling even if SmartReflex
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* is disabled. Without the SmartReflex bit omap sys_clkreq idle
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* signal will never trigger for retention idle.
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*/
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if (twl_class_is_4030()) {
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u8 temp;
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@ -1212,6 +1221,12 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
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temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
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I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
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twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
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twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp,
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TWL4030_DCDC_GLOBAL_CFG);
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temp |= SMARTREFLEX_ENABLE;
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twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp,
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TWL4030_DCDC_GLOBAL_CFG);
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}
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if (node) {
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