ARM: tegra: timer: Add idle and suspend support to timers
Implement read_persistent_clock by reading the Tegra RTC registers that stay running during suspend. Save and restore the timer configuration register in suspend. Signed-off-by: Colin Cross <ccross@android.com>hifive-unleashed-5.1
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3c3895b4bf
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093617851c
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@ -38,6 +38,10 @@
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#include "board.h"
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#include "board.h"
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#include "clock.h"
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#include "clock.h"
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#define RTC_SECONDS 0x08
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#define RTC_SHADOW_SECONDS 0x0c
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#define RTC_MILLISECONDS 0x10
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#define TIMERUS_CNTR_1US 0x10
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#define TIMERUS_CNTR_1US 0x10
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#define TIMERUS_USEC_CFG 0x14
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#define TIMERUS_USEC_CFG 0x14
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#define TIMERUS_CNTR_FREEZE 0x4c
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#define TIMERUS_CNTR_FREEZE 0x4c
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@ -50,9 +54,11 @@
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#define TIMER_PTV 0x0
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#define TIMER_PTV 0x0
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#define TIMER_PCR 0x4
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#define TIMER_PCR 0x4
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struct tegra_timer;
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static void __iomem *timer_reg_base = IO_ADDRESS(TEGRA_TMR1_BASE);
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static void __iomem *timer_reg_base = IO_ADDRESS(TEGRA_TMR1_BASE);
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static void __iomem *rtc_base = IO_ADDRESS(TEGRA_RTC_BASE);
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static struct timespec persistent_ts;
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static u64 persistent_ms, last_persistent_ms;
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#define timer_writel(value, reg) \
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#define timer_writel(value, reg) \
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__raw_writel(value, (u32)timer_reg_base + (reg))
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__raw_writel(value, (u32)timer_reg_base + (reg))
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@ -133,6 +139,42 @@ static void notrace tegra_update_sched_clock(void)
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update_sched_clock(&cd, cyc, (u32)~0);
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update_sched_clock(&cd, cyc, (u32)~0);
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}
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}
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/*
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* tegra_rtc_read - Reads the Tegra RTC registers
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* Care must be taken that this funciton is not called while the
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* tegra_rtc driver could be executing to avoid race conditions
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* on the RTC shadow register
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*/
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u64 tegra_rtc_read_ms(void)
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{
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u32 ms = readl(rtc_base + RTC_MILLISECONDS);
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u32 s = readl(rtc_base + RTC_SHADOW_SECONDS);
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return (u64)s * MSEC_PER_SEC + ms;
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}
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/*
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* read_persistent_clock - Return time from a persistent clock.
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*
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* Reads the time from a source which isn't disabled during PM, the
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* 32k sync timer. Convert the cycles elapsed since last read into
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* nsecs and adds to a monotonically increasing timespec.
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* Care must be taken that this funciton is not called while the
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* tegra_rtc driver could be executing to avoid race conditions
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* on the RTC shadow register
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*/
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void read_persistent_clock(struct timespec *ts)
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{
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u64 delta;
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struct timespec *tsp = &persistent_ts;
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last_persistent_ms = persistent_ms;
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persistent_ms = tegra_rtc_read_ms();
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delta = persistent_ms - last_persistent_ms;
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timespec_add_ns(tsp, delta * NSEC_PER_MSEC);
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*ts = *tsp;
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}
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static irqreturn_t tegra_timer_interrupt(int irq, void *dev_id)
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static irqreturn_t tegra_timer_interrupt(int irq, void *dev_id)
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{
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{
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struct clock_event_device *evt = (struct clock_event_device *)dev_id;
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struct clock_event_device *evt = (struct clock_event_device *)dev_id;
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@ -204,3 +246,17 @@ static void __init tegra_init_timer(void)
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struct sys_timer tegra_timer = {
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struct sys_timer tegra_timer = {
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.init = tegra_init_timer,
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.init = tegra_init_timer,
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};
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};
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#ifdef CONFIG_PM
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static u32 usec_config;
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void tegra_timer_suspend(void)
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{
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usec_config = timer_readl(TIMERUS_USEC_CFG);
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}
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void tegra_timer_resume(void)
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{
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timer_writel(usec_config, TIMERUS_USEC_CFG);
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}
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#endif
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