Pin control fixes for the v4.6 series:
- Make the i.MX driver select REGMAP as a dependency - Fix up the Mediatek debounce time unit - Fix a real hairy ffs vs __ffs issue in the Single pinctrl driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXGml+AAoJEEEQszewGV1zw3cP/iF2PvVwmf/tbKqlBjLlIF5g NYu3YCI8GaRCm8IQBviW9coZIumUH/joWFK58igdm0+vbtW6mschqVsRWUThRFb8 g+PiqZHRg9FhZWpBadQyVJ2rm3fji073CvFgJjWJr11d2dvuxkGfOoHc4Xt5RHop hx2a0mzgzXp3JmWH9rYbu+G3nSTyYNQ346sk7yr9hRGuGus/xaJGy9QBIVp2BxYd poy+Z5O2cpMQzlQRGda87MmIDVo0BP01rzCdovxtbYULDX3UVzgPeg2L/KYG09It 5ONRze4B1GVwhd5skkN0ZU/LA2aPJYkRVkQttHDq1sk7MCYBPKTTTSK7fKAuQWwk u3UclCJgHpcIY0hhB92SQhgOCo2N0nd7NjLuftyteR6+tmKT2TGISNHOF24lSA5K GmpbzuhKaYNlchJPsa0bECXEoe0HM1sLhAAczebxjnsQ1y3UP+sY5yBiM7oYCJBh cj/qODn+QlF0TxN1ceLJ3Vxj2pZduC1g18WV//UnNMoRCjIVkBedeiydA5J0swji n9we5UhbNv2HlMawTwpZP/FXacVmswv6e4lL9dMO57NRSfm5CBhZW8kzfqRH5vpS e6ImwEqRA1z/Y+6Tyfieym//Vq/rz57GLwXqFH1pkIpnKH52Wy7oY5OCfq3bGLMX RH09KkGdv+DXwWN9fq+H =xIao -----END PGP SIGNATURE----- Merge tag 'pinctrl-v4.6-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "Some pin control driver fixes came in. One headed for stable and the other two are just ordinary merge window fixes. - Make the i.MX driver select REGMAP as a dependency - Fix up the Mediatek debounce time unit - Fix a real hairy ffs vs __ffs issue in the Single pinctrl driver" * tag 'pinctrl-v4.6-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: single: Fix pcs_parse_bits_in_pinctrl_entry to use __ffs than ffs pinctrl: mediatek: correct debounce time unit in mtk_gpio_set_debounce pinctrl: imx: Kconfig: PINCTRL_IMX select REGMAP
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commit
09502d9fff
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@ -2,6 +2,7 @@ config PINCTRL_IMX
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bool
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select PINMUX
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select PINCONF
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select REGMAP
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config PINCTRL_IMX1_CORE
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bool
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@ -1004,7 +1004,8 @@ static int mtk_gpio_set_debounce(struct gpio_chip *chip, unsigned offset,
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struct mtk_pinctrl *pctl = dev_get_drvdata(chip->parent);
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int eint_num, virq, eint_offset;
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unsigned int set_offset, bit, clr_bit, clr_offset, rst, i, unmask, dbnc;
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static const unsigned int dbnc_arr[] = {0 , 1, 16, 32, 64, 128, 256};
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static const unsigned int debounce_time[] = {500, 1000, 16000, 32000, 64000,
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128000, 256000};
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const struct mtk_desc_pin *pin;
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struct irq_data *d;
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@ -1022,9 +1023,9 @@ static int mtk_gpio_set_debounce(struct gpio_chip *chip, unsigned offset,
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if (!mtk_eint_can_en_debounce(pctl, eint_num))
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return -ENOSYS;
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dbnc = ARRAY_SIZE(dbnc_arr);
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for (i = 0; i < ARRAY_SIZE(dbnc_arr); i++) {
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if (debounce <= dbnc_arr[i]) {
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dbnc = ARRAY_SIZE(debounce_time);
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for (i = 0; i < ARRAY_SIZE(debounce_time); i++) {
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if (debounce <= debounce_time[i]) {
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dbnc = i;
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break;
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}
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@ -1280,9 +1280,9 @@ static int pcs_parse_bits_in_pinctrl_entry(struct pcs_device *pcs,
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/* Parse pins in each row from LSB */
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while (mask) {
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bit_pos = ffs(mask);
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bit_pos = __ffs(mask);
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pin_num_from_lsb = bit_pos / pcs->bits_per_pin;
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mask_pos = ((pcs->fmask) << (bit_pos - 1));
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mask_pos = ((pcs->fmask) << bit_pos);
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val_pos = val & mask_pos;
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submask = mask & mask_pos;
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@ -1852,7 +1852,7 @@ static int pcs_probe(struct platform_device *pdev)
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ret = of_property_read_u32(np, "pinctrl-single,function-mask",
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&pcs->fmask);
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if (!ret) {
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pcs->fshift = ffs(pcs->fmask) - 1;
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pcs->fshift = __ffs(pcs->fmask);
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pcs->fmax = pcs->fmask >> pcs->fshift;
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} else {
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/* If mask property doesn't exist, function mux is invalid. */
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