clk: actions: Add Actions Semi Owl SoCs Reset Management Unit support
Add Reset Management Unit (RMU) support for Actions Semi Owl SoCs. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>hifive-unleashed-5.1
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a35bcf7c7f
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09dbde0154
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@ -2,6 +2,7 @@ config CLK_ACTIONS
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bool "Clock driver for Actions Semi SoCs"
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bool "Clock driver for Actions Semi SoCs"
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depends on ARCH_ACTIONS || COMPILE_TEST
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depends on ARCH_ACTIONS || COMPILE_TEST
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select REGMAP_MMIO
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select REGMAP_MMIO
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select RESET_CONTROLLER
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default ARCH_ACTIONS
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default ARCH_ACTIONS
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if CLK_ACTIONS
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if CLK_ACTIONS
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@ -7,6 +7,7 @@ clk-owl-y += owl-divider.o
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clk-owl-y += owl-factor.o
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clk-owl-y += owl-factor.o
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clk-owl-y += owl-composite.o
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clk-owl-y += owl-composite.o
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clk-owl-y += owl-pll.o
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clk-owl-y += owl-pll.o
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clk-owl-y += owl-reset.o
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# SoC support
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# SoC support
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obj-$(CONFIG_CLK_OWL_S700) += owl-s700.o
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obj-$(CONFIG_CLK_OWL_S700) += owl-s700.o
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@ -26,6 +26,8 @@ struct owl_clk_desc {
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struct owl_clk_common **clks;
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struct owl_clk_common **clks;
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unsigned long num_clks;
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unsigned long num_clks;
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struct clk_hw_onecell_data *hw_clks;
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struct clk_hw_onecell_data *hw_clks;
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const struct owl_reset_map *resets;
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unsigned long num_resets;
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struct regmap *regmap;
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struct regmap *regmap;
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};
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};
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@ -0,0 +1,66 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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//
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// Actions Semi Owl SoCs Reset Management Unit driver
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//
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// Copyright (c) 2018 Linaro Ltd.
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// Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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#include <linux/delay.h>
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#include <linux/regmap.h>
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#include <linux/reset-controller.h>
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#include "owl-reset.h"
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static int owl_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct owl_reset *reset = to_owl_reset(rcdev);
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const struct owl_reset_map *map = &reset->reset_map[id];
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return regmap_update_bits(reset->regmap, map->reg, map->bit, 0);
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}
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static int owl_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct owl_reset *reset = to_owl_reset(rcdev);
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const struct owl_reset_map *map = &reset->reset_map[id];
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return regmap_update_bits(reset->regmap, map->reg, map->bit, map->bit);
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}
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static int owl_reset_reset(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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owl_reset_assert(rcdev, id);
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udelay(1);
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owl_reset_deassert(rcdev, id);
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return 0;
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}
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static int owl_reset_status(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct owl_reset *reset = to_owl_reset(rcdev);
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const struct owl_reset_map *map = &reset->reset_map[id];
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u32 reg;
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int ret;
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ret = regmap_read(reset->regmap, map->reg, ®);
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if (ret)
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return ret;
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/*
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* The reset control API expects 0 if reset is not asserted,
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* which is the opposite of what our hardware uses.
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*/
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return !(map->bit & reg);
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}
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const struct reset_control_ops owl_reset_ops = {
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.assert = owl_reset_assert,
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.deassert = owl_reset_deassert,
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.reset = owl_reset_reset,
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.status = owl_reset_status,
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};
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@ -0,0 +1,31 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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//
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// Actions Semi Owl SoCs Reset Management Unit driver
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//
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// Copyright (c) 2018 Linaro Ltd.
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// Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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#ifndef _OWL_RESET_H_
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#define _OWL_RESET_H_
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#include <linux/reset-controller.h>
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struct owl_reset_map {
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u32 reg;
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u32 bit;
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};
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struct owl_reset {
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struct reset_controller_dev rcdev;
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const struct owl_reset_map *reset_map;
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struct regmap *regmap;
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};
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static inline struct owl_reset *to_owl_reset(struct reset_controller_dev *rcdev)
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{
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return container_of(rcdev, struct owl_reset, rcdev);
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}
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extern const struct reset_control_ops owl_reset_ops;
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#endif /* _OWL_RESET_H_ */
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