From 9956b94eea28d8f70c7d304d3accc4fc64eb81f5 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 19 Dec 2019 21:20:44 +0100 Subject: [PATCH 1/8] ARM: dts: ux500: Remove unused ste-href-ab8505.dtsi The pin configuration for HREF boards with AB8505 was added in commit 77ad9dfc2c7e ("ARM: ux500: move last AB8505 set-up to DT"). As the commit message notes, it was unused back then and it has remained so even today, especially considering AB8505 did not have proper device tree support until recently. We are now preparing to add support for some Samsung smartphones that are using AB8505. However, they use different pin configs because using ste-href-ab8505.dtsi is known to break UART. There were not many HREFs with AB8505, so at this point it seems unlikely that we will ever make use of this include. Remove it. Signed-off-by: Stephan Gerhold Link: https://lore.kernel.org/r/20191219202052.19039-2-stephan@gerhold.net Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-href-ab8505.dtsi | 234 ------------------------- 1 file changed, 234 deletions(-) delete mode 100644 arch/arm/boot/dts/ste-href-ab8505.dtsi diff --git a/arch/arm/boot/dts/ste-href-ab8505.dtsi b/arch/arm/boot/dts/ste-href-ab8505.dtsi deleted file mode 100644 index 95cf38a008e9..000000000000 --- a/arch/arm/boot/dts/ste-href-ab8505.dtsi +++ /dev/null @@ -1,234 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Copyright 2014 Linaro Ltd. - */ - -/ { - soc { - prcmu@80157000 { - ab8505 { - ab8505-gpio { - /* Hog a few default settings */ - pinctrl-names = "default"; - pinctrl-0 = <&gpio2_default_mode>, - <&gpio10_default_mode>, - <&gpio11_default_mode>, - <&gpio13_default_mode>, - <&gpio34_default_mode>, - <&gpio50_default_mode>, - <&pwm_default_mode>, - <&adi2_default_mode>, - <&modsclsda_default_mode>, - <&resethw_default_mode>, - <&service_default_mode>; - - /* - * Pins 2, 10, 11, 13, 34 and 50 - * are muxed in as GPIO, and configured as INPUT PULL DOWN - */ - gpio2 { - gpio2_default_mode: gpio2_default { - default_mux { - function = "gpio"; - groups = "gpio2_a_1"; - }; - default_cfg { - pins = "GPIO2_R5"; - input-enable; - bias-pull-down; - }; - }; - }; - gpio10 { - gpio10_default_mode: gpio10_default { - default_mux { - function = "gpio"; - groups = "gpio10_d_1"; - }; - default_cfg { - pins = "GPIO10_B16"; - input-enable; - bias-pull-down; - }; - }; - }; - gpio11 { - gpio11_default_mode: gpio11_default { - default_mux { - function = "gpio"; - groups = "gpio11_d_1"; - }; - default_cfg { - pins = "GPIO11_B17"; - input-enable; - bias-pull-down; - }; - }; - }; - gpio13 { - gpio13_default_mode: gpio13_default { - default_mux { - function = "gpio"; - groups = "gpio13_d_1"; - }; - default_cfg { - pins = "GPIO13_D17"; - input-enable; - bias-disable; - }; - }; - }; - gpio34 { - gpio34_default_mode: gpio34_default { - default_mux { - function = "gpio"; - groups = "gpio34_a_1"; - }; - default_cfg { - pins = "GPIO34_H14"; - input-enable; - bias-pull-down; - }; - }; - }; - gpio50 { - gpio50_default_mode: gpio50_default { - default_mux { - function = "gpio"; - groups = "gpio50_d_1"; - }; - default_cfg { - pins = "GPIO50_L4"; - input-enable; - bias-disable; - }; - }; - }; - /* This sets up the PWM pin 14 */ - pwm { - pwm_default_mode: pwm_default { - default_mux { - function = "pwmout"; - groups = "pwmout1_d_1"; - }; - default_cfg { - pins = "GPIO14_C16"; - input-enable; - bias-pull-down; - }; - }; - }; - /* This sets up audio interface 2 */ - adi2 { - adi2_default_mode: adi2_default { - default_mux { - function = "adi2"; - groups = "adi2_d_1"; - }; - default_cfg { - pins = "GPIO17_P2", - "GPIO18_N3", - "GPIO19_T1", - "GPIO20_P3"; - input-enable; - bias-pull-down; - }; - }; - }; - /* Modem I2C setup (SCL and SDA pins) */ - modsclsda { - modsclsda_default_mode: modsclsda_default { - default_mux { - function = "modsclsda"; - groups = "modsclsda_d_1"; - }; - default_cfg { - pins = "GPIO40_J15", - "GPIO41_J14"; - input-enable; - bias-pull-down; - }; - }; - }; - resethw { - resethw_default_mode: resethw_default { - default_mux { - function = "resethw"; - groups = "resethw_d_1"; - }; - default_cfg { - pins = "GPIO52_D16"; - input-enable; - bias-pull-down; - }; - }; - }; - service { - service_default_mode: service_default { - default_mux { - function = "service"; - groups = "service_d_1"; - }; - default_cfg { - pins = "GPIO53_D15"; - input-enable; - bias-pull-down; - }; - }; - }; - /* - * Clock output pins associated with regulators. - */ - sysclkreq2 { - sysclkreq2_default_mode: sysclkreq2_default { - default_mux { - function = "sysclkreq"; - groups = "sysclkreq2_d_1"; - }; - default_cfg { - pins = "GPIO1_N4"; - input-enable; - bias-disable; - }; - }; - sysclkreq2_sleep_mode: sysclkreq2_sleep { - default_mux { - function = "gpio"; - groups = "gpio1_a_1"; - }; - default_cfg { - pins = "GPIO1_N4"; - input-enable; - bias-pull-down; - }; - }; - }; - sysclkreq4 { - sysclkreq4_default_mode: sysclkreq4_default { - default_mux { - function = "sysclkreq"; - groups = "sysclkreq4_d_1"; - }; - default_cfg { - pins = "GPIO3_P5"; - input-enable; - bias-disable; - }; - }; - sysclkreq4_sleep_mode: sysclkreq4_sleep { - default_mux { - function = "gpio"; - groups = "gpio3_a_1"; - }; - default_cfg { - pins = "GPIO3_P5"; - input-enable; - bias-pull-down; - }; - }; - }; - }; - }; - }; - }; -}; From 6299f3002bc1641d0b2533b5ccc6e02833d6caac Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 19 Dec 2019 21:20:45 +0100 Subject: [PATCH 2/8] ARM: dts: ux500: Add device tree include for AB8505 AB8505 is a slightly newer version of AB8500. Overall it is quite similar, but there are some differences like the number of GPIOs and regulators. Therefore we need a separate device tree definition for devices making use of AB8505. The AB8500-specific nodes were moved out of ste-dbx5x0.dtsi in commit a46f7c6762d8 ("ARM: dts: ux500: Move ab8500 nodes to ste-ab8500.dtsi"). Add a new "ste-ab8505.dtsi" device tree include in a similar way. Keep the battery/charging related sub-devices disabled by default since they require additional configuration to work correctly. Signed-off-by: Stephan Gerhold Link: https://lore.kernel.org/r/20191219202052.19039-3-stephan@gerhold.net Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-ab8505.dtsi | 275 ++++++++++++++++++++++++++++++ 1 file changed, 275 insertions(+) create mode 100644 arch/arm/boot/dts/ste-ab8505.dtsi diff --git a/arch/arm/boot/dts/ste-ab8505.dtsi b/arch/arm/boot/dts/ste-ab8505.dtsi new file mode 100644 index 000000000000..c72aa250bf6f --- /dev/null +++ b/arch/arm/boot/dts/ste-ab8505.dtsi @@ -0,0 +1,275 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2012 Linaro Ltd + */ + +#include + +/ { + /* Essential housekeeping hardware monitors */ + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&gpadc 0x02>, /* Battery temperature */ + <&gpadc 0x08>, /* Main battery voltage */ + <&gpadc 0x09>, /* VBUS */ + <&gpadc 0x0b>, /* Charger current */ + <&gpadc 0x0c>; /* Backup battery voltage */ + }; + + soc { + prcmu@80157000 { + ab8505 { + compatible = "stericsson,ab8505"; + interrupt-parent = <&intc>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <2>; + + ab8500_clock: clock-controller { + compatible = "stericsson,ab8500-clk"; + #clock-cells = <1>; + }; + + ab8505_gpio: ab8505-gpio { + compatible = "stericsson,ab8505-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + + ab8500-rtc { + compatible = "stericsson,ab8500-rtc"; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH + 18 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "60S", "ALARM"; + }; + + gpadc: ab8500-gpadc { + compatible = "stericsson,ab8500-gpadc"; + interrupts = <32 IRQ_TYPE_LEVEL_HIGH + 39 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "HW_CONV_END", "SW_CONV_END"; + vddadc-supply = <&ab8500_ldo_adc_reg>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + /* GPADC channels */ + bat_ctrl: channel@01 { + reg = <0x01>; + }; + btemp_ball: channel@02 { + reg = <0x02>; + }; + acc_detect1: channel@04 { + reg = <0x04>; + }; + acc_detect2: channel@05 { + reg = <0x05>; + }; + adc_aux1: channel@06 { + reg = <0x06>; + }; + adc_aux2: channel@07 { + reg = <0x07>; + }; + main_batt_v: channel@08 { + reg = <0x08>; + }; + vbus_v: channel@09 { + reg = <0x09>; + }; + charger_c: channel@0b { + reg = <0x0b>; + }; + bk_bat_v: channel@0c { + reg = <0x0c>; + }; + usb_id: channel@0e { + reg = <0x0e>; + }; + }; + + ab8500_battery: ab8500_battery { + status = "disabled"; + thermistor-on-batctrl; + }; + + ab8500_fg { + status = "disabled"; + compatible = "stericsson,ab8500-fg"; + battery = <&ab8500_battery>; + io-channels = <&gpadc 0x08>; + io-channel-name = "main_bat_v"; + }; + + ab8500_btemp { + status = "disabled"; + compatible = "stericsson,ab8500-btemp"; + battery = <&ab8500_battery>; + io-channels = <&gpadc 0x02>, + <&gpadc 0x01>; + io-channel-name = "btemp_ball", + "bat_ctrl"; + }; + + ab8500_charger { + status = "disabled"; + compatible = "stericsson,ab8500-charger"; + battery = <&ab8500_battery>; + vddadc-supply = <&ab8500_ldo_adc_reg>; + io-channels = <&gpadc 0x09>, + <&gpadc 0x0b>; + io-channel-name = "vbus_v", + "usb_charger_c"; + }; + + ab8500_chargalg { + status = "disabled"; + compatible = "stericsson,ab8500-chargalg"; + battery = <&ab8500_battery>; + }; + + ab8500_usb: ab8500_usb { + compatible = "stericsson,ab8500-usb"; + interrupts = < 90 IRQ_TYPE_LEVEL_HIGH + 96 IRQ_TYPE_LEVEL_HIGH + 14 IRQ_TYPE_LEVEL_HIGH + 15 IRQ_TYPE_LEVEL_HIGH + 79 IRQ_TYPE_LEVEL_HIGH + 74 IRQ_TYPE_LEVEL_HIGH + 75 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ID_WAKEUP_R", + "ID_WAKEUP_F", + "VBUS_DET_F", + "VBUS_DET_R", + "USB_LINK_STATUS", + "USB_ADP_PROBE_PLUG", + "USB_ADP_PROBE_UNPLUG"; + vddulpivio18-supply = <&ab8500_ldo_intcore_reg>; + v-ape-supply = <&db8500_vape_reg>; + musb_1v8-supply = <&db8500_vsmps2_reg>; + clocks = <&prcmu_clk PRCMU_SYSCLK>; + clock-names = "sysclk"; + }; + + ab8500-ponkey { + compatible = "stericsson,ab8500-poweron-key"; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH + 7 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ONKEY_DBF", "ONKEY_DBR"; + }; + + ab8500-sysctrl { + compatible = "stericsson,ab8500-sysctrl"; + }; + + ab8500-pwm { + compatible = "stericsson,ab8500-pwm"; + clocks = <&ab8500_clock AB8500_SYSCLK_INT>; + clock-names = "intclk"; + }; + + ab8500-debugfs { + compatible = "stericsson,ab8500-debug"; + }; + + codec: ab8500-codec { + compatible = "stericsson,ab8500-codec"; + + V-AUD-supply = <&ab8500_ldo_audio_reg>; + V-AMIC1-supply = <&ab8500_ldo_anamic1_reg>; + V-AMIC2-supply = <&ab8500_ldo_anamic2_reg>; + + clocks = <&ab8500_clock AB8500_SYSCLK_AUDIO>; + clock-names = "audioclk"; + + stericsson,earpeice-cmv = <950>; /* Units in mV. */ + }; + + ab8505-regulators { + compatible = "stericsson,ab8505-regulator"; + + ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3300000>; + }; + + ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <3300000>; + }; + + ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <3300000>; + }; + + ab8500_ldo_aux4_reg: ab8500_ldo_aux4 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <3300000>; + }; + + ab8500_ldo_aux5_reg: ab8500_ldo_aux5 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <2790000>; + }; + + ab8500_ldo_aux6_reg: ab8500_ldo_aux6 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <2790000>; + }; + + // supply for v-intcore12; VINTCORE12 LDO + ab8500_ldo_intcore_reg: ab8500_ldo_intcore { + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1350000>; + }; + + // supply for gpadc; ADC LDO + ab8500_ldo_adc_reg: ab8500_ldo_adc { + }; + + // supply for ab8500-vaudio; VAUDIO LDO + ab8500_ldo_audio_reg: ab8500_ldo_audio { + }; + + // supply for v-anamic1 VAMIC1 LDO + ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { + }; + + // supply for v-amic2; VAMIC2 LDO; reuse constants for AMIC1 + ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 { + }; + + // supply for v-aux8; VAUX8 LDO + ab8500_ldo_aux8_reg: ab8500_ldo_aux8 { + }; + + // supply for U8500 CSI/DSI; VANA LDO + ab8500_ldo_ana_reg: ab8500_ldo_ana { + }; + }; + }; + }; + + sound { + stericsson,audio-codec = <&codec>; + clocks = <&prcmu_clk PRCMU_SYSCLK>, <&ab8500_clock AB8500_SYSCLK_ULP>, <&ab8500_clock AB8500_SYSCLK_INT>; + clock-names = "sysclk", "ulpclk", "intclk"; + }; + + mcde@a0350000 { + vana-supply = <&ab8500_ldo_ana_reg>; + + dsi@a0351000 { + vana-supply = <&ab8500_ldo_ana_reg>; + }; + dsi@a0352000 { + vana-supply = <&ab8500_ldo_ana_reg>; + }; + dsi@a0353000 { + vana-supply = <&ab8500_ldo_ana_reg>; + }; + }; + }; +}; From 92ac62e1c3efc87d40ffec3e3626d28a408c508d Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 19 Dec 2019 21:20:46 +0100 Subject: [PATCH 3/8] dt-bindings: arm: ux500: Document samsung,golden compatible The Samsung Galaxy S III mini ("samsung-golden") can now boot mainline Linux; document the samsung,golden compatible that is used in its device tree. Signed-off-by: Stephan Gerhold Link: https://lore.kernel.org/r/20191219202052.19039-4-stephan@gerhold.net Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/arm/ux500.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/ux500.yaml b/Documentation/devicetree/bindings/arm/ux500.yaml index 006cb4a5f331..accaee906050 100644 --- a/Documentation/devicetree/bindings/arm/ux500.yaml +++ b/Documentation/devicetree/bindings/arm/ux500.yaml @@ -29,3 +29,8 @@ properties: items: - const: calaosystems,snowball-a9500 - const: st-ericsson,u9500 + + - description: Samsung Galaxy S III mini (GT-I8190) + items: + - const: samsung,golden + - const: st-ericsson,u8500 From b952efeb7ad4cc81f2da55bde6fdd27716fceb13 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 19 Dec 2019 21:20:47 +0100 Subject: [PATCH 4/8] ARM: dts: ux500: Add device tree for Samsung Galaxy S III mini (GT-I8190) The Samsung Galaxy S III mini (GT-I8190) is a smartphone with Ux500 SoC released in 2012. Thanks to the great mainline support for Ux500, it can actually run mainline Linux quite well. Add a new device tree for it with support for: - Internal Storage (eMMC) - External Storage (Micro SD card) - UART - GPIO Buttons - Vibrator Note that the device tree cannot be booted directly with the original (Samsung) bootloader. It keeps the L2 cache turned on, which causes the kernel to hang shortly after decompression. As a workaround I have created a port of (mainline) U-Boot, which locks the L2 cache before booting Linux. At the moment it does not replace the Samsung bootloader, instead we let the original bootloader load U-Boot as an another (intermediate) bootloader. Another advantage of this is that U-Boot has proper device tree support, so we do not need to hardcode the kernel command line in the device tree. Signed-off-by: Stephan Gerhold Link: https://lore.kernel.org/r/20191219202052.19039-5-stephan@gerhold.net Signed-off-by: Linus Walleij --- arch/arm/boot/dts/Makefile | 3 +- .../arm/boot/dts/ste-ux500-samsung-golden.dts | 304 ++++++++++++++++++ 2 files changed, 306 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/ste-ux500-samsung-golden.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9d13b3b71116..59d13d643094 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1183,7 +1183,8 @@ dtb-$(CONFIG_ARCH_U8500) += \ ste-hrefprev60-tvk.dtb \ ste-hrefv60plus-stuib.dtb \ ste-hrefv60plus-tvk.dtb \ - ste-href520-tvk.dtb + ste-href520-tvk.dtb \ + ste-ux500-samsung-golden.dtb dtb-$(CONFIG_ARCH_UNIPHIER) += \ uniphier-ld4-ref.dtb \ uniphier-ld6b-ref.dtb \ diff --git a/arch/arm/boot/dts/ste-ux500-samsung-golden.dts b/arch/arm/boot/dts/ste-ux500-samsung-golden.dts new file mode 100644 index 000000000000..51f2afe42c1c --- /dev/null +++ b/arch/arm/boot/dts/ste-ux500-samsung-golden.dts @@ -0,0 +1,304 @@ +// SPDX-License-Identifier: GPL-2.0-only +/dts-v1/; + +#include "ste-db8500.dtsi" +#include "ste-ab8505.dtsi" +#include "ste-dbx5x0-pinctrl.dtsi" +#include +#include + +/* + * Note: This device tree cannot be booted directly with the Samsung bootloader. + * You need an intermediate, device-tree compatible bootloader + * that locks the L2 cache. Otherwise the kernel will crash after decompression. + * + * There is a port of (mainline) U-Boot, see + * https://wiki.postmarketos.org/wiki/ST-Ericsson_NovaThor_U8500#U-Boot + */ +/ { + model = "Samsung Galaxy S III mini (GT-I8190)"; + compatible = "samsung,golden", "st-ericsson,u8500"; + + chosen { + stdout-path = &serial2; + }; + + soc { + /* External Micro SD card slot */ + sdi0_per1@80126000 { + status = "okay"; + + arm,primecell-periphid = <0x10480180>; + max-frequency = <100000000>; + bus-width = <4>; + + non-removable; + /* + * Unfortunately, there is no way to enable the UHS + * modes due to a limitation of the SD level translator: + * It will either translate to 2.9V or disconnect the + * DATA lines, so switching to 1.8V signal voltage fails. + */ + cap-sd-highspeed; + cap-mmc-highspeed; + st,sig-pin-fbclk; + full-pwr-cycle; + + vmmc-supply = <&ab8500_ldo_aux3_reg>; + vqmmc-supply = <&sd_level_translator>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&mc0_a_2_default>; + pinctrl-1 = <&mc0_a_2_sleep>; + }; + + /* WLAN SDIO */ + sdi1_per2@80118000 { + status = "okay"; + + arm,primecell-periphid = <0x10480180>; + max-frequency = <50000000>; + bus-width = <4>; + + non-removable; + cap-sd-highspeed; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&mc1_a_2_default>; + pinctrl-1 = <&mc1_a_2_sleep>; + }; + + /* eMMC */ + sdi2_per3@80005000 { + status = "okay"; + + arm,primecell-periphid = <0x10480180>; + max-frequency = <100000000>; + bus-width = <8>; + + non-removable; + cap-mmc-highspeed; + mmc-ddr-1_8v; + + vmmc-supply = <&vmem_3v3>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&mc2_a_1_default>; + pinctrl-1 = <&mc2_a_1_sleep>; + }; + + /* BT UART */ + uart@80120000 { + status = "okay"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&u0_a_1_default>; + pinctrl-1 = <&u0_a_1_sleep>; + }; + + /* GPF UART */ + uart@80121000 { + status = "okay"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&u1rxtx_a_1_default &u1ctsrts_a_1_default>; + pinctrl-1 = <&u1rxtx_a_1_sleep &u1ctsrts_a_1_sleep>; + }; + + /* Debugging console UART */ + uart@80007000 { + status = "okay"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&u2rxtx_c_1_default>; + pinctrl-1 = <&u2rxtx_c_1_sleep>; + }; + + prcmu@80157000 { + ab8505 { + ab8500_usb { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&usb_a_1_default>; + pinctrl-1 = <&usb_a_1_sleep>; + }; + + ab8505-regulators { + ab8500_ldo_aux1 { + regulator-name = "sensor_3v"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + ab8500_ldo_aux2 { + regulator-name = "vreg_tsp_a3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ab8500_ldo_aux3 { + regulator-name = "vdd_tf_2v91"; + }; + + ab8500_ldo_aux4 { + regulator-name = "key_led_3.3v"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + ab8500_ldo_aux5 { + regulator-name = "vreg_tsp_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + ab8500_ldo_aux6 { + regulator-name = "touch_key_2.2v"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + }; + + ab8500_ldo_aux8 { + regulator-name = "sensor_1v8"; + }; + }; + }; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_default>; + + label = "GPIO Buttons"; + + volume-up { + label = "Volume Up"; + /* GPIO67 (VOL_UP) */ + gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + volume-down { + label = "Volume Down"; + /* GPIO92 (VOL_DOWN) */ + gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + home { + label = "Home"; + /* GPIO91 (HOME_KEY) */ + gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + vibrator { + compatible = "gpio-vibrator"; + /* GPIO195 (MOT_EN) */ + enable-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&vibrator_default>; + }; + + /* External LDO for eMMC */ + vmem_3v3: regulator-vmem { + compatible = "regulator-fixed"; + + regulator-name = "vmem_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + + startup-delay-us = <200>; + + /* GPIO223 (MEM_LDO_EN) */ + gpio = <&gpio6 31 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&mem_ldo_default>; + }; + + /* TI TXS0206-29 level translator for 2.9 V */ + sd_level_translator: regulator-sd-level-translator { + compatible = "regulator-fixed"; + + regulator-name = "sd-level-translator"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + + startup-delay-us = <200>; + + /* GPIO87 (TXS0206-29_EN) */ + gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&sd_level_translator_default>; + }; +}; + +&pinctrl { + gpio-keys { + gpio_keys_default: gpio_keys_default { + golden_cfg1 { + pins = "GPIO67", /* VOL_UP */ + "GPIO91", /* HOME_KEY */ + "GPIO92"; /* VOL_DOWN */ + ste,config = <&gpio_in_pu>; + }; + }; + }; + + sdi0 { + sd_level_translator_default: sd_level_translator_default { + golden_cfg1 { + pins = "GPIO87_B3"; /* TXS0206-29_EN */ + ste,config = <&gpio_out_lo>; + }; + }; + }; + + sdi2 { + mem_ldo_default: mem_ldo_default { + golden_cfg1 { + pins = "GPIO223_AH9"; /* MEM_LDO_EN */ + ste,config = <&gpio_out_hi>; + }; + }; + }; + + vibrator { + vibrator_default: vibrator_default { + golden_cfg1 { + pins = "GPIO195_AG28"; /* MOT_EN */ + ste,config = <&gpio_out_lo>; + }; + }; + }; +}; + +&ab8505_gpio { + /* Hog a few default settings */ + pinctrl-names = "default"; + pinctrl-0 = <&gpio_default>; + + gpio { + gpio_default: gpio_default { + golden_mux { + /* Change unused pins to GPIO mode */ + function = "gpio"; + groups = "gpio3_a_1", /* default: SysClkReq4 */ + "gpio14_a_1"; /* default: PWMOut1 */ + }; + golden_cfg1 { + pins = "GPIO11_B17", "GPIO13_D17", "GPIO50_L4"; + bias-disable; + }; + }; + }; +}; From 032c18c566ead5bfda62acf1a5af5ce79e2cd8e0 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 19 Dec 2019 21:20:48 +0100 Subject: [PATCH 5/8] ARM: dts: ux500: samsung-golden: Add IMU (accelerometer + gyroscope) samsung-golden has a InvenSense MPU-6051M IMU that provides an accelerometer and gyroscope. It seems to be functionally compatible with MPU-6050 so we can easily enable it by adding the necessary device tree nodes. Signed-off-by: Stephan Gerhold Link: https://lore.kernel.org/r/20191219202052.19039-6-stephan@gerhold.net Signed-off-by: Linus Walleij --- .../arm/boot/dts/ste-ux500-samsung-golden.dts | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/boot/dts/ste-ux500-samsung-golden.dts b/arch/arm/boot/dts/ste-ux500-samsung-golden.dts index 51f2afe42c1c..14a084e1846b 100644 --- a/arch/arm/boot/dts/ste-ux500-samsung-golden.dts +++ b/arch/arm/boot/dts/ste-ux500-samsung-golden.dts @@ -6,6 +6,7 @@ #include "ste-dbx5x0-pinctrl.dtsi" #include #include +#include /* * Note: This device tree cannot be booted directly with the Samsung bootloader. @@ -114,6 +115,33 @@ pinctrl-1 = <&u2rxtx_c_1_sleep>; }; + i2c@80128000 { + status = "okay"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c2_b_2_default>; + pinctrl-1 = <&i2c2_b_2_sleep>; + + imu@68 { + compatible = "invensense,mpu6050"; + reg = <0x68>; + + /* GPIO206 (ACC_INT) */ + interrupt-parent = <&gpio6>; + interrupts = <14 IRQ_TYPE_EDGE_RISING>; + + mount-matrix = "0", "1", "0", + "-1", "0", "0", + "0", "0", "1"; + + vdd-supply = <&ab8500_ldo_aux1_reg>; + vddio-supply = <&ab8500_ldo_aux8_reg>; + + pinctrl-names = "default"; + pinctrl-0 = <&imu_default>; + }; + }; + prcmu@80157000 { ab8505 { ab8500_usb { @@ -272,6 +300,15 @@ }; }; + imu { + imu_default: imu_default { + golden_cfg1 { + pins = "GPIO206_AG24"; /* ACC_INT */ + ste,config = <&gpio_in_pd>; + }; + }; + }; + vibrator { vibrator_default: vibrator_default { golden_cfg1 { From 234a0387f73cd109e03aee8c2d6f26a54b69d403 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 19 Dec 2019 21:20:49 +0100 Subject: [PATCH 6/8] ARM: dts: ux500: samsung-golden: Add touch screen samsung-golden has an Atmel mXT224S touch controller connected to I2C. It is supported by the existing driver for atmel,maxtouch, so all we need to do to make it work is to define the necessary device tree nodes. The atmel_mxt_ts driver does not support controlling regulators yet, so add regulator-always-on for now to turn on the necessary regulators. Signed-off-by: Stephan Gerhold Link: https://lore.kernel.org/r/20191219202052.19039-7-stephan@gerhold.net Signed-off-by: Linus Walleij --- .../arm/boot/dts/ste-ux500-samsung-golden.dts | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/ste-ux500-samsung-golden.dts b/arch/arm/boot/dts/ste-ux500-samsung-golden.dts index 14a084e1846b..e75a425d177e 100644 --- a/arch/arm/boot/dts/ste-ux500-samsung-golden.dts +++ b/arch/arm/boot/dts/ste-ux500-samsung-golden.dts @@ -142,6 +142,26 @@ }; }; + i2c@80110000 { + status = "okay"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c3_c_2_default>; + pinctrl-1 = <&i2c3_c_2_sleep>; + + touchscreen@4a { + compatible = "atmel,maxtouch"; + reg = <0x4a>; + + /* GPIO218 (TSP_INT_1V8) */ + interrupt-parent = <&gpio6>; + interrupts = <26 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-names = "default"; + pinctrl-0 = <&tsp_default>; + }; + }; + prcmu@80157000 { ab8505 { ab8500_usb { @@ -161,6 +181,7 @@ regulator-name = "vreg_tsp_a3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; + regulator-always-on; /* FIXME */ }; ab8500_ldo_aux3 { @@ -177,6 +198,7 @@ regulator-name = "vreg_tsp_1v8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; + regulator-always-on; /* FIXME */ }; ab8500_ldo_aux6 { @@ -309,6 +331,15 @@ }; }; + tsp { + tsp_default: tsp_default { + golden_cfg1 { + pins = "GPIO218_AH11"; /* TSP_INT_1V8 */ + ste,config = <&gpio_in_nopull>; + }; + }; + }; + vibrator { vibrator_default: vibrator_default { golden_cfg1 { From fbb7c4a13c96c1e76d92b007a6852cecb27f7b0f Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 19 Dec 2019 21:20:50 +0100 Subject: [PATCH 7/8] ARM: dts: ux500: samsung-golden: Add WiFi samsung-golden uses a BCM4334 WiFi+BT combo chip, connected to SDIO. It is supported by the brcmfmac driver in mainline, so we only need to set up the device tree to make it work correctly. Note: brcmfmac requires (proprietary) firmware + a device-specific NVRAM file. Both can be extracted from the stock Android system used on samsung-golden: - /system/etc/wifi/bcmdhd_sta.bin_b2 -> /lib/firmware/brcm/brcmfmac4334-sdio.bin - /system/etc/wifi/nvram_net.txt_GPIO4 -> /lib/firmware/brcm/brcmfmac4334-sdio.samsung,golden.txt brcmfmac4334-sdio.bin from linux-firmware also seems to work, but results in occasional errors for some reason. Signed-off-by: Stephan Gerhold Link: https://lore.kernel.org/r/20191219202052.19039-8-stephan@gerhold.net Signed-off-by: Linus Walleij --- .../arm/boot/dts/ste-ux500-samsung-golden.dts | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm/boot/dts/ste-ux500-samsung-golden.dts b/arch/arm/boot/dts/ste-ux500-samsung-golden.dts index e75a425d177e..d22b2879c46a 100644 --- a/arch/arm/boot/dts/ste-ux500-samsung-golden.dts +++ b/arch/arm/boot/dts/ste-ux500-samsung-golden.dts @@ -64,9 +64,27 @@ non-removable; cap-sd-highspeed; + vmmc-supply = <&wl_reg_on>; + pinctrl-names = "default", "sleep"; pinctrl-0 = <&mc1_a_2_default>; pinctrl-1 = <&mc1_a_2_sleep>; + + #address-cells = <1>; + #size-cells = <0>; + + wifi@1 { + compatible = "brcm,bcm4329-fmac"; + reg = <1>; + + /* GPIO216 (WLAN_HOST_WAKE) */ + interrupt-parent = <&gpio6>; + interrupts = <24 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "host-wake"; + + pinctrl-names = "default"; + pinctrl-0 = <&wlan_default>; + }; }; /* eMMC */ @@ -290,6 +308,28 @@ pinctrl-names = "default"; pinctrl-0 = <&sd_level_translator_default>; }; + + /* + * WL_REG_ON takes WLAN out of reset and enables the internal regulators. + * The voltage specified here is only used to determine the OCR mask, + * the BCM chip is actually connected directly to VBAT. + */ + wl_reg_on: regulator-wl-reg-on { + compatible = "regulator-fixed"; + + regulator-name = "wl-reg-on"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + + startup-delay-us = <100000>; + + /* GPIO215 (WLAN_EN) */ + gpio = <&gpio6 23 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&wlan_en_default>; + }; }; &pinctrl { @@ -340,6 +380,22 @@ }; }; + wlan { + wlan_default: wlan_default { + golden_cfg1 { + pins = "GPIO216_AG12"; /* WLAN_HOST_WAKE */ + ste,config = <&gpio_in_pd>; + }; + }; + + wlan_en_default: wlan_en_default { + golden_cfg1 { + pins = "GPIO215_AH13"; /* WLAN_EN */ + ste,config = <&gpio_out_lo>; + }; + }; + }; + vibrator { vibrator_default: vibrator_default { golden_cfg1 { From 224bf0fe729237c4da241e5966abfc1bfb4353a3 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 19 Dec 2019 21:20:51 +0100 Subject: [PATCH 8/8] ARM: dts: ux500: samsung-golden: Add Bluetooth samsung-golden uses a BCM4334 WiFi+BT combo chip. The BT part is connected via UART and supported by the hci_bcm driver in mainline. Add the necessary device tree changes to make it load correctly. It requires (seemingly) device-specific firmware that can be extracted from the stock Android system used on samsung-golden: - /system/bin/bcm4334.hcd -> /lib/firmware/brcm/BCM4334B0.hcd On my device, scanning for other Bluetooth devices works just fine, but for some reason it keeps disconnecting immediately when attempting to connect to an other device. Signed-off-by: Stephan Gerhold Link: https://lore.kernel.org/r/20191219202052.19039-9-stephan@gerhold.net Signed-off-by: Linus Walleij --- .../arm/boot/dts/ste-ux500-samsung-golden.dts | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/ste-ux500-samsung-golden.dts b/arch/arm/boot/dts/ste-ux500-samsung-golden.dts index d22b2879c46a..313f0ab16866 100644 --- a/arch/arm/boot/dts/ste-ux500-samsung-golden.dts +++ b/arch/arm/boot/dts/ste-ux500-samsung-golden.dts @@ -113,6 +113,19 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&u0_a_1_default>; pinctrl-1 = <&u0_a_1_sleep>; + + bluetooth { + compatible = "brcm,bcm4330-bt"; + /* GPIO222 (BT_VREG_ON) */ + shutdown-gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>; + /* GPIO199 (BT_WAKE) */ + device-wakeup-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; + /* GPIO97 (BT_HOST_WAKE) */ + host-wakeup-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&bluetooth_default>; + }; }; /* GPF UART */ @@ -396,6 +409,20 @@ }; }; + bluetooth { + bluetooth_default: bluetooth_default { + golden_cfg1 { + pins = "GPIO199_AH23", /* BT_WAKE */ + "GPIO222_AJ9"; /* BT_VREG_ON */ + ste,config = <&gpio_out_lo>; + }; + golden_cfg2 { + pins = "GPIO97_D9"; /* BT_HOST_WAKE */ + ste,config = <&gpio_in_nopull>; + }; + }; + }; + vibrator { vibrator_default: vibrator_default { golden_cfg1 {