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gma500: Final enables for Oaktrail 

This switches the ifdef to match the Kconfig so that Oaktrail probing occurs
and adds some additional minor bulletproofing.

Tested on a Fujtisu Stylistic Q550 internal display. HDMI might work but that
remains to be seen.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
hifive-unleashed-5.1
Alan Cox 2011-12-19 21:06:35 +00:00 committed by Dave Airlie
parent fea578b6a1
commit 0cecdd818c
2 changed files with 15 additions and 1 deletions
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14
drivers/gpu/drm/gma500/mid_bios.c
View File

@ -45,6 +45,12 @@ static void mid_get_fuse_settings(struct drm_device *dev)
#define FB_SKU_100 0
#define FB_SKU_100L 1
#define FB_SKU_83 2
if (pci_root == NULL) {
WARN_ON(1);
return;
}
pci_write_config_dword(pci_root, 0xD0, FB_REG06);
pci_read_config_dword(pci_root, 0xD4, &fuse_value);
@ -101,6 +107,10 @@ static void mid_get_pci_revID(struct drm_psb_private *dev_priv)
uint32_t platform_rev_id = 0;
struct pci_dev *pci_gfx_root = pci_get_bus_and_slot(0, PCI_DEVFN(2, 0));
if (pci_gfx_root == NULL) {
WARN_ON(1);
return;
}
pci_read_config_dword(pci_gfx_root, 0x08, &platform_rev_id);
dev_priv->platform_rev_id = (uint8_t) platform_rev_id;
pci_dev_put(pci_gfx_root);
@ -138,6 +148,10 @@ static void mid_get_vbt_data(struct drm_psb_private *dev_priv)
/* get the virtual address of the vbt */
vbt_virtual = ioremap(addr, sizeof(*vbt));
if (vbt_virtual == NULL) {
vbt->size = 0;
return;
}
memcpy(vbt, vbt_virtual, sizeof(*vbt));
iounmap(vbt_virtual); /* Free virtual address space */

2
drivers/gpu/drm/gma500/psb_drv.c
View File

@ -52,7 +52,7 @@ module_param_named(trap_pagefaults, drm_psb_trap_pagefaults, int, 0600);
static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
{ 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
{ 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
#if defined(CONFIG_DRM_OAKTRAIL)
#if defined(CONFIG_DRM_GMA600)
{ 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
{ 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
{ 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},