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Staging: iio: accel: adis16201: Group register definitions 

Group register definitions with its register field bits to improve
readability and easy identification. A small comment is also added to
denote the purpose/functionality of the grouped register definitions.

Signed-off-by: Himanshu Jha <himanshujha199640@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
hifive-unleashed-5.1
Himanshu Jha 2018-03-17 01:36:21 +05:30 committed by Jonathan Cameron
parent a58efed313
commit 0d0f97d896
1 changed files with 49 additions and 79 deletions
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128
drivers/staging/iio/accel/adis16201.c
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@ -20,99 +20,69 @@
#include <linux/iio/buffer.h>
#include <linux/iio/imu/adis.h>
#define ADIS16201_STARTUP_DELAY_MS 220
#define ADIS16201_STARTUP_DELAY_MS 220
#define ADIS16201_FLASH_CNT 0x00
#define ADIS16201_FLASH_CNT 0x00
/* Data Output Register Information */
#define ADIS16201_SUPPLY_OUT_REG 0x02
#define ADIS16201_XACCL_OUT_REG 0x04
#define ADIS16201_YACCL_OUT_REG 0x06
#define ADIS16201_AUX_ADC_REG 0x08
#define ADIS16201_TEMP_OUT_REG 0x0A
#define ADIS16201_XINCL_OUT_REG 0x0C
#define ADIS16201_YINCL_OUT_REG 0x0E
#define ADIS16201_SUPPLY_OUT_REG 0x02
/* Calibration Register Definition */
#define ADIS16201_XACCL_OFFS_REG 0x10
#define ADIS16201_YACCL_OFFS_REG 0x12
#define ADIS16201_XACCL_SCALE_REG 0x14
#define ADIS16201_YACCL_SCALE_REG 0x16
#define ADIS16201_XINCL_OFFS_REG 0x18
#define ADIS16201_YINCL_OFFS_REG 0x1A
#define ADIS16201_XINCL_SCALE_REG 0x1C
#define ADIS16201_YINCL_SCALE_REG 0x1E
#define ADIS16201_XACCL_OUT_REG 0x04
#define ADIS16201_YACCL_OUT_REG 0x06
#define ADIS16201_AUX_ADC_REG 0x08
#define ADIS16201_TEMP_OUT_REG 0x0A
#define ADIS16201_XINCL_OUT_REG 0x0C
#define ADIS16201_YINCL_OUT_REG 0x0E
#define ADIS16201_XACCL_OFFS_REG 0x10
#define ADIS16201_YACCL_OFFS_REG 0x12
#define ADIS16201_XACCL_SCALE_REG 0x14
#define ADIS16201_YACCL_SCALE_REG 0x16
#define ADIS16201_XINCL_OFFS_REG 0x18
#define ADIS16201_YINCL_OFFS_REG 0x1A
#define ADIS16201_XINCL_SCALE_REG 0x1C
#define ADIS16201_YINCL_SCALE_REG 0x1E
#define ADIS16201_ALM_MAG1_REG 0x20
#define ADIS16201_ALM_MAG2_REG 0x22
#define ADIS16201_ALM_SMPL1_REG 0x24
#define ADIS16201_ALM_SMPL2_REG 0x26
#define ADIS16201_ALM_CTRL_REG 0x28
#define ADIS16201_AUX_DAC_REG 0x30
#define ADIS16201_GPIO_CTRL_REG 0x32
#define ADIS16201_MSC_CTRL_REG 0x34
#define ADIS16201_SMPL_PRD_REG 0x36
/* Alarm Register Definition */
#define ADIS16201_ALM_MAG1_REG 0x20
#define ADIS16201_ALM_MAG2_REG 0x22
#define ADIS16201_ALM_SMPL1_REG 0x24
#define ADIS16201_ALM_SMPL2_REG 0x26
#define ADIS16201_ALM_CTRL_REG 0x28
#define ADIS16201_AUX_DAC_REG 0x30
#define ADIS16201_GPIO_CTRL_REG 0x32
#define ADIS16201_SMPL_PRD_REG 0x36
/* Operation, filter configuration */
#define ADIS16201_AVG_CNT_REG 0x38
#define ADIS16201_SLP_CNT_REG 0x3A
#define ADIS16201_DIAG_STAT_REG 0x3C
#define ADIS16201_GLOB_CMD_REG 0x3E
#define ADIS16201_MSC_CTRL_SELF_TEST_EN BIT(8)
#define ADIS16201_AVG_CNT_REG 0x38
#define ADIS16201_SLP_CNT_REG 0x3A
/* Miscellaneous Control Register Definition */
#define ADIS16201_MSC_CTRL_REG 0x34
#define ADIS16201_MSC_CTRL_SELF_TEST_EN BIT(8)
/* Data-ready enable: 1 = enabled, 0 = disabled */
#define ADIS16201_MSC_CTRL_DATA_RDY_EN BIT(2)
#define ADIS16201_MSC_CTRL_DATA_RDY_EN BIT(2)
/* Data-ready polarity: 1 = active high, 0 = active low */
#define ADIS16201_MSC_CTRL_ACTIVE_DATA_RDY_HIGH BIT(1)
#define ADIS16201_MSC_CTRL_ACTIVE_DATA_RDY_HIGH BIT(1)
/* Data-ready line selection: 1 = DIO1, 0 = DIO0 */
#define ADIS16201_MSC_CTRL_DATA_RDY_DIO1 BIT(0)
#define ADIS16201_DIAG_STAT_ALARM2 BIT(9)
#define ADIS16201_DIAG_STAT_ALARM1 BIT(8)
#define ADIS16201_DIAG_STAT_SPI_FAIL_BIT 3
#define ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT 2
#define ADIS16201_MSC_CTRL_DATA_RDY_DIO1 BIT(0)
/* Diagnostics System Status Register Definition */
#define ADIS16201_DIAG_STAT_REG 0x3C
#define ADIS16201_DIAG_STAT_ALARM2 BIT(9)
#define ADIS16201_DIAG_STAT_ALARM1 BIT(8)
#define ADIS16201_DIAG_STAT_SPI_FAIL_BIT 3
#define ADIS16201_DIAG_STAT_FLASH_UPT_FAIL_BIT 2
/* Power supply above 3.625 V */
#define ADIS16201_DIAG_STAT_POWER_HIGH_BIT 1
#define ADIS16201_DIAG_STAT_POWER_HIGH_BIT 1
/* Power supply below 3.15 V */
#define ADIS16201_DIAG_STAT_POWER_LOW_BIT 0
#define ADIS16201_DIAG_STAT_POWER_LOW_BIT 0
/* System Command Register Definition */
#define ADIS16201_GLOB_CMD_REG 0x3E
#define ADIS16201_GLOB_CMD_SW_RESET BIT(7)
#define ADIS16201_GLOB_CMD_FACTORY_RESET BIT(1)
#define ADIS16201_GLOB_CMD_SW_RESET BIT(7)
#define ADIS16201_GLOB_CMD_FACTORY_RESET BIT(1)
#define ADIS16201_ERROR_ACTIVE BIT(14)
#define ADIS16201_ERROR_ACTIVE BIT(14)
enum adis16201_scan {
ADIS16201_SCAN_ACC_X,