drm/i915: Use simplest form for flushing the single cacheline in the HWS
Rather than call a function to compute the matching cachelines and clflush them, just call the clflush *instruction* directly. We also know that we can use the unpatched plain clflush rather than the clflushopt alternative. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Imre Deak <imre.deak@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1460195877-20520-4-git-send-email-chris@chris-wilson.co.uk
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@ -385,8 +385,9 @@ intel_ring_sync_index(struct intel_engine_cs *engine,
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static inline void
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intel_flush_status_page(struct intel_engine_cs *engine, int reg)
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{
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drm_clflush_virt_range(&engine->status_page.page_addr[reg],
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sizeof(uint32_t));
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mb();
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clflush(&engine->status_page.page_addr[reg]);
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mb();
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}
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static inline u32
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