i2c: tegra: Fix runtime resume to re-init VI I2C
VI I2C is on host1x bus and is part of VE power domain. During suspend/resume VE power domain goes through power off/on. So, controller reset followed by i2c re-initialization is required after the domain power up. This patch fixes it. Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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@ -293,6 +293,8 @@ struct tegra_i2c_dev {
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bool is_curr_atomic_xfer;
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};
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static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev, bool clk_reinit);
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static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
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unsigned long reg)
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{
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@ -675,8 +677,22 @@ static int __maybe_unused tegra_i2c_runtime_resume(struct device *dev)
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goto disable_slow_clk;
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}
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/*
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* VI I2C device is attached to VE power domain which goes through
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* power ON/OFF during PM runtime resume/suspend. So, controller
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* should go through reset and need to re-initialize after power
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* domain ON.
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*/
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if (i2c_dev->is_vi) {
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ret = tegra_i2c_init(i2c_dev, true);
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if (ret)
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goto disable_div_clk;
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}
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return 0;
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disable_div_clk:
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clk_disable(i2c_dev->div_clk);
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disable_slow_clk:
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clk_disable(i2c_dev->slow_clk);
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disable_fast_clk:
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