mmc: sdhci: also get preset value and driver type for MMC_DDR52
commitbb8175a8aa
("mmc: sdhci: clarify DDR timing mode between SD-UHS and eMMC") added MMC_DDR52 as eMMC's DDR mode to be distinguished from SD-UHS, but it missed setting driver type for MMC_DDR52 timing mode. So sometimes we get the following error on Marvell BG2Q DMP board: [ 1.559598] mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00 [ 1.569314] mmcblk0: retrying using single block read [ 1.575676] mmcblk0: error -84 transferring data, sector 2, nr 6, cmd response 0x900, card status 0x0 [ 1.585202] blk_update_request: I/O error, dev mmcblk0, sector 2 [ 1.591818] mmcblk0: error -84 transferring data, sector 3, nr 5, cmd response 0x900, card status 0x0 [ 1.601341] blk_update_request: I/O error, dev mmcblk0, sector 3 This patches fixes this by adding the missing driver type setting. Fixes:bb8175a8aa
("mmc: sdhci: clarify DDR timing mode ...") Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -1134,6 +1134,7 @@ static u16 sdhci_get_preset_value(struct sdhci_host *host)
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preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR104);
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break;
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case MMC_TIMING_UHS_DDR50:
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case MMC_TIMING_MMC_DDR52:
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preset = sdhci_readw(host, SDHCI_PRESET_FOR_DDR50);
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break;
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case MMC_TIMING_MMC_HS400:
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@ -1575,7 +1576,8 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios)
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(ios->timing == MMC_TIMING_UHS_SDR25) ||
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(ios->timing == MMC_TIMING_UHS_SDR50) ||
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(ios->timing == MMC_TIMING_UHS_SDR104) ||
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(ios->timing == MMC_TIMING_UHS_DDR50))) {
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(ios->timing == MMC_TIMING_UHS_DDR50) ||
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(ios->timing == MMC_TIMING_MMC_DDR52))) {
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u16 preset;
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sdhci_enable_preset_value(host, true);
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