drm/amdkfd: add RAS capabilities in topology for Vega20 (v2)
It is to collaborate with HSA_CAPABILITY in libhsakmt. v2: squash in NULL pointer check Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -37,6 +37,7 @@
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#include "kfd_device_queue_manager.h"
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#include "kfd_iommu.h"
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#include "amdgpu_amdkfd.h"
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#include "amdgpu_ras.h"
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/* topology_device_list - Master list of all topology devices */
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static struct list_head topology_device_list;
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@ -1197,6 +1198,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
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void *crat_image = NULL;
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size_t image_size = 0;
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int proximity_domain;
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struct amdgpu_ras *ctx;
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INIT_LIST_HEAD(&temp_topology_device_list);
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@ -1328,6 +1330,20 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
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dev->node_props.capability |= HSA_CAP_ATS_PRESENT;
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}
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ctx = amdgpu_ras_get_context((struct amdgpu_device *)(dev->gpu->kgd));
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if (ctx) {
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/* kfd only concerns sram ecc on GFX/SDMA and HBM ecc on UMC */
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dev->node_props.capability |=
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(((ctx->features & BIT(AMDGPU_RAS_BLOCK__SDMA)) != 0) ||
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((ctx->features & BIT(AMDGPU_RAS_BLOCK__GFX)) != 0)) ?
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HSA_CAP_SRAM_EDCSUPPORTED : 0;
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dev->node_props.capability |= ((ctx->features & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ?
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HSA_CAP_MEM_EDCSUPPORTED : 0;
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dev->node_props.capability |= (ctx->features != 0) ?
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HSA_CAP_RASEVENTNOTIFY : 0;
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}
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kfd_debug_print_topology();
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if (!res)
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@ -48,6 +48,10 @@
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#define HSA_CAP_DOORBELL_TYPE_2_0 0x2
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#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP 0x00004000
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#define HSA_CAP_SRAM_EDCSUPPORTED 0x00080000
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#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000
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#define HSA_CAP_RASEVENTNOTIFY 0x00200000
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struct kfd_node_properties {
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uint64_t hive_id;
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uint32_t cpu_cores_count;
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