redonkable
/
alistair23-linux
1
0
Fork 0
Code Releases Activity

mmc: core: add delay for SD3.0 UHS mode switch 

We may meet the following errors with a SD3.0 DDR50 cards during reboot test.
mmc0: new ultra high speed DDR50 SDHC card at address aaaa
mmcblk0: mmc0:aaaa SU08G 7.40 GiB
mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0xb00
mmcblk0: retrying using single block read
mmcblk0: error -84 transferring data, sector 0, nr 8, cmd response 0x900, card status 0x0
end_request: I/O error, dev mmcblk0, sector 0
.....
Buffer I/O error on device mmcblk0, logical block 0
mmcblk0: unable to read partition table

The root cause is still unknown.
Since there's an errata of Sandisk eMMC card before that it requires delay for CMD6
for eMMC DDR mode to work stable, we also suspect the SD3.0 DDR requires similar delay.
(Still not confirmed by Sandisk)
By adding the delay, the overnight reboot test(run 2000+ times) did not
show the issue anymore. Originally it can easy show the error after about 20 times of
reboot test.

So this patch would be the temporary workaround for Sandisk SD3.0 DDR50 mode
unstable issue.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Haibo Chen 2019-01-28 15:45:47 +08:00 committed by Dong Aisheng
parent 50f70ed62e
commit 0e84465457
1 changed files with 6 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/mmc/core/sd.c
View File

@ -498,6 +498,12 @@ static int sd_set_bus_speed_mode(struct mmc_card *card, u8 *status)
else {
mmc_set_timing(card->host, timing);
mmc_set_clock(card->host, card->sw_caps.uhs_max_dtr);
/*
* FIXME: Sandisk SD3.0 cards DDR50 mode requires such
* delay to get stable, without this delay we may encounter
* CRC errors after switch to DDR50 mode
*/
mmc_delay(100);
}
return 0;