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spi: pxa2xx: Save other reg_cs_ctrl bits when configuring chip select 

Upcoming Intel platforms use LPSS SPI_CS_CONTROL register bits 15:12 for
configuring the chip select polarities. Touch only chip select SW mode and
state bits when enabling the software chip select control in order to not
clear any other bits in the register.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
hifive-unleashed-5.1
Jarkko Nikula 2015-10-22 16:44:42 +03:00 committed by Mark Brown
parent 3b8b6d0594
commit 0e89721879
1 changed files with 3 additions and 1 deletions
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4
drivers/spi/spi-pxa2xx.c
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@ -249,7 +249,9 @@ static void lpss_ssp_setup(struct driver_data *drv_data)
drv_data->lpss_base = drv_data->ioaddr + config->offset;
/* Enable software chip select control */
value = SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH;
value = __lpss_ssp_read_priv(drv_data, config->reg_cs_ctrl);
value &= ~(SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH);
value |= SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH;
__lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value);
/* Enable multiblock DMA transfers */