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ARM: dtsi: enable ahci sata on imx6q platforms 

Only imx6q has the ahci sata controller, enable
it on imx6q platforms.

Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
hifive-unleashed-5.1
Richard Zhu 2013-07-16 11:28:46 +08:00 committed by Shawn Guo
parent 98a3e804de
commit 0fb1f80426
4 changed files with 21 additions and 0 deletions
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4
arch/arm/boot/dts/imx6q-sabreauto.dts
View File

@ -19,3 +19,7 @@
model = "Freescale i.MX6 Quad SABRE Automotive Board";
compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
};
&sata {
status = "okay";
};

4
arch/arm/boot/dts/imx6q-sabrelite.dts
View File

@ -65,6 +65,10 @@
};
};
&sata {
status = "okay";
};
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio3 19 0>;

4
arch/arm/boot/dts/imx6q-sabresd.dts
View File

@ -19,3 +19,7 @@
model = "Freescale i.MX6 Quad SABRE Smart Device Board";
compatible = "fsl,imx6q-sabresd", "fsl,imx6q";
};
&sata {
status = "okay";
};

9
arch/arm/boot/dts/imx6q.dtsi
View File

@ -116,6 +116,15 @@
};
};
sata: sata@02200000 {
compatible = "fsl,imx6q-ahci";
reg = <0x02200000 0x4000>;
interrupts = <0 39 0x04>;
clocks = <&clks 154>, <&clks 187>, <&clks 105>;
clock-names = "sata", "sata_ref", "ahb";
status = "disabled";
};
ipu2: ipu@02800000 {
#crtc-cells = <1>;
compatible = "fsl,imx6q-ipu";