ARM: imx6q: add clock for apbh-dma
add clock for apbh-dma. Signed-off-by: Huang Shijie <shijie8@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -318,7 +318,7 @@ int __init mx6q_clocks_init(void)
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clk[ahb] = imx_clk_busy_divider("ahb", "periph", base + 0x14, 10, 3, base + 0x48, 1);
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clk[ahb] = imx_clk_busy_divider("ahb", "periph", base + 0x14, 10, 3, base + 0x48, 1);
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/* name parent_name reg shift */
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/* name parent_name reg shift */
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clk[apbh_dma] = imx_clk_gate2("apbh_dma", "ahb", base + 0x68, 4);
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clk[apbh_dma] = imx_clk_gate2("apbh_dma", "usdhc3", base + 0x68, 4);
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clk[asrc] = imx_clk_gate2("asrc", "asrc_podf", base + 0x68, 6);
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clk[asrc] = imx_clk_gate2("asrc", "asrc_podf", base + 0x68, 6);
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clk[can1_ipg] = imx_clk_gate2("can1_ipg", "ipg", base + 0x68, 14);
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clk[can1_ipg] = imx_clk_gate2("can1_ipg", "ipg", base + 0x68, 14);
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clk[can1_serial] = imx_clk_gate2("can1_serial", "can_root", base + 0x68, 16);
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clk[can1_serial] = imx_clk_gate2("can1_serial", "can_root", base + 0x68, 16);
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@ -394,6 +394,7 @@ int __init mx6q_clocks_init(void)
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clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
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clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
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clk_register_clkdev(clk[twd], NULL, "smp_twd");
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clk_register_clkdev(clk[twd], NULL, "smp_twd");
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clk_register_clkdev(clk[usboh3], NULL, "usboh3");
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clk_register_clkdev(clk[usboh3], NULL, "usboh3");
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clk_register_clkdev(clk[apbh_dma], NULL, "110000.dma-apbh");
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clk_register_clkdev(clk[uart_serial], "per", "2020000.serial");
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clk_register_clkdev(clk[uart_serial], "per", "2020000.serial");
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clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial");
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clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial");
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clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial");
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clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial");
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