diff --git a/drivers/staging/rtl8192u/r8192U_hw.h b/drivers/staging/rtl8192u/r8192U_hw.h index f91dd20fa568..0b5fb42e5427 100644 --- a/drivers/staging/rtl8192u/r8192U_hw.h +++ b/drivers/staging/rtl8192u/r8192U_hw.h @@ -20,10 +20,6 @@ #ifndef R8192_HW #define R8192_HW -typedef enum _BaseBand_Config_Type { - BaseBand_Config_PHY_REG = 0, //Radio Path A - BaseBand_Config_AGC_TAB = 1, //Radio Path B -} BaseBand_Config_Type, *PBaseBand_Config_Type; #define RTL8187_REQT_READ 0xc0 #define RTL8187_REQT_WRITE 0x40 #define RTL8187_REQ_GET_REGS 0x05 diff --git a/drivers/staging/rtl8192u/r819xU_phy.c b/drivers/staging/rtl8192u/r819xU_phy.c index 97d3cdcd7fb0..9c9dba6e73bc 100644 --- a/drivers/staging/rtl8192u/r819xU_phy.c +++ b/drivers/staging/rtl8192u/r819xU_phy.c @@ -511,7 +511,8 @@ void rtl8192_phy_configmac(struct net_device *dev) * notice: BB parameters may change all the time, so please make * sure it has been synced with the newest. *****************************************************************************/ -static void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType) +static void rtl8192_phyConfigBB(struct net_device *dev, + enum baseband_config_type ConfigType) { u32 i; @@ -525,7 +526,7 @@ static void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType) Rtl8190AGCTAB_Array_Table = Rtl819XAGCTAB_ArrayDTM; } #endif - if (ConfigType == BaseBand_Config_PHY_REG) { + if (ConfigType == BASEBAND_CONFIG_PHY_REG) { for (i = 0; i < PHY_REG_1T2RArrayLength; i += 2) { rtl8192_setBBreg(dev, Rtl8192UsbPHY_REG_1T2RArray[i], bMaskDWord, @@ -535,7 +536,7 @@ static void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType) i, Rtl8192UsbPHY_REG_1T2RArray[i], Rtl8192UsbPHY_REG_1T2RArray[i+1]); } - } else if (ConfigType == BaseBand_Config_AGC_TAB) { + } else if (ConfigType == BASEBAND_CONFIG_AGC_TAB) { for (i = 0; i < AGCTAB_ArrayLength; i += 2) { rtl8192_setBBreg(dev, Rtl8192UsbAGCTAB_Array[i], bMaskDWord, Rtl8192UsbAGCTAB_Array[i+1]); @@ -802,7 +803,7 @@ static void rtl8192_BB_Config_ParaFile(struct net_device *dev) rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x0); /* ----BB Register Initilazation---- */ /* ==m==>Set PHY REG From Header<==m== */ - rtl8192_phyConfigBB(dev, BaseBand_Config_PHY_REG); + rtl8192_phyConfigBB(dev, BASEBAND_CONFIG_PHY_REG); /* ----Set BB reset de-Active---- */ read_nic_dword(dev, CPU_GEN, ®_u32); @@ -810,7 +811,7 @@ static void rtl8192_BB_Config_ParaFile(struct net_device *dev) /* ----BB AGC table Initialization---- */ /* ==m==>Set PHY REG From Header<==m== */ - rtl8192_phyConfigBB(dev, BaseBand_Config_AGC_TAB); + rtl8192_phyConfigBB(dev, BASEBAND_CONFIG_AGC_TAB); /* ----Enable XSTAL ---- */ write_nic_byte_E(dev, 0x5e, 0x00); diff --git a/drivers/staging/rtl8192u/r819xU_phy.h b/drivers/staging/rtl8192u/r819xU_phy.h index c938fd8eb51c..8c2933264407 100644 --- a/drivers/staging/rtl8192u/r819xU_phy.h +++ b/drivers/staging/rtl8192u/r819xU_phy.h @@ -7,6 +7,11 @@ #define MAX_RFDEPENDCMD_CNT 16 #define MAX_POSTCMD_CNT 16 +enum baseband_config_type { + BASEBAND_CONFIG_PHY_REG = 0, //Radio Path A + BASEBAND_CONFIG_AGC_TAB = 1, //Radio Path B +}; + enum switch_chan_cmd_id { CMD_ID_END, CMD_ID_SET_TX_PWR_LEVEL,