s390/cio: Change I/O instructions from inline to normal functions
Adding tracepoints to inline functions adds tracepoint invocation code for each instance where the function is inlined. The resulting increase in kernel code size can have negative impact: - More cache misses in instruction cache - Reduced amount of DMA-capable memory Therefore change all functions implementing I/O instructions from inline to normal functions. Bloat-o-meter summary after change (using performance_defconfig): add/remove: 24/2 grow/shrink: 4/39 up/down: 2205/-4858 (-2653) Signed-off-by: Peter Oberparleiter <oberpar@linux.vnet.ibm.com> Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>hifive-unleashed-5.1
Peter Oberparleiter
Martin Schwidefsky
parent
42248979d5
commit
11b64c8acc
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@ -6,7 +6,7 @@
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CFLAGS_trace.o := -I$(src)
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obj-y += airq.o blacklist.o chsc.o cio.o css.o chp.o idset.o isc.o \
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fcx.o itcw.o crw.o ccwreq.o trace.o
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fcx.o itcw.o crw.o ccwreq.o trace.o ioasm.o
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ccw_device-objs += device.o device_fsm.o device_ops.o
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ccw_device-objs += device_id.o device_pgid.o device_status.o
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obj-y += ccw_device.o cmf.o
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@ -0,0 +1,224 @@
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/*
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* Channel subsystem I/O instructions.
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*/
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#include <linux/export.h>
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#include <asm/chpid.h>
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#include <asm/schid.h>
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#include <asm/crw.h>
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#include "ioasm.h"
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#include "orb.h"
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#include "cio.h"
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int stsch(struct subchannel_id schid, struct schib *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" stsch 0(%3)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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EX_TABLE(0b, 1b)
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: "+d" (ccode), "=m" (*addr)
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: "d" (reg1), "a" (addr)
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: "cc");
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trace_s390_cio_stsch(schid, addr, ccode);
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return ccode;
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}
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EXPORT_SYMBOL(stsch);
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int msch(struct subchannel_id schid, struct schib *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" msch 0(%2)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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EX_TABLE(0b, 1b)
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: "+d" (ccode)
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: "d" (reg1), "a" (addr), "m" (*addr)
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: "cc");
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trace_s390_cio_msch(schid, addr, ccode);
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return ccode;
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}
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int tsch(struct subchannel_id schid, struct irb *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode;
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asm volatile(
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" tsch 0(%3)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode), "=m" (*addr)
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: "d" (reg1), "a" (addr)
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: "cc");
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trace_s390_cio_tsch(schid, addr, ccode);
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return ccode;
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}
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int ssch(struct subchannel_id schid, union orb *addr)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" ssch 0(%2)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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EX_TABLE(0b, 1b)
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: "+d" (ccode)
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: "d" (reg1), "a" (addr), "m" (*addr)
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: "cc", "memory");
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trace_s390_cio_ssch(schid, addr, ccode);
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return ccode;
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}
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EXPORT_SYMBOL(ssch);
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int csch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" csch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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trace_s390_cio_csch(schid, ccode);
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return ccode;
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}
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EXPORT_SYMBOL(csch);
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int tpi(struct tpi_info *addr)
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{
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int ccode;
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asm volatile(
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" tpi 0(%2)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode), "=m" (*addr)
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: "a" (addr)
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: "cc");
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trace_s390_cio_tpi(addr, ccode);
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return ccode;
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}
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int chsc(void *chsc_area)
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{
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typedef struct { char _[4096]; } addr_type;
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int cc;
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asm volatile(
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" .insn rre,0xb25f0000,%2,0\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (cc), "=m" (*(addr_type *) chsc_area)
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: "d" (chsc_area), "m" (*(addr_type *) chsc_area)
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: "cc");
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trace_s390_cio_chsc(chsc_area, cc);
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return cc;
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}
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EXPORT_SYMBOL(chsc);
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int rchp(struct chp_id chpid)
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{
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register struct chp_id reg1 asm ("1") = chpid;
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int ccode;
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asm volatile(
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" lr 1,%1\n"
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" rchp\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode) : "d" (reg1) : "cc");
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trace_s390_cio_rchp(chpid, ccode);
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return ccode;
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}
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int rsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" rsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc", "memory");
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trace_s390_cio_rsch(schid, ccode);
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return ccode;
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}
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int hsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" hsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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trace_s390_cio_hsch(schid, ccode);
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return ccode;
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}
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int xsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" xsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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trace_s390_cio_xsch(schid, ccode);
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return ccode;
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}
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int stcrw(struct crw *crw)
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{
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int ccode;
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asm volatile(
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" stcrw 0(%2)\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (ccode), "=m" (*crw)
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: "a" (crw)
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: "cc");
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trace_s390_cio_stcrw(crw, ccode);
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return ccode;
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}
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@ -9,214 +9,20 @@
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#include "trace.h"
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/*
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* Some S390 specific IO instructions as inline
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* Some S390 specific IO instructions
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*/
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static inline int stsch(struct subchannel_id schid, struct schib *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" stsch 0(%3)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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EX_TABLE(0b,1b)
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: "+d" (ccode), "=m" (*addr)
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: "d" (reg1), "a" (addr)
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: "cc");
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trace_s390_cio_stsch(schid, addr, ccode);
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return ccode;
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}
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static inline int msch(struct subchannel_id schid, struct schib *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" msch 0(%2)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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EX_TABLE(0b,1b)
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: "+d" (ccode)
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: "d" (reg1), "a" (addr), "m" (*addr)
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: "cc");
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trace_s390_cio_msch(schid, addr, ccode);
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return ccode;
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}
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static inline int tsch(struct subchannel_id schid, struct irb *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode;
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asm volatile(
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" tsch 0(%3)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode), "=m" (*addr)
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: "d" (reg1), "a" (addr)
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: "cc");
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trace_s390_cio_tsch(schid, addr, ccode);
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return ccode;
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}
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static inline int ssch(struct subchannel_id schid, union orb *addr)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" ssch 0(%2)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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EX_TABLE(0b, 1b)
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: "+d" (ccode)
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: "d" (reg1), "a" (addr), "m" (*addr)
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: "cc", "memory");
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trace_s390_cio_ssch(schid, addr, ccode);
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return ccode;
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}
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static inline int csch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" csch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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trace_s390_cio_csch(schid, ccode);
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return ccode;
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}
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static inline int tpi(struct tpi_info *addr)
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{
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int ccode;
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asm volatile(
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" tpi 0(%2)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode), "=m" (*addr)
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: "a" (addr)
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: "cc");
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trace_s390_cio_tpi(addr, ccode);
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return ccode;
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}
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static inline int chsc(void *chsc_area)
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{
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typedef struct { char _[4096]; } addr_type;
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int cc;
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asm volatile(
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" .insn rre,0xb25f0000,%2,0\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (cc), "=m" (*(addr_type *) chsc_area)
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: "d" (chsc_area), "m" (*(addr_type *) chsc_area)
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: "cc");
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trace_s390_cio_chsc(chsc_area, cc);
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return cc;
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}
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static inline int rchp(struct chp_id chpid)
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{
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register struct chp_id reg1 asm ("1") = chpid;
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int ccode;
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asm volatile(
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" lr 1,%1\n"
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" rchp\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode) : "d" (reg1) : "cc");
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trace_s390_cio_rchp(chpid, ccode);
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return ccode;
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}
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static inline int rsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" rsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc", "memory");
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trace_s390_cio_rsch(schid, ccode);
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return ccode;
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}
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static inline int hsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" hsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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trace_s390_cio_hsch(schid, ccode);
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return ccode;
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}
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static inline int xsch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" xsch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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trace_s390_cio_xsch(schid, ccode);
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return ccode;
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}
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static inline int stcrw(struct crw *crw)
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{
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int ccode;
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asm volatile(
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" stcrw 0(%2)\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (ccode), "=m" (*crw)
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: "a" (crw)
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: "cc");
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trace_s390_cio_stcrw(crw, ccode);
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return ccode;
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}
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int stsch(struct subchannel_id schid, struct schib *addr);
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int msch(struct subchannel_id schid, struct schib *addr);
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int tsch(struct subchannel_id schid, struct irb *addr);
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int ssch(struct subchannel_id schid, union orb *addr);
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int csch(struct subchannel_id schid);
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int tpi(struct tpi_info *addr);
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int chsc(void *chsc_area);
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int rchp(struct chp_id chpid);
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int rsch(struct subchannel_id schid);
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int hsch(struct subchannel_id schid);
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int xsch(struct subchannel_id schid);
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int stcrw(struct crw *crw);
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#endif
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