[ARM] S3C64XX: Mask the pll values correctly
Correct the PLL field masks to ensure the PLL functions return the right value. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [ben-linux@fluff.org: improve the description text] Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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* published by the Free Software Foundation.
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* published by the Free Software Foundation.
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*/
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*/
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#define S3C6400_PLL_MDIV_MASK ((1 << (25-16)) - 1)
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#define S3C6400_PLL_MDIV_MASK ((1 << (25-16+1)) - 1)
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#define S3C6400_PLL_PDIV_MASK ((1 << (13-8)) - 1)
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#define S3C6400_PLL_PDIV_MASK ((1 << (13-8+1)) - 1)
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#define S3C6400_PLL_SDIV_MASK ((1 << (2-0)) - 1)
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#define S3C6400_PLL_SDIV_MASK ((1 << (2-0+1)) - 1)
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#define S3C6400_PLL_MDIV_SHIFT (16)
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#define S3C6400_PLL_MDIV_SHIFT (16)
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#define S3C6400_PLL_PDIV_SHIFT (8)
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#define S3C6400_PLL_PDIV_SHIFT (8)
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#define S3C6400_PLL_SDIV_SHIFT (0)
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#define S3C6400_PLL_SDIV_SHIFT (0)
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